公开(公告)号：US09147774B2

公开(公告)日：2015-09-29

申请号：US14023079

申请日：2013-09-10

Applicant: INTERSIL AMERICAS INC.

Inventor： Stephen Joseph Gaul

IPC: H01L29/78 ,  H01L31/112 ,  H01L31/18 ,  H01L31/02 ,  H01L31/05 ,  H02S40/34 ,  H01L31/04 ,  H02S40/36

CPC classification number: H01L27/1421 ,  H01L29/7804 ,  H01L31/02 ,  H01L31/02008 ,  H01L31/02021 ,  H01L31/0504 ,  H01L31/112 ,  H01L31/18 ,  H02S10/00 ,  H02S40/34 ,  H02S40/36 ,  H02S50/00 ,  H02S50/10 ,  Y02E10/50

Abstract: Exemplary embodiments provide a solar cell device, and method for forming the solar cell device by integrating a switch component into a solar cell element. The solar cell element can include a solar cell, a solar cell array and/or a solar cell panel. The integrated solar cell element can be used for a solar sensor, while the solar sensor can also use discrete switches for each solar cell area of the sensor. Exemplary embodiments also provide a connection system for the solar cell elements and a method for super-connecting the solar cell elements to provide a desired connection path or a desired power output through switch settings. The disclosed connection systems and methods can allow for by-passing underperforming solar cell elements from a plurality of solar cell elements. In embodiments, the solar cell element can be extended to include a battery or a capacitor.

Abstract translation: 示例性实施例提供一种太阳能电池器件，以及通过将开关部件集成到太阳能电池元件中来形成太阳能电池器件的方法。 太阳能电池元件可以包括太阳能电池，太阳能电池阵列和/或太阳能电池板。 集成太阳能电池元件可用于太阳能传感器，而太阳能传感器也可以为传感器的每个太阳能电池区域使用分立开关。 示例性实施例还提供了用于太阳能电池元件的连接系统以及用于超级连接太阳能电池元件以通过开关设置提供所需连接路径或期望功率输出的方法。 所公开的连接系统和方法可以允许来自多个太阳能电池元件的旁路表现不佳的太阳能电池元件。 在实施例中，太阳能电池元件可以被扩展以包括电池或电容器。

公开(公告)号：USRE45343E1

公开(公告)日：2015-01-20

申请号：US13683139

申请日：2012-11-21

Applicant: Intersil Americas Inc.

Inventor： Sundar S. Kidambi

IPC: H03M1/06

CPC classification number: H03M1/06 ,  H03M1/0624 ,  H03M1/1028 ,  H03M1/1215 ,  H04B1/16

Abstract: Techniques for correcting component mismatches in an M-channel time-interleaved Analog to Digital Converter (ADC). In order to obtain an error measure for offset, gain or phase, errors, outputs from each ADC are either summed or averaged over No samples. Calling each of the sums or averages as Xk where k=1, 2, . . . , M, there are M such values as a result. A single value representing the mean of these M values, Xmean, is chosen as a reference value. The offset, gain and phase errors for the M different ADCs are then obtained from Xk−Xmean. The sign of each offset error, i.e., sign (Xk−Xmean), is then used to drive an adaptive algorithm whose output represents an offset correction value for the corresponding ADC. The offset, gain, and phase correction outputs from the adaptive algorithm is fed to an array of Digital-to-Analog converters (DACs) whose outputs are voltages or currents that directly or indirectly controls the offset, gain or phase setting of each individual ADC. Thus, there are M different offset, gain and phase error signals and M different adaptive algorithms operating in conjunction with M different DACs providing offset control signals to M different ADCs. In certain embodiments, spur frequencies can be reduced with the use of notch filters.

Abstract translation: 用于校正M通道时间交织模数转换器（ADC）中元件失配的技术。 为了获得偏移，增益或相位误差的误差，错误，每个ADC的输出在无样本之间求和或平均。 将每个或者平均值调用为X k，其中k = 1,2。 。 。 ，M，结果有这样的M值。 选择表示这些M值的平均值的单个值Xmean作为参考值。 然后从Xk-Xmean获得M个不同ADC的偏移，增益和相位误差。 然后使用每个偏移误差的符号，即符号（Xk-Xmean）来驱动自适应算法，其自适应算法的输出表示对应的ADC的偏移校正值。 来自自适应算法的偏移，增益和相位校正输出被馈送到数模转换器（DAC）阵列，数字模拟转换器（DAC）的输出是直接或间接控制每个ADC的偏移，增益或相位设置的电压或电流 。 因此，存在M个不同的偏移，增益和相位误差信号，以及M个不同的自适应算法，与M个不同的DAC结合，为M个不同的ADC提供偏移控制信号。 在某些实施例中，使用陷波滤波器可以减少杂散频率。

公开(公告)号：US08691670B2

公开(公告)日：2014-04-08

申请号：US13717899

申请日：2012-12-18

Applicant: Intersil Americas Inc.

Inventor： Rick Carlton Jerome ,  Francois Hebert ,  Craig McLachlan ,  Kevin Hoopingarner

IPC: H01L21/20 ,  H01L21/36

CPC classification number: H01L21/02107

Abstract: A method and structure for a semiconductor device, the device including a handle wafer, a diamond layer formed directly on a front side of the handle wafer, and a thick oxide layer formed directly on a back side of the handle wafer, the oxide layer of a thickness to counteract tensile stresses of the diamond layer. Nitride layers are formed on outer surfaces of the diamond layer and thick oxide layer and a polysilicon is formed on outer surfaces of the nitride layers. A device wafer is bonded to the handle wafer to form the semiconductor device.

Abstract translation: 一种半导体器件的方法和结构，所述器件包括处理晶片，直接形成在所述手柄晶片前侧的金刚石层，以及直接形成在所述手柄晶片的背面上的厚氧化物层，所述氧化物层 抵消金刚石层的拉伸应力的厚度。 氮化物层形成在金刚石层和厚氧化物层的外表面上，并且在氮化物层的外表面上形成多晶硅。 器件晶片被结合到处理晶片以形成半导体器件。

公开(公告)号：US20140007927A1

公开(公告)日：2014-01-09

申请号：US14023079

申请日：2013-09-10

Applicant: Intersil Americas Inc.

Inventor： Stephen Joseph Gaul

IPC: H01L31/02 ,  H01L31/18

CPC classification number: H01L27/1421 ,  H01L29/7804 ,  H01L31/02 ,  H01L31/02008 ,  H01L31/02021 ,  H01L31/0504 ,  H01L31/112 ,  H01L31/18 ,  H02S10/00 ,  H02S40/34 ,  H02S40/36 ,  H02S50/00 ,  H02S50/10 ,  Y02E10/50

Abstract: Exemplary embodiments provide a solar cell device, and method for forming the solar cell device by integrating a switch component into a solar cell element. The solar cell element can include a solar cell, a solar cell array and/or a solar cell panel. The integrated solar cell element can be used for a solar sensor, while the solar sensor can also use discrete switches for each solar cell area of the sensor. Exemplary embodiments also provide a connection system for the solar cell elements and a method for super-connecting the solar cell elements to provide a desired connection path or a desired power output through switch settings. The disclosed connection systems and methods can allow for by-passing underperforming solar cell elements from a plurality of solar cell elements. In embodiments, the solar cell element can be extended to include a battery or a capacitor.

Abstract translation: 示例性实施例提供一种太阳能电池器件，以及通过将开关部件集成到太阳能电池元件中来形成太阳能电池器件的方法。 太阳能电池元件可以包括太阳能电池，太阳能电池阵列和/或太阳能电池板。 集成太阳能电池元件可用于太阳能传感器，而太阳能传感器也可以为传感器的每个太阳能电池区域使用分立开关。 示例性实施例还提供了用于太阳能电池元件的连接系统以及用于超级连接太阳能电池元件以通过开关设置提供所需连接路径或期望功率输出的方法。 所公开的连接系统和方法可以允许来自多个太阳能电池元件的旁路表现不佳的太阳能电池元件。 在实施例中，太阳能电池元件可以被扩展以包括电池或电容器。

公开(公告)号：US08546221B2

公开(公告)日：2013-10-01

申请号：US13717925

申请日：2012-12-18

Applicant: Intersil Americas Inc.

Inventor： Dev Alok Girdhar ,  Francois Hebert

IPC: H01L21/8234

CPC classification number: H01L27/088

Abstract: A voltage converter includes an output circuit having a high side device and a low side device which can be formed on a single die (i.e. a “PowerDie”) and connected to each other through a semiconductor substrate. Both the high side device and the low side device can include lateral diffused metal oxide semiconductor (LDMOS) transistors. Because both output transistors include the same type of transistors, the two devices can be formed simultaneously, thereby reducing the number of photomasks over other voltage converter designs. The voltage converter can further include a controller circuit on a different die which can be electrically coupled to, and co-packaged with, the PowerDie.

Abstract translation: 电压转换器包括具有高侧器件的输出电路和可以形成在单个管芯（即“PowerDie”）上并通过半导体衬底相互连接的低侧器件。 高侧器件和低侧器件都可以包括横向扩散的金属氧化物半导体（LDMOS）晶体管。 因为两个输出晶体管都包含相同类型的晶体管，所以可以同时形成两个器件，从而减少超过其它电压转换器设计的光掩模数量。 电压转换器还可以包括在不同的管芯上的控制器电路，其可以与PowerDie电耦合并与其一体化。

公开(公告)号：US20130214133A1

公开(公告)日：2013-08-22

申请号：US13851318

申请日：2013-03-27

Applicant: Intersil Americas Inc.

Inventor： Dong Zheng ,  Daryl Chamberlain

IPC: G01J1/44

CPC classification number: G01J1/44 ,  G01J1/4228 ,  G11B7/131 ,  G11B7/22

Abstract: A configurable photo detector circuit comprises a photo detector array including a plurality of photo detectors coupled to a plurality of amplifiers. A method for programming a detection pattern of the configurable photo detector circuit comprises selecting a first detection pattern for the photo detector array, generating first signals to create the first selected detection pattern, and applying the first generated signals to the photo detector circuit to implement the first selected detection pattern.

Abstract translation: 可配置的光电检测器电路包括光电检测器阵列，其包括耦合到多个放大器的多个光电检测器。 一种用于对可配置光电检测器电路的检测图案进行编程的方法包括选择用于光电检测器阵列的第一检测图案，产生第一信号以产生第一选择的检测图案，以及将第一生成信号施加到光电检测器电路，以实现 第一选择的检测模式。

公开(公告)号：US20130157416A1

公开(公告)日：2013-06-20

申请号：US13717899

申请日：2012-12-18

Applicant: INTERSIL AMERICAS INC.

Inventor： Rick Carlton Jerome ,  Francois Hebert ,  Craig McLachlan ,  Kevin Hoopingarner

IPC: H01L21/02

CPC classification number: H01L21/02107

Abstract: A method and structure for a semiconductor device, the device including a handle wafer, a diamond layer formed directly on a front side of the handle wafer, and a thick oxide layer formed directly on a back side of the handle wafer, the oxide of a thickness to counteract tensile stresses of the diamond layer. Nitride layers are formed on the outer surfaces of the diamond layer and thick oxide layer and a polysilicon is formed on outer surfaces of the nitride layers. A device wafer is bonded to the handle wafer to form the semiconductor device.

Abstract translation: 一种用于半导体器件的方法和结构，所述器件包括处理晶片，直接形成在所述手柄晶片前侧上的金刚石层以及直接形成在所述手柄晶片的背面上的厚氧化物层，所述氧化物 抵抗金刚石层的拉伸应力的厚度。 在金刚石层和厚氧化物层的外表面上形成氮化物层，并且在氮化物层的外表面上形成多晶硅。 器件晶片被结合到处理晶片以形成半导体器件。

公开(公告)号：US20130130445A1

公开(公告)日：2013-05-23

申请号：US13717942

申请日：2012-12-18

Applicant: INTERSIL AMERICAS INC.

Inventor： John T. Gasner ,  Michael D. Church ,  Sameer D. Parab ,  Paul E. Bakeman, JR. ,  David A. Decrosta ,  Robert Lomenick ,  Chris A. McCarty

IPC: H01L23/00

CPC classification number: H01L21/76801 ,  H01L21/32051 ,  H01L21/76829 ,  H01L21/76841 ,  H01L21/7685 ,  H01L21/76886 ,  H01L23/528 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2224/45099

Abstract: A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.

Abstract translation: 半导体结构包括顶部金属层，形成在顶部金属层上的接合焊盘，形成在顶部金属层下面的导体以及将导体与顶部金属层分开的绝缘层。 与顶部金属层的剩余部分相比，顶部金属层包括相对刚性材料的子层。 相对硬的材料的子层被配置为在绝缘层上分布应力以减少绝缘层中的开裂。

公开(公告)号：US20040239468A9

公开(公告)日：2004-12-02

申请号：US10786533

申请日：2004-02-25

Applicant: Intersil Americas Inc.

Inventor： Xingwu Wang ,  Chungsheng Yang

IPC: H01F005/00

CPC classification number: H01F41/046 ,  H01F17/0006 ,  H01F17/06 ,  Y10T29/4902

Abstract: The present invention relates to inductors with improved inductance and quality factor. In one embodiment, a magnetic thin film inductor is disclosed. In this embodiment, magnetic thin film inductor includes a plurality of elongated conducting regions and magnetic material. The plurality of elongated conducting regions are positioned parallel with each other and at a predetermined spaced distance apart from each other. The magnetic material encases the plurality of conducting regions, wherein when currents are applied to the conductors, current paths in each of the conductors cause the currents to generally flow in the same direction thereby enhancing mutual inductance.

Abstract translation: 本发明涉及具有改善的电感和品质因数的电感器。 在一个实施例中，公开了一种磁性薄膜电感器。 在本实施例中，磁性薄膜电感器包括多个细长导电区域和磁性材料。 多个细长的导电区域彼此平行地并且彼此隔开预定间隔的距离定位。 磁性材料封装多个导电区域，其中当电流施加到导体时，每个导体中的电流路径使得电流通常沿相同方向流动，从而增强互感。

公开(公告)号：US20040228152A1

公开(公告)日：2004-11-18

申请号：US10765385

申请日：2004-01-27

Applicant: Intersil Americas Inc., State of Incorporation: Delaware

Inventor： Eric Magne Solie

IPC: H02M001/00

CPC classification number: H02M1/36 ,  H02M2001/0025

Abstract: A soft start circuit for a DC-DC converter has an input reference voltage coupled to an error amplifier and to a soft start capacitor. A feedback resistor is coupled between an output node and the error amplifier, whose output is coupled to a pulse width modulator (PWM). The PWM output is coupled through an inductor to the output node, to which an output capacitor referenced to ground is coupled. Means is provided to charge up the soft start capacitor to the output voltage while the converter is disabled. As a result, when enabled, the converter will not discharge the output capacitor, but will ramp the output voltage to the voltage Vref without excessive currents.

Abstract translation: 用于DC-DC转换器的软启动电路具有耦合到误差放大器和软启动电容器的输入参考电压。 反馈电阻耦合在输出节点和误差放大器之间，其输出耦合到脉宽调制器（PWM）。 PWM输出通过电感器耦合到输出节点，与地面相关的输出电容耦合到输出节点。 提供了在转换器禁用时将软启动电容充电到输出电压的手段。 因此，当使能时，转换器不会对输出电容器放电，但会将输出电压斜坡上升到电压Vref，而不会有过大的电流。