公开(公告)号：US10134786B2

公开(公告)日：2018-11-20

申请号：US14421947

申请日：2014-04-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seongyeol Yoo ,  Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song

IPC: H01L29/04 ,  H01L27/12

Abstract: Disclosed is an array substrate, a method of manufacturing the same, and a display device. The method of manufacturing an array substrate includes: forming a pattern comprising an active layer, a source, a drain, a data line and a pixel electrode on a base substrate through a single patterning process; forming a pattern of an insulating layer; forming a pattern comprising a gate and a gate line through a single patterning process. In the array substrate, the method of manufacturing the same, and the display device of the present invention, only two patterning processes are required to achieve the fabrication of the array substrate, which has less and simple process steps, thereby reduces the manufacturing complexity and manufacturing cost, and increasing the production efficiency and the economic benefit.

公开(公告)号：US09916121B2

公开(公告)日：2018-03-13

申请号：US14361879

申请日：2013-12-09

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chao Xu ,  Chunfang Zhang ,  Yan Wei ,  Heecheol Kim

IPC: G06F3/14 ,  G02F1/1333

CPC classification number: G06F3/1446 ,  G02F1/13336 ,  G06F3/1431 ,  Y10T29/49117 ,  Y10T428/24802

Abstract: A substrate provided with alignment marks, a display screen, a splicing screen and an alignment method of splicing screen, in which, the splicing screen includes at least two display screens with alignment marks. A substrate of the display screen is provided with at least two alignment marks, and different alignment marks have a height difference therebetween which is larger or equal to a standard difference value. A narrow bezel splicing of display screens can be achieved by setting the alignment marks with different heights.

公开(公告)号：US20170358601A1

公开(公告)日：2017-12-14

申请号：US15526289

申请日：2015-12-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Heecheol Kim ,  Hyun Sic Choi

IPC: H01L27/12 ,  H01L21/77 ,  H01L27/32

CPC classification number: H01L27/1203 ,  H01L21/77 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/3244 ,  H01L27/3281

Abstract: A display substrate, a manufacturing method thereof and a display device are provided, and the display substrate includes pixel units, each of the pixel units is provided with a thin film transistor, a pixel electrode and a common electrode; the pixel electrode and the common electrode are arranged in a same layer and insulated from each other, the pixel electrode includes a plurality of strip-shaped pixel sub-electrodes, the common electrode includes a plurality of strip-shaped common sub-electrodes, the plurality of strip-shaped pixel sub-electrodes (104) and the plurality of strip-shaped common sub-electrodes are alternately distributed, and an interval width between each pixel sub-electrode and each common sub-electrode adjacent to the pixel sub-electrode is from 1 μm to 5 μm. The display substrate is configured for solving the problem of low charging rate in large size display panels.

公开(公告)号：US09818739B2

公开(公告)日：2017-11-14

申请号：US15097536

申请日：2016-04-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD

Inventor： Heecheol Kim

IPC: H01L27/02 ,  H01L27/12 ,  H01L23/535 ,  H01L29/786 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L27/0292 ,  H01L23/535 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/786

Abstract: An array substrate is provided. The array substrate includes a substrate body, a gate electrode layer, a first insulating layer, a source-drain electrode layer, a second insulating layer, and a transparent conducting layer, wherein the transparent conducting layer includes a bridging part. The bridging part includes a first electrode, a second electrode, and a connecting electrode, wherein a reference plane is defined perpendicular to the substrate body and passing through the first electrode, the connecting electrode, and the second electrode, and wherein a cross-sectional area of the connecting electrode that is taken perpendicular to the reference plane and taken perpendicular to the substrate body is i) smaller than a cross-sectional area of the first electrode and ii) smaller than a cross-sectional area of the second electrode.

公开(公告)号：US09806108B2

公开(公告)日：2017-10-31

申请号：US14430019

申请日：2014-05-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol Yoo ,  Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/24

CPC classification number: H01L27/1288 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869

Abstract: A manufacturing method of a thin film transistor, a manufacturing method of an array substrate and an array substrate are provided. The manufacturing method of the thin film transistor comprises: forming an active layer, a source electrode and a drain electrode on a substrate by one patterning process, the active layer, the source electrode and the drain electrode being located in a same layer. The manufacturing method of the thin film transistor can effectively reduce the number of patterning processes, so as to enhance the capacity in mass production, and reduce the cost.

公开(公告)号：US09690146B2

公开(公告)日：2017-06-27

申请号：US14388699

申请日：2013-12-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: H01L27/12 ,  G02F1/1343 ,  H01L21/77 ,  H01L29/78 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/134309 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/13685 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288

Abstract: An embodiment of the present invention provides an array substrate, its manufacturing method and a display device. The method for manufacturing the array substrate comprises forming a common electrode with a slit structure on a substrate, and a pixel electrode with a slit structure not overlapping the common electrode. According to the present invention, it is able to reduce storage capacitance between the common electrode and the pixel electrode, thereby to ensure the image quality.

公开(公告)号：US09678263B2

公开(公告)日：2017-06-13

申请号：US14422048

申请日：2014-06-05

Applicant: Boe Technology Group Co., Ltd.

Inventor： Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC: F21V8/00 ,  G02B26/10 ,  G02F1/1335 ,  G02B6/00

CPC classification number: G02B6/0018 ,  G02B6/0023 ,  G02B6/0066 ,  G02B26/108 ,  G02B2006/0098 ,  G02F1/1336 ,  G09G2310/024

Abstract: The embodiments of the invention disclose a scanning type backlight module and a display device. Since a laser light source with good collimation is applied, during a display time of a frame, with the modulation of the optical path regulator, the laser emitted from the laser light source performs a progressive scanning for a region corresponding to at least one row of pixel units in a light guide plate or a display panel. Therefore, the problem of dynamic picture ghosting can be solved effectively; moreover, since the progressive scanning for the entire light guide plate can be realized by changing the light propagation path of the laser emitted from the laser light source with the optical path regulator, the number of the laser light sources can be reduced and the production cost can be decreased.

公开(公告)号：US09620524B2

公开(公告)日：2017-04-11

申请号：US14407514

申请日：2014-05-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L29/786 ,  G02F1/136

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/136277 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/13606 ,  G02F2001/136218 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41758 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/7869

Abstract: An array substrate and a manufacturing method thereof as well as a display device are disclosed. The array substrate includes a gate (21) and a gate insulating layers (22) of TFT formed in this order on a surface of a base substrate (20); a semiconductor active layer (23), an etching stop layer (24), and a source (251)/drain (252) of the TFT formed in this order on a surface of the gate insulating layer (22) corresponding to the gate (21) of the TFT. The source (251) and drain (252) of the TFT contact the semiconductor active layer (23) through respective vias. The array substrate further includes: a shielding electrode (26) formed between the gate (21) of the TFT and the base substrate (20); and an insulating layer (27) formed between the gate (21) of the TFT and the shielding electrode (26). In a region where the gate (21) faces the source (251), the area of the gate (210) is smaller than that of the source (251); and/or in a region where the gate (21) faces the drain (252), the area of the gate (210) is smaller than that of the drain (252). The array substrate according to embodiments of the present invention reduces the parasitic capacitance between the source/drain and the gate of the TFT and improves the quality of a display device.

公开(公告)号：US09543325B2

公开(公告)日：2017-01-10

申请号：US14500007

申请日：2014-09-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/7869

Abstract: An array substrate and a manufacturing method thereof, a liquid crystal display panel and a display device are provided, the array substrate comprises a base substrate, and thin film transistors and pixel electrodes provided on the base substrate, the pixel electrode and the active layer in the thin film transistor are provided in the same layer. The active layer is formed of transparent oxide semiconductor material, and the concentration of carriers in the oxide semiconductor material may be increased by performing a plasma process on the oxide semiconductor material, thus the pixel electrode may be manufactured by using the oxide semiconductor material used for manufacturing the active layer, thereby the pixel electrode and the active layer can be provided in the same layer, the number of the masks can be reduced, the manufacturing process is simplified, production cost is saved, the productivity is increased, and the manufacturing time is shortened.

Abstract translation: 提供阵列基板及其制造方法，液晶显示面板和显示装置，阵列基板包括基底基板，薄膜晶体管和设置在基底基板上的像素电极，像素电极和有源层 薄膜晶体管设置在同一层中。 有源层由透明氧化物半导体材料形成，并且可以通过对氧化物半导体材料执行等离子体处理来增加氧化物半导体材料中的载流子的浓度，因此可以通过使用用于 制造有源层，由此可以将像素电极和有源层设置在相同的层中，可以减少掩模的数量，简化制造工序，节省生产成本，提高生产率，制造时间 缩短了

公开(公告)号：US20170003553A1

公开(公告)日：2017-01-05

申请号：US14436066

申请日：2014-07-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: G02F1/1343 ,  G02F1/1333 ,  H01L21/768 ,  H01L29/45 ,  H01L21/324 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/134318 ,  G02F2001/134372 ,  G02F2001/136295 ,  G02F2201/121 ,  G02F2201/123 ,  H01L21/02244 ,  H01L21/02255 ,  H01L27/124 ,  H01L27/1259

Abstract: The embodiments of the invention disclose an array substrate, a manufacturing method thereof and a display device. Due to the fact that the surfaces of a source electrode, a drain electrode and a data line which are arranged on the same layer are provided with an oxide film which is formed after annealing treatment is conducted on the source electrode, the drain electrode and the data line, in the process that the pattern of a pixel electrode is formed on the source electrode, the drain electrode and the data line by the adoption of a composition technology, the oxide film can protect the source electrode and the data line under the oxide film from being corroded by an etching agent when the pattern of the pixel electrode is formed by etching, and the display quality of a display panel will not be affected; meanwhile, a connecting portion enables the drain electrode to be electrically connected with the pixel electrode through a first via hole arranged over the drain electrode and penetrating through the oxide film, therefore the normal display function of the display panel can be ensured.

Abstract translation: 本发明的实施例公开了阵列基板，其制造方法和显示装置。 由于在同一层上设置的源电极，漏电极和数据线的表面设置有在退火处理后形成的氧化膜，在源电极，漏电极和 数据线，在通过采用组合技术在源电极，漏电极和数据线上形成像素电极的图案的过程中，氧化膜可以保护源电极和氧化物下的数据线 当通过蚀刻形成像素电极的图案时，由蚀刻剂腐蚀的膜不会影响显示面板的显示质量; 同时，连接部能够通过布置在漏极上的第一通孔使漏电极与像素电极电连接，贯通氧化膜，能够确保显示面板的正常显示功能。