Inverse function of min*:min*- (inverse function of max*:max*-)
    91.
    发明授权
    Inverse function of min*:min*- (inverse function of max*:max*-) 有权
    min *的反函数:min * - (最大*的反函数:max * - )

    公开(公告)号:US07360146B1

    公开(公告)日:2008-04-15

    申请号:US10347732

    申请日:2003-01-21

    IPC分类号: H03M13/03

    摘要: Inverse function of min*:min*− (inverse function of max*:max*−). Two new parameters are employed to provide for much improved decoding processing for codes that involve the determination of a log corrected minimal and/or a log corrected maximal value from among a number of possible values. Examples of some of the codes that may benefit from the improved decoding processing provided by the inverse function of min*:min*− (and/or inverse function of max*:max*−) include turbo coding, parallel concatenated trellis coded modulated (PC-TCM) code, turbo trellis coded modulated (TTCM) code, and low density parity check (LDPC) code among other types of codes. The total number of processing steps employed within the decoding of a signal is significantly reduced be employing the inverse function of min*:min*− (and/or inverse function of max*:max*−) processing.

    摘要翻译: min *的反函数:min * - (max *:max * - 的反函数)。 采用两个新参数来提供对于涉及从多个可能值中确定对数校正的最小值和/或对数校正最大值的代码进行大量改进的解码处理。 可以从由min *:min * - (和/或max *:max * - 的逆函数)提供的改进的解码处理中受益的一些代码的示例包括turbo编码,并行级联网格编码调制( PC-TCM)码,turbo网格编码调制(TTCM)码和低密度奇偶校验(LDPC)码。 采用min *:min * - (和/或max *:max * - )的逆函数处理的逆函数,信号解码中采用的处理步骤的总数显着减少。

    Overlapping sub-matrix based LDPC (low density parity check) decoder
    92.
    发明申请
    Overlapping sub-matrix based LDPC (low density parity check) decoder 失效
    重叠的基于子矩阵的LDPC(低密度奇偶校验)解码器

    公开(公告)号:US20080082868A1

    公开(公告)日:2008-04-03

    申请号:US11709078

    申请日:2007-02-21

    IPC分类号: G06K5/04

    摘要: Novel decoding approach is presented, by which, updated bit edge messages corresponding to a sub-matrix of an LDPC matrix are immediately employed for updating of the check edge messages corresponding to that sub-matrix without requiring storing the bit edge messages; also updated check edge messages corresponding to a sub-matrix of the LDPC matrix are immediately employed for updating of the bit edge messages corresponding to that sub-matrix without requiring storing the check edge messages. Using this approach, twice as many decoding iterations can be performed in a given time period when compared to a system that performs updating of all check edge messages for the entire LDPC matrix, then updating of all bit edge messages for the entire LDPC matrix, and so on. When performing this overlapping approach in conjunction with min-sum processing, significant memory savings can also be achieved.

    摘要翻译: 提出了新的解码方法,通过该方法,立即采用对应于LDPC矩阵的子矩阵的更新的位边消息来更新与该子矩阵相对应的校验边消息,而不需要存储位边消息; 立即采用对应于LDPC矩阵的子矩阵的更新的校验边消息来更新与该子矩阵相对应的位边消息,而不需要存储校验边消息。 与执行整个LDPC矩阵的所有校验边消息的更新的系统相比,使用这种方法,在给定时间段内可以执行两倍的解码迭代,然后更新整个LDPC矩阵的所有位边消息,以及 所以。 当结合最小和处理执行这种重叠方法时,也可以节省大量的内存。

    LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing
    93.
    发明授权
    LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing 有权
    LDPC(低密度奇偶校验)编码信号解码使用并行和同时的比特节点和校验节点处理

    公开(公告)号:US07281192B2

    公开(公告)日:2007-10-09

    申请号:US10851614

    申请日:2004-05-21

    IPC分类号: H03M13/00

    摘要: LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing. This novel approach to decoding of LDPC coded signals may be described as being LDPC bit-check parallel decoding. In some alternative embodiment, the approach to decoding LDPC coded signals may be modified to LDPC symbol-check parallel decoding or LDPC hybrid-check parallel decoding. A novel approach is presented by which the edge messages with respect to the bit nodes and the edge messages with respect to the check nodes may be updated simultaneously and in parallel to one another. Appropriately constructed executing orders direct the sequence of simultaneous operation of updating the edge messages at both nodes types (e.g., edge and check). For various types of LDPC coded signals, including parallel-block LDPC coded signals, this approach can perform decoding processing in almost half of the time as provided by previous decoding approaches.

    摘要翻译: LDPC(低密度奇偶校验)编码信号解码使用并行和同时的比特节点和校验节点处理。 这种LDPC编码信号的解码方法可以被描述为LDPC比特检验并行解码。 在一些替代实施例中,解码LDPC编码信号的方法可以被修改为LDPC符号校验并行解码或LDPC混合校验并行解码。 提出了一种新颖的方法,通过该方法,相对于校验节点的相对于位节点和边缘消息的边缘消息可以被同时并且彼此并行地更新。 适当构造的执行命令指示在两种节点类型(例如,边缘和检查)上更新边缘消息的同时操作的顺序。 对于包括并行块LDPC编码信号的各种类型的LDPC编码信号,该方法可以在几乎一半的时间内执行由先前的解码方法提供的解码处理。

    Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals
    94.
    发明授权
    Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals 有权
    解码LDPC(低密度奇偶校验)编码信号和LDPC编码调制信号时的迭代度量更新

    公开(公告)号:US07216283B2

    公开(公告)日:2007-05-08

    申请号:US10669177

    申请日:2003-09-23

    IPC分类号: H03M13/11 H03M13/39

    摘要: Iterative metric updating when decoding LDPC (Low Density Parity Check) coded signals and LDPC coded modulation signals. A novel approach is presented for updating the bit metrics employed when performing iterative decoding of LDPC coded signals. This bit metric updating is also applicable to decoding of signals that have been generated using combined LDPC coding and modulation encoding to generate LDPC coded modulation signals. In addition, the bit metric updating is also extendible to decoding of LDPC variable code rate and/or variable modulation signals whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. By ensuring that the bit metrics are updated during the various iterations of the iterative decoding processing, a higher performance can be achieved than when the bit metrics remain as fixed values during the iterative decoding processing.

    摘要翻译: 解码LDPC(低密度奇偶校验)编码信号和LDPC编码调制信号时的迭代度量更新。 提出了一种新颖的方法来更新在执行LDPC编码信号的迭代解码时采用的比特量度。 该比特度量更新也适用于使用组合LDPC编码和调制编码生成的信号的解码,以生成LDPC编码调制信号。 此外,比特度量更新也可扩展到LDPC码可变码率和/或可变调制信号的解码,其码率和/或调制可以像逐个符号一样频繁地变化。 通过确保在迭代解码处理的各种迭代期间更新比特度量,可以比在迭代解码处理期间比特度量保持为固定值时更高的性能。

    LDPC (low density parity check) coded modulation symbol decoding
    95.
    发明授权
    LDPC (low density parity check) coded modulation symbol decoding 有权
    LDPC(低密度奇偶校验)编码调制符号解码

    公开(公告)号:US07159170B2

    公开(公告)日:2007-01-02

    申请号:US10668526

    申请日:2003-09-23

    IPC分类号: G06F11/00 H03M13/00

    摘要: LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. The iterative decoding processing may involve updating the check nodes as well as estimating the symbol sequence and updating the symbol nodes. In some embodiments, an alternative hybrid decoding approach may be performed such that a combination of bit level and symbol level decoding is performed. This LDPC symbol decoding out-performs bit decoding only. In addition, it provides comparable or better performance of bit decoding involving iterative updating of the associated metrics.

    摘要翻译: LDPC(低密度奇偶校验)编码调制符号解码。 通过适当地修改LDPC三部分图来消除比特节点从而生成LDPC二分图(使得符号节点被适当地映射到校验节点从而消除比特节点)来支持符号解码。 将符号节点通信地耦合到校验节点的边缘被适当地标记以支持LDPC编码调制信号的符号解码。 迭代解码处理可以包括更新校验节点以及估计符号序列和更新符号节点。 在一些实施例中,可以执行替代的混合解码方法,使得执行位电平和符号电平解码的组合。 该LDPC码解码仅执行比特解码。 此外,它提供可比较或更好的比特解码性能,涉及相关度量的迭代更新。

    Low density parity check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses

    公开(公告)号:US07017106B2

    公开(公告)日:2006-03-21

    申请号:US10901528

    申请日:2004-07-29

    IPC分类号: G06F11/00

    CPC分类号: H04L1/005 H04L1/0057

    摘要: Low Density Parity Check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses. For the first time, min* processing is demonstrated for use in decoding LDPC-coded signals. In addition, max*, min**, or max** (and their respective inverses) may also be employed when performing calculations that are required to perform decoding of signals coded using LDPC code. These new parameters may be employed to provide for much improved decoding processing for LDPC codes when that decoding involves the determination of a minimal and/or maximal value, or a minimal and/or maximal log corrected value, from among a number of possible values. The total number of processing steps employed within the decoding of an LDPC-coded signal is significantly reduced be employing the min*, max*, min**, or max** (and their respective inverses) decoding processing described herein.

    Asymmetrical MIMO wireless communications
    97.
    发明授权
    Asymmetrical MIMO wireless communications 有权
    不对称MIMO无线通信

    公开(公告)号:US08254407B2

    公开(公告)日:2012-08-28

    申请号:US12783730

    申请日:2010-05-20

    IPC分类号: H04W76/00

    CPC分类号: H04B7/0613 H04B7/0413

    摘要: A method for asymmetrical MIMO wireless communication begins by determining a number of transmission antennas for the asymmetrical MIMO wireless communication. The method continues by determining a number of reception antennas for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas exceeds the number of reception antennas, using spatial time block coding for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas does not exceed the number of reception antennas, using spatial multiplexing for the asymmetrical MIMO wireless communication.

    摘要翻译: 一种用于非对称MIMO无线通信的方法是通过确定用于非对称MIMO无线通信的多个发送天线来开始的。 该方法通过确定用于非对称MIMO无线通信的接收天线的数量来继续。 当发送天线的数量超过接收天线的数量时,该方法继续使用用于非对称MIMO无线通信的空间时间块编码。 当发送天线的数量不超过接收天线的数量时,该方法继续使用用于非对称MIMO无线通信的空间复用。

    Parallel concatenated code with soft-in soft-out interactive turbo decoder
    98.
    发明授权
    Parallel concatenated code with soft-in soft-out interactive turbo decoder 有权
    并行级联代码与软入软交互式turbo解码器

    公开(公告)号:US07715503B2

    公开(公告)日:2010-05-11

    申请号:US12534604

    申请日:2009-08-03

    IPC分类号: H04L5/12 H04L23/02

    摘要: A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

    摘要翻译: 一种并行级联(Turbo)编码和解码的方法。 Turbo编码器接收一系列输入数据元组并进行编码。 输入序列可以对应于原始数据源的序列,或者对应于已由Reed-Solomon编码器提供的已经编码的数据序列。 turbo编码器通常包括由一个或多个交织器分离的两个或更多个编码器。 输入数据元组可以使用其中交织根据某些方法(例如块或随机交织)的加法规则进行交织,其中输入元组可以只交织到具有相同模N的交织位置 其中N是整数),因为它们在输入数据序列中具有。 如果所有的输入元组都是由所有的编码器编码的,那么输出元组可以从编码器顺序选择,也不会丢失元组。 如果输入元组包含多个比特,那么这些比特可以与具有相同模N和相同比特位置的交织位置独立交织。 这可以提高代码的鲁棒性。 第一编码器可以不具有交织器,或者所有编码器可以具有交织器,无论输入元组位是否独立交错。 模式类型交织也允许并行解码。