中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

140 records (took 0.029 seconds)

    EXECUTION OFFSET RATE LIMITER
    96.
    发明公开
    EXECUTION OFFSET RATE LIMITER 审中-公开

    公开(公告)号：US20230362096A1

    公开(公告)日：2023-11-09

    申请号：US18106953

    申请日：2023-02-07

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Natan Manevich ,  Dotan David Levi ,  Roee Moyal

    IPC: H04L47/22 ,  H04L47/263

    CPC classification number: H04L47/225 ,  H04L47/263

    Abstract: A system includes a device coupled to a processing device. The processing device is to receive a request to execute a plurality of workloads, the request comprising a rate to execute each workload of the plurality of workloads and a parameter value indicating an execution offset. The processing device is further to determine a sequence for executing the plurality of workloads based on receiving the rate and the parameter value, where the sequence is to execute each workload at the respective rate and each workload of the plurality of workloads is executed at a different time based on the parameter value. The processing device is to execute the plurality of workloads in accordance with the sequence upon determining the sequence to execute the plurality of workloads.

    Time-based synchronization descriptors
    97.
    发明公开
    Time-based synchronization descriptors 审中-公开

    公开(公告)号：US20230251899A1

    公开(公告)日：2023-08-10

    申请号：US17667600

    申请日：2022-02-09

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Dotan David Levi ,  Daniel Marcovitch ,  Natan Manevich ,  Wojciech Wasko ,  Igor Voks

    IPC: G06F9/48

    CPC classification number: G06F9/4887

    Abstract: In one embodiment, a system includes a peripheral device including a hardware clock, and processing circuitry to read a given work request entry stored with a plurality of work request entries in at least one work queue in a memory, the given work request entry including timing data and an operator, the timing data being indicative of a time at which a work request should be executed, retrieve a clock value from the hardware clock, and execute the work request with a workload while execution of the work request is timed responsively to the timing data and the operator and the retrieved clock value.

    Software-controlled clock synchronization of network devices
    99.
    发明授权
    Software-controlled clock synchronization of network devices 有权

    公开(公告)号：US11606427B2

    公开(公告)日：2023-03-14

    申请号：US17120313

    申请日：2020-12-14

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Dotan David Levi ,  Avraham Ganor ,  Arnon Sattinger ,  Natan Manevich ,  Reuven Kogan ,  Artiom Tsur ,  Ariel Almog ,  Bar Shapira

    IPC: H04L67/1095 ,  G06F1/12 ,  G06F1/14

    Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.

Patent Agency Ranking