Manufacturing method of semiconductor device
    92.
    发明授权
    Manufacturing method of semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号:US5470770A

    公开(公告)日:1995-11-28

    申请号:US413404

    申请日:1995-03-30

    摘要: A manufacturing method for a semiconductor device, which can attain a low ion voltage in a manufacturing method for a semiconductor device involving a process for forming a groove by etching prior to selective oxidation, selectively oxidizing a region including the groove and thereby making a channel part of the groove, is disclosed. A groove part is thermally oxidized by using a silicon nitride film as a mask. A LOCOS oxide film is formed by this thermal oxidation, and concurrently a U-groove is formed on the surface of an n.sup.- -type epitaxial layer eroded by the LOCOS oxide film, and the shape of the U-groove is fixed. A curve part formed during a chemical dry etching process remains as a curve part on the side surface of the U-groove. Then, an n.sup.+ -type source layer is formed by means of thermal diffusion to a junction thickness of 0.5 to 1 .mu.m, and a channel is set up as well. The junction depth obtained by this thermal diffusion is set up more deeply than the curve part which is formed during the above etching and remains on the side surface of the U-groove after the above selective thermal oxidation.

    摘要翻译: 一种用于半导体器件的制造方法的半导体器件的制造方法,其包括在选择性氧化之前通过蚀刻形成沟槽的工艺的半导体器件的制造方法,选择性地氧化包括沟槽的区域,从而形成沟道部分 的凹槽。 通过使用氮化硅膜作为掩模将槽部热氧化。 通过该热氧化形成LOCOS氧化物膜,并且在由LOCOS氧化物膜侵蚀的n型外延层的表面上形成U形槽,并且U形槽的形状被固定。 在化学干蚀刻过程中形成的曲线部分在U形槽的侧表面上保持为曲线部分。 然后,通过热扩散形成0.5±1μm的结合厚度的n +型源极层,并且还设置沟道。 通过该热扩散获得的结深度比在上述蚀刻期间形成的曲线部分更深地设置,并且在上述选择性热氧化之后保留在U形槽的侧表面上。

    Production method of a verticle type MOSFET
    93.
    发明授权
    Production method of a verticle type MOSFET 失效
    垂直型MOSFET的制造方法

    公开(公告)号:US5460985A

    公开(公告)日:1995-10-24

    申请号:US30338

    申请日:1993-03-25

    摘要: A vertical type power MOSFET remarkably reduces its ON-resistance per area. A substantial groove formation in which a gate structure is constituted is performed beforehand utilizing the LOCOS method before the formation of a p-type base layer and an n.sup.+ -type source layer. The p-type base layer and the n.sup.+ -type source layer are then formed by double diffusion in a manner of self-alignment with respect to a LOCOS oxide film, simultaneously with which channels are set at sidewall portions of the LOCOS oxide film. Thereafter the LOCOS oxide film is removed to provide a U-groove so as to constitute the gate structure. Namely, the channels are set by the double diffusion of the manner of self-alignment with respect to the LOCOS oxide film, so that the channels, which are set at the sidewall portions at both sides of the groove, provide a structure of exact bilateral symmetry, there is no positional deviation of the U-groove with respect to the base layer end, and the length of the bottom face of the U-groove can be made minimally short. Therefore, the unit cell size is greatly reduced, and the ON-resistance per area is greatly decreased.

    摘要翻译: PCT No.PCT / JP92 / 00929 Sec。 371日期1993年3月25日 102(e)1993年3月25日PCT提交1992年7月22日PCT公布。 公开号WO93 / 03502 日期:1993年2月18日。垂直型功率MOSFET显着降低了其面积的导通电阻。 在形成p型基极层和n +型源极层之前,利用LOCOS方法预先利用构成栅极结构的实质的槽形成。 然后通过相对于LOCOS氧化物膜的自对准的双扩散形成p型基极层和n +型源极层,同时将通道设置在LOCOS氧化物膜的侧壁部分。 此后,去除LOCOS氧化物膜以提供U形槽以构成栅极结构。 即,通过相对于LOCOS氧化膜的自对准方式的双扩散来设定通道,使得设置在凹槽两侧的侧壁部分处的通道提供精确双边的结构 U形槽相对于基底层端部没有位置偏离,U槽的底面的长度最短。 因此,单元电池尺寸大大降低,并且每个面积的导通电阻大大降低。

    SEMICONDUCTOR DEVICE HAVING LATERAL ELEMENT
    98.
    发明申请
    SEMICONDUCTOR DEVICE HAVING LATERAL ELEMENT 有权
    具有横向元件的半导体器件

    公开(公告)号:US20130075877A1

    公开(公告)日:2013-03-28

    申请号:US13615912

    申请日:2012-09-14

    IPC分类号: H01L29/861

    摘要: A semiconductor device with a lateral element includes a semiconductor substrate, first and second electrodes on the substrate, and a resistive field plate extending from the first electrode to the second electrode. The lateral element passes a current between the first and second electrodes. A voltage applied to the second electrode is less than a voltage applied to the first electrode. The resistive field plate has a first end portion and a second end portion opposite to the first end portion. The second end portion is located closer to the second electrode than the first end portion. An impurity concentration in the second end portion is equal to or greater than 1×1018 cm−3.

    摘要翻译: 具有横向元件的半导体器件包括半导体衬底,衬底上的第一和第二电极以及从第一电极延伸到第二电极的电阻场板。 横向元件在第一和第二电极之间通过电流。 施加到第二电极的电压小于施加到第一电极的电压。 电阻场板具有与第一端部相对的第一端部和第二端部。 第二端部比第一端部更靠近第二电极。 第二端部的杂质浓度为1×1018cm-3以上。

    Lateral insulated-gate bipolar transistor
    99.
    发明授权
    Lateral insulated-gate bipolar transistor 有权
    侧面绝缘栅双极晶体管

    公开(公告)号:US08354691B2

    公开(公告)日:2013-01-15

    申请号:US13226636

    申请日:2011-09-07

    IPC分类号: H01L29/739

    摘要: A N-channel lateral insulated-gate bipolar transistor includes a semiconductor substrate, a drift layer, a collector region, a channel layer, an emitter region, a gate insulation film, a gate electrode, a collector electrode, an emitter electrode. The collector region includes a high impurity concentration region having a high impurity concentration and a low impurity concentration region having a lower impurity concentration than the high impurity concentration region. The collector electrode is in ohmic contact with the high impurity concentration region and in schottky contact with the low impurity concentration region.

    摘要翻译: N沟道横向绝缘栅双极晶体管包括半导体衬底,漂移层,集电极区,沟道层,发射极区,栅极绝缘膜,栅电极,集电极,发射极。 集电极区域包括具有高杂质浓度的高杂质浓度区域和杂质浓度低于高杂质浓度区域的低杂质浓度区域。 集电极与高杂质浓度区域欧姆接触,与低杂质浓度区域进行肖特基接触。

    Transmission device for differential communication
    100.
    发明授权
    Transmission device for differential communication 有权
    用于差分通信的传输设备

    公开(公告)号:US08320471B2

    公开(公告)日:2012-11-27

    申请号:US12923397

    申请日:2010-09-20

    IPC分类号: H04B3/00

    CPC分类号: H04L25/0272

    摘要: In a transmission device for differential communication, a first cathode-side element part is coupled between a first communication line and a cathode-side power supply line, a second cathode-side element part is coupled between a second communication line and the cathode-side power supply line, a first anode-side element part is coupled between the first communication line and an anode-side power supply line, and a second anode-side element part is coupled between the second communication line and the anode-side power supply line. A driving portion drives the element parts based on transmission data input from an outside. A target potential generating portion generates target potentials of the element parts based on potentials of the first communication line and the second communication line.

    摘要翻译: 在用于差分通信的传输装置中,第一阴极侧元件部分耦合在第一通信线路和阴极侧电源线之间,第二阴极侧元件部分耦合在第二通信线路和阴极侧部件之间 电源线,第一阳极侧元件部分耦合在第一通信线路和阳极侧电源线之间,第二阳极侧元件部分耦合在第二通信线路和阳极侧电源线路之间 。 驱动部根据从外部输入的传输数据来驱动元件部。 目标电势产生部分基于第一通信线路和第二通信线路的电位产生元件部分的目标电位。