公开(公告)号：US11888312B2

公开(公告)日：2024-01-30

申请号：US17684335

申请日：2022-03-01

Applicant: The United States of America, as represented by the Secretary of the Navy

Inventor： Di Zhang

IPC: H02H9/04 ,  H01C7/108 ,  H01C7/12 ,  H01H9/54

CPC classification number: H02H9/04 ,  H01C7/108 ,  H01C7/12 ,  H01H2009/543

Abstract: A solid state circuit breaker that may include a metal oxide varistor (MOV) that is connected in series to a thyristor, the MOV to clamp voltage of current flowing through the solid state circuit breaker; the thyristor including a gate to control flow of the current to the MOV along a first path to the MOV; a breakover diode to activate at a target voltage level to allow the current to flow to the MOV along a second path; and a Zener diode to close the gate and allow current to flow along the first path in response to the current on the second path.

公开(公告)号：US09514865B2

公开(公告)日：2016-12-06

申请号：US14547388

申请日：2014-11-19

Applicant: PHOENIX CONTACT GMBH & CO. KG

Inventor： Jan-Erik Schmutz ,  Friedrich-Eckhard Brand

IPC: H01C7/10 ,  H01C7/12 ,  H01C1/084 ,  H01C1/142 ,  H01H85/12 ,  H01C1/14 ,  H01C7/108 ,  H01H85/02 ,  H01C7/102

CPC classification number: H01C7/126 ,  H01C1/084 ,  H01C1/14 ,  H01C1/142 ,  H01C7/102 ,  H01C7/108 ,  H01H85/0241 ,  H01H85/12

Abstract: The object of the invention is a multi-contact element for a varistor wherein the multi-contact element has a sandwich structure, wherein the sandwich structure has two or more contact elements in a lowermost layer, and wherein the sandwich structure has at least one common connection electrode in an uppermost layer, wherein a first intermediate layer made of an electrically insulating layer of material is provided at least in segments between the lowermost layer (US) and the uppermost layer, wherein fuses are located in the first intermediate layer that are configured such that they are capable of sustaining a specified surge current, the specified surge current per fuse being less than the specified surge current of the varistor, wherein the fuses are embodied as vias within the first intermediate layer, wherein the fuses in the first intermediate layer are in direct electrical contact with the common connection electrode, wherein each of the fuses is in direct or indirect electrical contact with a subset of the contact elements (KE1, KE2), wherein the fuses provide blow-out channels in the first intermediate layer so that in the event of a thermal overloading of a fuse of the first intermediate layer, the affected fuse can vaporize through the blow-out channel.

Abstract translation: 本发明的目的是用于变阻器的多接触元件，其中多接触元件具有夹层结构，其中夹层结构在最下层具有两个或更多个接触元件，并且其中夹层结构具有至少一个共同的 连接电极，其中由电绝缘层材料制成的第一中间层至少在最下层（US）和最上层之间的段中提供，其中保险丝位于配置的第一中间层中 使得它们能够维持指定的浪涌电流，每个保险丝的指定浪涌电流小于压敏电阻器的指定浪涌电流，其中保险丝被实施为第一中间层内的通孔，其中第一中间层中的保险丝 与公共连接电极直接电接触，其中每个保险丝是直接或间接的电气 与所述接触元件（KE1，KE2）的子集接触，其中所述熔断器在所述第一中间层中提供吹出通道，使得在所述第一中间层的保险丝的热过载的情况下，受影响的保险丝可以蒸发 通过吹出通道。

公开(公告)号：US09356089B1

公开(公告)日：2016-05-31

申请号：US14632074

申请日：2015-02-26

Applicant: International Business Machines Corporation

Inventor： Jeffrey P. Gambino ,  Richard S. Graf ,  Sudeep Mandal

IPC: H01L49/02 ,  H01L21/02

CPC classification number: H01C7/108 ,  H01C7/006 ,  H01C7/1013 ,  H01C7/112 ,  H01C7/12 ,  H01C17/006 ,  H01C17/06553 ,  H01C17/12 ,  H01C17/245 ,  H01C17/288 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/762 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/62 ,  H01L23/647 ,  H01L27/0248 ,  H01L28/20 ,  H01L28/24 ,  H01L29/0649 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A structure and method for fabricating a laterally configured thin film varistor surge protection device using low temperature sputtering techniques which do not damage IC device components contiguous to the varistor being fabricated. The lateral thin film varistor may consist of a continuous layer of alternating regions of a first metal oxide layer and a second metal oxide layer formed between two laterally spaced electrodes using a low temperature sputtering process followed by a low temperature annealing process.

Abstract translation: 一种使用低温溅射技术制造横向配置的薄膜压敏电阻浪涌保护装置的结构和方法，其不会损坏与正在制造的压敏电阻相邻的IC器件部件。 横向薄膜压敏电阻可以由在第二金属氧化物层和第二金属氧化物层之间的交替区域的连续层组成，所述第二金属氧化物层和第二金属氧化物层之间形成在两个横向隔开的电极之间，使用低温溅射工艺，随后进行低温退

公开(公告)号：US20150255195A1

公开(公告)日：2015-09-10

申请号：US14721025

申请日：2015-05-26

Applicant: NGK Insulators, Ltd.

Inventor： Naokuni MURAMATSU

IPC: H01C7/10 ,  B22F3/105 ,  H01C17/00

CPC classification number: H01C7/10 ,  B22F3/105 ,  B22F2003/1051 ,  B22F2999/00 ,  C22C1/0425 ,  C22C1/0491 ,  C22C9/00 ,  H01C7/108 ,  H01C17/00 ,  B22F2202/13

Abstract: A voltage nonlinear resistive element 20 of the present invention includes a voltage nonlinear resistive material 30 composed of a copper alloy which has a two-phase structure containing a Cu phase 31 and a Cu—Zr compound phase 32 not containing a eutectic phase, and electrodes 21 and 22. The voltage nonlinear resistive material 30 may have a mosaic-shaped structure in which the Cu phase 31 and the Cu—Zr compound phase 32 are dispersed as crystals with a size of 10 μm or less in a cross-sectional view. The Cu—Zr compound phase 32 may be at least one of Cu5Zr, Cu9Zr2, and Cu8Zr3. Also, the voltage nonlinear resistive material 30 may be formed by spark plasma sintering of a Cu—Zr binary alloy powder. The voltage nonlinear resistive material 30 may contain 0.2 at % or more and 18.0 at % or less of Zr.

Abstract translation: 本发明的电压非线性电阻元件20包括由铜合金组成的电压非线性电阻材料30，该铜合金具有包含Cu相31的两相结构和不含共晶相的Cu-Zr化合物相32和电极 电压非线性电阻材料30可以具有马赛克状结构，其中Cu相31和Cu-Zr化合物相32在截面图中以10μm或更小的尺寸分散为晶体。 Cu-Zr化合物相32可以是Cu5Zr，Cu9Zr2和Cu8Zr3中的至少一种。 此外，电压非线性电阻材料30可以通过Cu-Zr二元合金粉末的放电等离子体烧结形成。 电压非线性电阻材料30可以含有0.2原子％以上且18.0原子％以下的Zr。

公开(公告)号：US20140361864A1

公开(公告)日：2014-12-11

申请号：US14369659

申请日：2013-08-27

Applicant: ULVAC, INC.

Inventor： Natsuki Fukuda ,  Kazunori Fukuju ,  Yutaka Nishioka ,  Koukou Suu

IPC: H01C7/108 ,  C23C14/08 ,  C23C14/00 ,  H01C17/06 ,  H01C17/12

CPC classification number: H01C7/108 ,  C23C14/0036 ,  C23C14/08 ,  H01C17/06 ,  H01C17/12 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

Abstract: To provide a resistance change device that can be protected from an excess current without enlarging a device size. A resistance change device 1 according to the present embodiment includes a lower electrode layer 3, an upper electrode layer 6, a first metal oxide layer 51, a second metal oxide layer 52, and a current limiting layer 4. The first metal oxide layer 51 is disposed between the lower electrode layer 3 and the upper electrode layer 6, and has a first resistivity. The second metal oxide layer 52 is disposed between the first metal oxide layer 51 and the upper electrode layer 6, and has a second resistivity higher than the first resistivity. The current limiting layer 4 is disposed between the lower electrode layer 3 and the first metal oxide layer 51, and has a third resistivity higher than the first resistivity and lower than the second resistivity.

Abstract translation: 提供一种电阻变化器件，可以免受过电流的影响，而不会增大器件尺寸。 根据本实施例的电阻改变装置1包括下电极层3，上电极层6，第一金属氧化物层51，第二金属氧化物层52和限流层4.第一金属氧化物层51 设置在下电极层3和上电极层6之间，并且具有第一电阻率。 第二金属氧化物层52设置在第一金属氧化物层51和上电极层6之间，并且具有比第一电阻率高的第二电阻率。 限流层4设置在下电极层3和第一金属氧化物层51之间，并且具有比第一电阻率高的第三电阻率并且低于第二电阻率。

公开(公告)号：US20140145123A1

公开(公告)日：2014-05-29

申请号：US14235388

申请日：2012-07-13

Applicant: Peter Gröppel ,  Steffen Lang

Inventor： Peter Gröppel ,  Steffen Lang

IPC: H01C7/10

CPC classification number: H01C7/10 ,  C08K9/02 ,  H01C7/108 ,  H01C7/112

Abstract: A varistor, or voltage-limiting composition has a polymer matrix and a particulate filler containing a partially conductive material applied to an electrically non-conductive carrier material. The carrier material has a lower density than the partially conductive material, so that the settling rate of the filler in the polymer matrix is reduced. The voltage-limiting composition can therefore also be used as a lacquer or for prepreg materials. A body which acts as a varistor may be produced using a composition of this kind by a method that includes annealing. The varistor may be used for surge arresters, in particular in medium-voltage systems, low-voltage systems, cable connections and cable fasteners.

Abstract translation: 变阻器或限压组合物具有聚合物基质和含有部分导电材料的颗粒填料，其应用于不导电的载体材料。 载体材料具有比部分导电材料低的密度，使得填料在聚合物基质中的沉降速率降低。 因此，限压组合物也可以用作漆或预浸料材料。 可以通过包括退火的方法使用这种组合物来制造充当变阻器的体。 压敏电阻可用于避雷器，特别是在中压系统，低压系统，电缆连接和电缆紧固件中。

公开(公告)号：US20130264106A1

公开(公告)日：2013-10-10

申请号：US13994069

申请日：2011-12-14

Applicant: Bruce Barton ,  Russell Barton

Inventor： Bruce Barton ,  Russell Barton

IPC: H01C7/108 ,  H01C7/12

CPC classification number: H01C7/108 ,  H01B1/08 ,  H01C1/14 ,  H01C7/1006 ,  H01C7/12

Abstract: A stacked arrangement of metal oxide varistors includes a plurality of metal oxide varistors with each metal oxide varistor of the plurality of metal oxide varistors having a first lead on a first surface and a second lead on a second surface, the first surface and the second surface being opposite facing surfaces of each metal oxide varistor. The first lead and the second lead of adjacent metal oxide varistors, when placed in a stacked arrangement, are arranged, preferably asymmetrically, so as not to interfere with one another, thereby result in a more compact stacking of metal oxide varistors, as compared to arrangements known to the state of the art. The stacked arrangement of metal oxide varistor can be mounted on printed circuit boards, in addition to a variety of other uses.

Abstract translation: 金属氧化物变阻器的堆叠布置包括多个金属氧化物变阻器，其中多个金属氧化物变阻器的每个金属氧化物变阻器具有在第一表面上的第一引线和在第二表面上的第二引线，第一表面和第二表面 与每个金属氧化物变阻器相对的表面。 相邻的金属氧化物变阻器的第一引线和第二引线当以堆叠布置放置时，优选地是不对称的，以便彼此不干扰，从而导致金属氧化物变阻器的更紧凑堆叠，与 现有技术已知的布置。 除了各种其他用途之外，金属氧化物变阻器的堆叠布置可以安装在印刷电路板上。

公开(公告)号：US08508326B2

公开(公告)日：2013-08-13

申请号：US13379780

申请日：2011-11-08

Applicant: Guo Yao Kang ,  Hui Ping Guo ,  Bing Yu Shi ,  Wen Hu Shi ,  Rong Huang ,  Ya Ping Guo

Inventor： Guo Yao Kang ,  Hui Ping Guo ,  Bing Yu Shi ,  Wen Hu Shi ,  Rong Huang ,  Ya Ping Guo

IPC: H01C7/10

CPC classification number: H01C7/10 ,  H01C7/102 ,  H01C7/108

Abstract: The present invention may provide a surge protection device, which may include a reference node, first, second, and third nodes, a first arcing section (GAP) coupled between the first and second nodes, and configured to receive a surge voltage from the first node, a first metal oxide varistor (MOV) coupled between the second and reference nodes, and configured to reduce the surge voltage to a first sub-surge voltage at the second node, a second arcing section (GAP) coupled between the second and third nodes, and configured to receive the first sub-surge voltage from the second node, and a second metal oxide varistor (MOV) coupled between the third and reference nodes, and configured to reduce the first sub-surge voltage to a second sub-surge voltage at the third node.

Abstract translation: 本发明可以提供浪涌保护装置，其可以包括参考节点，第一，第二和第三节点，耦合在第一和第二节点之间的第一电弧部分（GAP），并且被配置为从第一节点 节点，耦合在第二和参考节点之间的第一金属氧化物变阻器（MOV），并且被配置为将浪涌电压降低到第二节点处的第一次浪涌电压;耦合在第二和第三节点之间的第二电弧部分（GAP） 并且被配置为从第二节点接收第一子浪涌电压，以及耦合在第三参考节点和参考节点之间的第二金属氧化物变阻器（MOV），并且被配置为将第一子浪涌电压降低到第二子浪涌电压 电压在第三节点。

公开(公告)号：US08263432B2

公开(公告)日：2012-09-11

申请号：US11798800

申请日：2007-05-17

Applicant: Ching-Hohn Lien ,  Cheng-Tsung Kuo ,  Jun-Nan Lin ,  Jie-An Zhu ,  Li-Yun Zhang ,  Wei-Cheng Lien

Inventor： Ching-Hohn Lien ,  Cheng-Tsung Kuo ,  Jun-Nan Lin ,  Jie-An Zhu ,  Li-Yun Zhang ,  Wei-Cheng Lien

IPC: H01L21/02

CPC classification number: H01C7/1006 ,  H01C7/108 ,  H01C7/112 ,  H01C7/115 ,  H01C7/18 ,  H01L27/0288 ,  H01L28/20 ,  Y10T428/2985 ,  Y10T428/2989 ,  Y10T428/2991

Abstract: A material composition having a core-shell microstructure suitable for manufacturing a varistor having outstanding electrical properties, the core-shell microstructure of the material composition at least comprising a cored-structure made of a conductive or semi-conductive material and a shelled-structure made from a glass material to wrap the cored-structure, and electrical properties of the varistors during low temperature of sintering process can be decided and designated by precisely controlling the size of the grain of the cored-structure and the thickness and insulation resistance of the insulating layer of the shelled-structure of material composition.

Abstract translation: 具有适于制造具有优异电性能的变阻器的核 - 壳微结构的材料组合物，所述材料组合物的芯 - 壳微结构至少包括由导电或半导电材料制成的芯结构和制成的壳形结构 从玻璃材料包裹芯结构，并且可以通过精确控制芯结构的晶粒尺寸和绝缘体的厚度和绝缘电阻来确定和指定压敏电阻在低温烧结过程中的电性能 层的材料组成的贝壳结构。

公开(公告)号：US20120144634A1

公开(公告)日：2012-06-14

申请号：US12968063

申请日：2010-12-14

Applicant: Bruce Charles Barton ,  Russell Barton

Inventor： Bruce Charles Barton ,  Russell Barton

IPC: H01L21/00

CPC classification number: H01C7/108 ,  H01B1/08 ,  H01C1/14 ,  H01C7/1006 ,  H01C7/12

Abstract: Spacing of metal oxide varistors (“MOVs”) when used for surge suppression or surge protection will determine the number that can be used and the amount of protection achieved in a limited space. By changing the way the leads are attached to the metal oxide varistors (“MOVs”), tighter spacing, higher densities, and more surge suppression and protection can be placed in the same sized location. Leads are attached to metal oxide varistors (“MOVs”) to allow the metal oxide varistors (“MOVs”) to be placed side by side without the lead of one metal oxide varistor (“MOV”) interfering with the lead of a different metal oxide varistor (“MOV”)

Abstract translation: 当用于浪涌抑制或浪涌保护时，金属氧化物变阻器（“MOV”）的间距将决定可以使用的数量和在有限的空间内实现的保护量。 通过改变引线连接到金属氧化物变阻器（“MOV”）的方式，更紧密的间距，更高的密度和更多的浪涌抑制和保护可以放置在相同尺寸的位置。 引线连接到金属氧化物变阻器（“MOV”），以使金属氧化物变阻器（“MOV”）并排放置，而不会导致一个金属氧化物变阻器（“MOV”）的引线干扰不同金属的引线 氧化物变阻器（“MOV”）