Laser annealing mask and method for smoothing an annealed surface
    91.
    发明申请
    Laser annealing mask and method for smoothing an annealed surface 有权
    激光退火掩模和平滑退火表面的方法

    公开(公告)号:US20030196589A1

    公开(公告)日:2003-10-23

    申请号:US10124826

    申请日:2002-04-17

    CPC分类号: C30B29/06 C30B13/00

    摘要: A mask with sub-resolution aperture features and a method for smoothing an annealed surface using a sub-resolution mask pattern are provided. The method comprises: supplying a laser beam having a first wavelength; supplying a mask with a first mask section having apertures with a first dimension and a second mask section with apertures having a second dimension, less than the first dimension; applying a laser beam having a first energy density to a substrate region; melting a substrate region in response to the first energy density; crystallizing the substrate region; applying a diffracted laser beam to the substrate region; and, in response to the diffracted laser beam, smoothing the substrate region surface. In some aspects of the method, applying a diffracted laser beam to the substrate area includes applying a diffracted laser beam having a second energy density, less than the first energy density, to the substrate region. The second energy density is in the range of 40% to 70% of the first energy density, and preferably in the range of 50% to 60% of the first energy density.

    摘要翻译: 提供了具有子分辨率孔径特征的掩模和使用子分辨率掩模图案来平滑退火表面的方法。 该方法包括:提供具有第一波长的激光束; 向具有具有第一尺寸的孔的第一掩模部分和具有小于所述第一尺寸的具有第二尺寸的孔的第二掩模部分提供掩模; 将具有第一能量密度的激光束施加到衬底区域; 响应于第一能量密度熔化基底区域; 使衬底区域结晶; 将衍射激光束施加到所述衬底区域; 并且响应于衍射激光束,平滑基板区域表面。 在该方法的一些方面中,将衍射激光束施加到衬底区域包括将具有小于第一能量密度的第二能量密度的衍射激光束施加到衬底区域。 第二能量密度在第一能量密度的40%至70%的范围内,优选在第一能量密度的50%至60%的范围内。

    Group III nitride based semiconductor substrate and process for manufacture thereof
    92.
    发明申请
    Group III nitride based semiconductor substrate and process for manufacture thereof 有权
    III族氮化物基半导体衬底及其制造方法

    公开(公告)号:US20030183157A1

    公开(公告)日:2003-10-02

    申请号:US10395766

    申请日:2003-03-24

    摘要: To provide a semiconductor substrate of a group III nitride with a little warp, this invention provides a process comprising such steps of: epitaxial-growing a GaN layer 33 with a GaN low temperature grown buffer layer 32 upon a sapphire substrate 31; removing the sapphire substrate 31, the GaN buffer layer 32 and a small portion of the GaN layer 33 from the substrate taken out of a growth reactor to obtain a self-supporting GaN substrate 35; and after that, heat-treating the GaN substrate 35 by putting it into an electric furnace under the NH3 atmosphere at 1200null C. for 24 hours; which leads to a marked reduction of the warp of the self-supporting GaN substrate 35 such that dislocation densities of its obverse and reverse surface are 4null107 cmnull2 and 8null105 cmnull2, and thereby such a low ratio of dislocation densities of 50 is well-controlled.

    摘要翻译: 为了提供具有少许翘曲的III族氮化物的半导体衬底,本发明提供了一种方法,其包括以下步骤:在蓝宝石衬底31上将GaN层33与GaN低温生长缓冲层32进行外延生长; 从生长反应器中取出蓝宝石衬底31,GaN缓冲层32和一部分GaN层33,以获得自支撑GaN衬底35; 之后,通过在氮气气氛下在1200℃下将其放入电炉中进行24小时,对GaN衬底35进行热处理; 这导致自支撑GaN衬底35的翘曲的显着减小,使得其正面和反面的位错密度为4×10 7 cm -2和8×10 5 cm -2,从而 如此低的位错密度比率为50是很好的控制。

    Method for manufacturing single-crystal-silicon wafers
    93.
    发明申请
    Method for manufacturing single-crystal-silicon wafers 有权
    制造单晶硅片的方法

    公开(公告)号:US20030164139A1

    公开(公告)日:2003-09-04

    申请号:US10333970

    申请日:2003-01-24

    摘要: According to the present invention, there are provided a method for producing a silicon single crystal wafer which contains oxygen induced defects by subjecting a silicon single crystal wafer containing interstitial oxygen to a heat treatment wherein the heat treatment includes at least a step of performing a heat treatment using a resistance-heating type heat treatment furnace and a step of performing a heat treatment using a rapid heating and rapid cooling apparatus, and a silicon single crystal wafer produced by the method. There can be provided a method for producing a silicon single crystal wafer which has a DZ layer of higher quality compared with a conventional wafer in a wafer surface layer part and has oxygen induced defects at a sufficient density in a bulk part and the silicon single crystal wafer.

    摘要翻译: 根据本发明,提供了一种通过对含有间隙氧的硅单晶晶片进行热处理而含有氧诱发缺陷的硅单晶晶片的制造方法,其中,热处理至少包括进行热处理的步骤 使用电阻加热型热处理炉的处理以及使用快速加热和快速冷却装置进行热处理的步骤,以及通过该方法制造的硅单晶晶片。 可以提供一种制造硅单晶晶片的方法,其具有与晶片表面层部分中的常规晶片相比具有更高质量的DZ层,并且在体积部分中具有足够密度的氧诱发缺陷,并且硅单晶 晶圆。

    In-situ post epitaxial treatment process

    公开(公告)号:US20030159649A1

    公开(公告)日:2003-08-28

    申请号:US10388270

    申请日:2003-03-12

    发明人: Gerald R. Dietze

    摘要: A process for forming an epitaxial layer on a semiconductor wafer substrate is provided. The process comprises providing a semiconductor wafer substrate and an area for forming an epitaxial layer on said semiconductor wafer substrate. The formation area consists essentially of an epitaxial layer process chamber. The semiconductor wafer substrate is introduced into the epitaxial layer process chamber and an epitaxial layer is formed on at least one surface of the semiconductor wafer substrate. At least one epitaxial layer surface is substantially hydrophobic. Then, a chemical reagent is introduced into said epitaxial layer process chamber. The chemical reagent reacts with the epitaxial layer surface in situ to form an outer layer.

    Method of producing a body of semiconductor material having a reduced mean free path length
    96.
    发明申请
    Method of producing a body of semiconductor material having a reduced mean free path length 有权
    具有减小的平均自由路径长度的半导体材料体的制造方法

    公开(公告)号:US20030154912A1

    公开(公告)日:2003-08-21

    申请号:US10392509

    申请日:2003-03-20

    摘要: A method for producing a body (1) consisting of doped semiconductor material having a defined mean free path length (lambda n) for free charge carriers (CP), and a mean free path length (lambda r) for the free charge carriers (CP) which is smaller than the defined mean free path length (lambda n) is disclosed. An epitactic crystal layer (20) consisting of doped semiconductor material is produced on a substrate crystal (10) consisting of semiconductor material having the defined mean free path length (lambda n), said crystal layer having, at least locally, a mean free path length (lambda r) for the free charge carriers (CP) which is smaller than the defined mean free path length (lambda n). The body (1) can also be produced by joining two crystal bodies (10null, 10null) consisting of doped semiconductor material.

    摘要翻译: 一种由自由电荷载体(CP)具有确定的平均自由路径长度(λn)和自由电荷载体(CP)的平均自由路径长度(λr)组成的掺杂半导体材料制成的本体(1)的方法, ),其小于所定义的平均自由路径长度(λn)。 在由具有确定的平均自由程长度(λn)的半导体材料构成的衬底晶体(10)上产生由掺杂半导体材料构成的上
    覆晶体层(20),所述晶体层至少局部地具有平均自由程 自由电荷载体(CP)的长度(λr)小于规定的平均自由路径长度(λn)。 主体(1)也可以通过连接由掺杂半导体材料组成的两个晶体(10',10“)来制造。

    Method for locally modifying electronic and optoelectronic properties of crystalline materials an devices made from such materials
    97.
    发明申请
    Method for locally modifying electronic and optoelectronic properties of crystalline materials an devices made from such materials 有权
    用于局部改变结晶材料的电子和光电性能的方法由这种材料制成的器件

    公开(公告)号:US20030150376A1

    公开(公告)日:2003-08-14

    申请号:US10297115

    申请日:2003-04-07

    摘要: An electronic or optoelectronic device fabricated from a crystalline material in which a parameter of a bandgap characteristic of said crystalline material has been modified locally by introducing distortions on an atomic scale in the lattice structure of said crystalline material and the electronic and/or optoelectronic parameters of said device are dependent on the modification of said bandgap is exemplified by a radiation emissive optoelectronic semiconductor device which comprises a junction (10) formed from a p-type layer (11) and an n-type layer (12), both formed from indirect bandgap semiconductor material. The p-type layer (11) contains an array of dislocation loops which create a strain field to confine spatially and promote radiative recombination of the charge carriers.

    摘要翻译: 由结晶材料制造的电子或光电子器件,其中所述结晶材料的带隙特征的参数已经通过在所述结晶材料的晶格结构中引入原子尺度的失真而局部地修饰,并且电子和/或光电参数 所述器件取决于所述带隙的修改,例如包括由p型层(11)形成的结(10)和n型层(12)的辐射发射光电子半导体器件,两者都由间接形成 带隙半导体材料。 p型层(11)包含位错环的阵列,其产生应变场以在空间上限制并促进电荷载体的辐射复合。

    Cubic (zinc-blende) aluminum nitride and method of making same
    98.
    发明申请
    Cubic (zinc-blende) aluminum nitride and method of making same 有权
    立方(锌辉石)氮化铝及其制造方法

    公开(公告)号:US20030145784A1

    公开(公告)日:2003-08-07

    申请号:US10364811

    申请日:2003-02-10

    摘要: Device quality, single crystal film of cubic zinc-blende aluminum nitride (AlN) is deposited on a cubic substrate, such as a silicon (100) wafer by plasma source molecular beam epitaxy (PSMBE). The metastable zinc-blende form of AlN is deposited on the substrate at a low temperature by a low energy plasma beam of high-energy activated aluminum ions and nitrogen ion species produced in a molecular beam epitaxy system by applying a pulsed d.c. power to a hollow cathode source. In this manner, films having a thickness of at least 800 null were produced. The lattice parameter of as-deposited films was calculated to be approximately 4.373 null which corresponds closely to the theoretical calculation (4.38 null) for cubic zinc-blende AlN. An interfacial layer of silicon carbide, specifically the cubic 3CnullSiC polytype, interposed between the epitaxial film of zinc-blende AlN and the Si(100) wafer provides a template for growth and a good lattice match. The epitaxial layer of zinc-blende AlN has been characterized for its physical and optical properties. As a result, experimental data confirmed that zinc-blende AlN is an indirect semiconductor and has a bandgap about 5.34 eV. Due to the extraordinary piezoelectric properties of zinc-blende AlN, an illustrative device embodiment is a surface acoustic wave (SAW) device comprising interdigitated electrodes deposited by conventional means on the surface of the epitaxial layer of zinc-blende AlN to convert an electrical signal to a surface acoustic wave and vice versa.

    摘要翻译: 通过等离子体源分子束外延(PSMBE)将器件质量的立方氮化锌(AlN)单晶膜沉积在诸如硅(100)晶片的立方体衬底上。 亚稳态的闪锌矿形式的AlN在低温下通过施加脉冲直流的分子束外延系统中产生的高能激活铝离子和氮离子种类的低能量等离子体束沉积在衬底上。 电源到空心阴极源。 以这种方式制备厚度至少为800的膜。 计算沉积膜的晶格参数约为4.373Å,这与立方zinc e e AlN的理论计算(4.38Å)相当。 插入在锌闪光体AlN的外延膜和Si(100)晶片之间的碳化硅界面层,特别是立方3C-SiC多型,提供了用于生长和良好晶格匹配的模板。 闪锌矿AlN的外延层的物理和光学性质已被表征。 结果,实验数据证实了闪锌矿AlN是间接的半导体,并具有约5.34eV的带隙。 由于锌闪光体AlN的非凡的压电性能,说明性的器件实施例是表面声波(SAW)器件,其包括通过常规方法在锌闪光体AlN的外延层的表面上沉积的叉指电极,以将电信号转换为 表面声波,反之亦然。

    Selective growth method, and semiconductor light emitting device and fabrication method thereof
    99.
    发明申请
    Selective growth method, and semiconductor light emitting device and fabrication method thereof 有权
    选择性生长方法和半导体发光器件及其制造方法

    公开(公告)号:US20030140846A1

    公开(公告)日:2003-07-31

    申请号:US10345684

    申请日:2003-01-16

    摘要: In a selective growth method, growth interruption is performed at the time of selective growth of a crystal layer on a substrate. Even if the thickness distribution of the crystal layer becomes non-uniform at the time of growth of the crystal layer, the non-uniformity of the thickness distribution of the crystal layer can be corrected by inserting the growth interruption. As a result of growth interruption, an etching rate at a thick portion becomes higher than that at a thin portion, to eliminate the difference in thickness between the thick portion and the thin portion, thereby solving the problem associated with degradation of characteristics due to a variation in thickness of the crystal layer, for example, an active layer. The selective growth method is applied to fabrication of a semiconductor light emitting device including an active layer as a crystal layer formed on a crystal layer having a three-dimensional shape by selective growth.

    摘要翻译: 在选择性生长方法中,在衬底上的晶体层的选择性生长时进行生长中断。 即使在晶体层生长时晶体层的厚度分布变得不均匀,也可以通过插入生长中断来校正晶体层的厚度分布的不均匀性。 作为生长中断的结果,厚部分的蚀刻速率变得比薄部分的蚀刻速率高,以消除厚部分和薄部分之间的厚度差,从而解决与由于 晶体层的厚度变化,例如活性层。 选择生长方法用于制造半导体发光器件,该半导体发光器件包括通过选择性生长形成在具有三维形状的晶体层上的作为晶体层的有源层。

    Tunable CVD diamond structures
    100.
    发明申请
    Tunable CVD diamond structures 有权
    可调谐CVD金刚石结构

    公开(公告)号:US20030131787A1

    公开(公告)日:2003-07-17

    申请号:US10328987

    申请日:2002-12-24

    摘要: Monocrystalline diamond, adapted for use as in applications such as semiconductor devices, optical waveguides, and industrial applications, in the form of a single crystalline diamond structure having one or more diamond layers, at least one of which is formed by a CVD process. The diamond layers are nulllattice-matchednull or nulllattice-mismatchednull to each other to provide a desired level of strain.

    摘要翻译: 单晶金刚石,其适用于诸如半导体器件,光波导和工业应用的应用中,呈单晶金刚石结构形式,其具有一个或多个金刚石层,其中至少一个通过CVD工艺形成。 金刚石层彼此“晶格匹配”或“晶格失配”,以提供所需的应变水平。