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公开(公告)号：US20190335269A1
公开(公告)日：2019-10-31
申请号：US16399757
申请日：2019-04-30
Applicant: AVNERA CORPORATION
Inventor： Christopher James O'Connor
Abstract: A system for operating an earbud can include a primary processor to control the earbud and operate in a low-power state, a microphone to receive an input, a casing having a speaker configured to provide audio output from the primary processor to a user's ear, the casing being configured to maintain a position in a user's ear canal to maintain a position of the speaker within the user's ear, a listening sub-system to convert the input into an output signal, and a neural net processor to receive the output signal from the listening sub-system and determine whether to generate a wake signal based on the received output signal.
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公开(公告)号：US10403279B2
公开(公告)日：2019-09-03
申请号：US15706178
申请日：2017-09-15
Applicant: Avnera Corporation
Inventor： Xudong Zhao , Alexander C. Stange , Shawn O'Connor , Ali Hadiashar
Abstract: A system for detecting and capturing voice commands, the system comprising a voice-activity detector (VAD) configured to receive a VAD-received digital-audio signal; determine the amplitude of the VAD-received digital-audio signal; compare the amplitude of the VAD-received digital-audio signal to a first threshold and to a second threshold; withhold a VAD interrupt signal when the amplitude of the VAD-received digital-audio signal does not exceed the first threshold or the second threshold; generate the VAD interrupt signal when the amplitude of the VAD-received digital-audio signal exceeds the first threshold and the second threshold; and perform spectral analysis of the VAD-received digital-audio signal when the amplitude of the VAD-received digital-audio signal is between the first threshold and the second threshold.
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公开(公告)号：US20190235560A1
公开(公告)日：2019-08-01
申请号：US16383247
申请日：2019-04-12
Applicant: Avnera Corporation
Inventor： Christopher Donald Nilson
IPC: G05F3/16 , H03K17/687
CPC classification number: G05F3/16 , G05F1/468 , H03K17/687
Abstract: A start-up circuit for a bandgap reference voltage generator circuit, including a first native transistor with a drain connected to a supply voltage of the bandgap reference voltage generator circuit and a source connected to a gate of the first native transistor; a low voltage transistor with a source connected to ground, a drain connected to the source of the first native transistor, and a gate connected to a resistor; a second native transistor with a source connected to the resistor, a gate connected to the source of the first native transistor; a high voltage transistor with a drain connected to a drain of the second native transistor and a source connected to the supply voltage; and a transistor with a gate connected to the gate of the first high voltage transistor and a drain which provides a start-up current for the bandgap reference voltage generator circuit.
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104.发明申请公开(公告)号：US20190215003A1
公开(公告)日：2019-07-11
申请号：US16357753
申请日：2019-03-19
Applicant: Avnera Corporation
Inventor： Wai Lee , Garry N. Link
CPC classification number: H03M1/462 , H03M1/0626 , H03M1/0695 , H03M1/124 , H03M1/145 , H03M1/164 , H03M1/181 , H03M1/468 , H03M1/806
Abstract: The disclosure includes a successive approximation register (SAR) analog to digital converter (ADC). The SAR ADC includes a sampling network to store a sample of an analog signal. The SAR ADC also includes a comparator to successively compare the sample to reference values to determine a digital value corresponding to the sample of the analog signal. The comparator employs a plurality of comparator preamplifiers. The comparator also includes a programmable trim filter. The programmable trim filter is selectively set to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with a preamplifier settling time subceeding a preamplifier settling threshold.
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公开(公告)号：US20190214950A1
公开(公告)日：2019-07-11
申请号：US16294652
申请日：2019-03-06
Applicant: Avnera Corporation
Inventor： Patrick Allen Quinn
CPC classification number: H03F3/185 , H02M3/158 , H03F1/0233 , H03F3/181 , H03F3/217 , H03F3/2171 , H03F2200/03
Abstract: A device and method are disclosed for modulating a power converter based on an audio signal to directly drive a speaker with a differential audio output signal. A first modulation signal and a second modulation signal are generated based on an input audio signal so that the first and second modulation signals are complementary signals to each other. In one embodiment, a feedback signal, such as an acoustic feedback signal from the speaker, is also used to generate the first and second modulation signals. A power supply voltage is modulated with the first modulation signal to generate a first voltage signal. The power supply voltage is also modulated with the second modulation signal to generate a second voltage signal. The first and second voltage signals form a differential audio signal that is used to drive the speaker. Alternatively, the power converter can drive a speaker with a single-ended output signal.
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Patent Agency Ranking
公开(公告)号：US20190174218A1
公开(公告)日：2019-06-06
申请号：US16174067
申请日：2018-10-29
Applicant: Avnera Corporation
Inventor： Amit Kumar , Shankar Rathoud , Mike Wurtz , Eric Etheridge , Eric Sorensen
IPC: H04R1/10 , H04R3/00 , H04R29/00 , G10K11/178
CPC classification number: H04R1/1041 , G10K11/178 , G10K2210/1081 , G10K2210/3026 , G10K2210/3027 , H04R1/1008 , H04R3/00 , H04R29/001 , H04R2460/01
Abstract: Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric si generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.
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公开(公告)号：US20190174006A1
公开(公告)日：2019-06-06
申请号：US16173801
申请日：2018-10-29
Applicant: Avnera Corporation
Inventor： Eric Sorensen , Thomas Irrgang , Mike Wurtz
Abstract: A portable speakerphone having a housing, a receiving transducer, an electrical cable, a transmitting transducer, and a processor. The receiving transducer is affixed to the housing and is configured to receive a first electrical signal from a mobile device. The electrical cable is coupled to and extends from the housing. The transmitting transducer is affixed to the electrical cable, remote from the housing. Also, the transmitting transducer is configured to transmit a second electrical signal, and the second electrical signal is based in part on the first electrical signal. The processor is configured to suppress acoustic echo by modifying the second electrical signal. The processor is also configured to output the modified second electrical signal to the mobile device. A related method is also disclosed.
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公开(公告)号：US20190173486A1
公开(公告)日：2019-06-06
申请号：US16174088
申请日：2018-10-29
Applicant: Avnera Corporation
Inventor： Jianping Wen , Ali Hadiashar , Eric King , David Entrikin , Wai Lang Lee
IPC: H03M3/00
Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.
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109.发明申请公开(公告)号：US20190173483A1
公开(公告)日：2019-06-06
申请号：US16174071
申请日：2018-10-29
Applicant: Avnera Corporation
Inventor： Wai Lee , Garry N. Link , Jianping Wen
Abstract: The disclosure includes an analog to digital converter (ADC). The ADC includes a comparator to compare sample values of an analog signal in an analog domain to reference values to determine digital values in a digital domain. The digital values correspond to the analog signal and may be determined according to successive approximation. The ADC also includes chop switches to modulate the analog signal to increase a frequency of flicker noise in the analog domain. The ADC also includes an un-chop switch to demodulate the digital values in the digital domain prior filtration of the flicker noise by a digital filter.
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110.发明授权公开(公告)号：US10263629B2
公开(公告)日：2019-04-16
申请号：US15991871
申请日：2018-05-29
Applicant: Avnera Corporation
Inventor： Jianping Wen , Gordon Ueki
Abstract: The disclosure includes an analog to digital converter (ADC) comprising a successive approximation register (SAR) unit including a capacitive network to take a sample of an analog signal and a comparator to approximate a digital value based on the analog signal sample via successive comparison. The disclosure also includes a programmable sequencer. The sequencer includes a control memory containing control signal states indicating control signals to operate the SAR unit. The sequencer also includes a program memory including sequence instructions defining a duty cycle for the SAR unit by referencing the control signal states in the control memory. The sequencer also includes a processing circuit to apply control signals according to the control signal states in an order defined by the sequence instructions to manage a sequence of operations at the SAR unit according to the duty cycle to control the ADC.
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