公开(公告)号：US20080318371A1

公开(公告)日：2008-12-25

申请号：US12198111

申请日：2008-08-25

Applicant: Chien-Ting Lin ,  Li-Wei Cheng ,  Che-Hua Hsu ,  Yao-Tsung Huang ,  Guang-Hwa Ma

Inventor： Chien-Ting Lin ,  Li-Wei Cheng ,  Che-Hua Hsu ,  Yao-Tsung Huang ,  Guang-Hwa Ma

IPC: H01L21/8238

CPC classification number: H01L21/823842 ,  H01L21/823835 ,  H01L21/823871 ,  H01L29/4966 ,  H01L29/665 ,  H01L29/7843

Abstract: A semiconductor device includes a first gate structure including a gate dielectric layer directly contacting the substrate, a bottom electrode on the gate dielectric layer and a top electrode on the bottom electrode, and a second gate structure including a gate dielectric layer directly contacting the substrate and a gate electrode on the gate dielectric layer.

Abstract translation: 半导体器件包括：第一栅极结构，包括直接接触衬底的栅极电介质层，栅极电介质层上的底部电极和底部电极上的顶部电极;以及第二栅极结构，包括直接接触衬底的栅介质层和 栅电介质层上的栅电极。

公开(公告)号：US20080237809A1

公开(公告)日：2008-10-02

申请号：US11693455

申请日：2007-03-29

Applicant: Yao-Tsung Huang ,  Chien-Ting Lin ,  Che-Hua Hsu ,  Guang-Hwa Ma

Inventor： Yao-Tsung Huang ,  Chien-Ting Lin ,  Che-Hua Hsu ,  Guang-Hwa Ma

IPC: H01L29/06 ,  C30B1/00

CPC classification number: H01L29/045 ,  C30B1/023 ,  C30B29/06 ,  C30B33/00 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/26506 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/7847

Abstract: A method of fabricating a hybrid orientation substrate is described. A silicon substrate with a first orientation having a silicon layer with a second orientation directly thereon is provided, and then a stress layer is formed on the silicon layer. A trench is formed between a first portion and a second portion of the silicon layer through the stress layer and into the substrate. The first portion of the silicon layer is amorphized. A SPE process is performed to recrystallize the amorphized first portion of the silicon layer to be a recrystallized layer with the first orientation. An annealing process is performed at a temperature lower than 1200° C. to convert a surface layer of the second portion of the silicon layer to a strained layer. The trench is filled with an insulating material after the SPE process or the annealing process, and the stress layer is removed.

Abstract translation: 描述了制造混合取向衬底的方法。 提供具有第一取向的硅衬底，其具有直接在其上的第二取向的硅层，然后在硅层上形成应力层。 在硅层的第一部分和第二部分之间通过应力层形成沟槽并进入衬底。 硅层的第一部分是非晶化的。 进行SPE工艺，以将第一取向的硅层的非晶化第一部分重结晶为再结晶层。 在低于1200℃的温度下进行退火处理，以将硅层的第二部分的表面层转变成应变层。 在SPE工艺或退火工艺之后，沟槽中填充有绝缘材料，应力层被去除。

公开(公告)号：US20080220595A1

公开(公告)日：2008-09-11

申请号：US11684634

申请日：2007-03-11

Applicant: Chien-Ting Lin ,  Che-Hua Hsu ,  Yao-Tsung Huang ,  Guang-Hwa Ma

Inventor： Chien-Ting Lin ,  Che-Hua Hsu ,  Yao-Tsung Huang ,  Guang-Hwa Ma

IPC: H01L21/04

CPC classification number: H01L21/02694 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/02658 ,  H01L21/02667 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/823807 ,  H01L29/7843

Abstract: A method for fabricating a hybrid orientation substrate includes steps of providing a direct silicon bonding (DSB) wafer having a first substrate with (100) crystalline orientation and a second substrate with (110) crystalline orientation directly bonded on the first substrate, forming and patterning a first blocking layer on the second substrate to define a first region not covered by the first blocking layer and a second region covered by the first blocking layer, performing an amorphization process to transform the first region of the second substrate into an amorphized region, and performing an annealing process to recrystallize the amorphized region into the orientation of the first substrate and to make the second region stressed by the first blocking layer.

公开(公告)号：US20070117304A1

公开(公告)日：2007-05-24

申请号：US11624703

申请日：2007-01-19

Applicant: Jeng-Huey Hwang ,  Wei-Tsun Shiau ,  Chien-Ting Lin ,  Jiunn-Ren Hwang

Inventor： Jeng-Huey Hwang ,  Wei-Tsun Shiau ,  Chien-Ting Lin ,  Jiunn-Ren Hwang

IPC: H01L21/8238 ,  H01L21/31

CPC classification number: H01L21/31116 ,  H01L21/31111 ,  H01L21/31122 ,  H01L21/823462 ,  H01L21/823481 ,  H01L29/517 ,  H01L29/78 ,  Y10S438/906

Abstract: A wafer has a trench, a STI layer formed in the trench, an HfO2-containing gate dielectric covering the wafer and the STI layer, a gate electrode formed on the HfO2-containing gate dielectric, and at least a spacer formed beside the gate electrode. An ion bombardment utilizing Ar, He, O2, CHF3 or mixture thereof is performed to convert the exposed HfO2-containing gate dielectric to an intergraded layer, and a wet chemical is utilized to remove the intergraded layer.

Abstract translation: 晶片具有沟槽，形成在沟槽中的STI层，覆盖晶片和STI层的含HfO 2的栅极电介质，形成在含HfO 2的栅极电介质上的栅电极和至少形成在栅电极旁边的间隔物 。 进行利用Ar，He，O 2，CHF 3或其混合物的离子轰击，以将暴露的含HfO 2的栅极电介质转化为层间化合物，并使用湿化学品去除层间化合物。

公开(公告)号：US20060093805A1

公开(公告)日：2006-05-04

申请号：US11212737

申请日：2005-08-29

Applicant: Chien-Ting Lin ,  Kuo-Yuan Hsu

Inventor： Chien-Ting Lin ,  Kuo-Yuan Hsu

IPC: B32B25/02

CPC classification number: C08J5/24 ,  B32B15/08 ,  B32B15/12 ,  B32B15/14 ,  B32B15/20 ,  B32B27/10 ,  B32B27/12 ,  B32B27/18 ,  B32B27/26 ,  B32B27/285 ,  B32B2250/03 ,  B32B2260/021 ,  B32B2260/028 ,  B32B2260/046 ,  B32B2262/101 ,  B32B2264/102 ,  B32B2307/204 ,  B32B2307/306 ,  B32B2457/08 ,  H05K1/0373 ,  H05K1/162 ,  H05K2201/012 ,  H05K2201/0209 ,  H05K2201/0239 ,  Y10T428/249933

Abstract: The present invention provides a dielectric constant adjustable resin composition, a pre-preg, and a copper clad laminate utilizing. The dielectric constant adjustable resin composition includes a curable polyphenylene ether (PPE) resin, a curing agent, a free radical initiator, and a dielectric ceramic powder with a particle size of 0.1 to 2 m um modified with a lipophilic modifier.

Abstract translation: 本发明提供一种介电常数可调节树脂组合物，预浸料和覆铜层压板。 介电常数可调树脂组合物包括可固化聚苯醚（PPE）树脂，固化剂，自由基引发剂和用亲油改性剂改性的0.1至2μm的粒度的电介质陶瓷粉末。

公开(公告)号：US06190982B1

公开(公告)日：2001-02-20

申请号：US09492670

申请日：2000-01-28

Applicant: Hua-Chou Tseng ,  Chien-Ting Lin

Inventor： Hua-Chou Tseng ,  Chien-Ting Lin

IPC: H01L21336

CPC classification number: H01L29/6659 ,  H01L21/28247 ,  H01L29/665

Abstract: The present invention relates to a method of fabricating a MOS transistor on a semiconductor wafer. The semiconductor wafer comprises a silicon substrate. A gate is first formed in a predetermined area on the surface of the semiconductor wafer. A first ion implantation process is then performed to form a doped area on the surface of the silicon substrate adjacent to the gate, the doped area serving as a heavily doped drain (HDD). A uniform and oxygen-free dielectric layer is formed on the surface of the semiconductor wafer that covers the gate. A spacer is formed on each wall of the gate. Finally, a second ion implantation process is performed to form a source and a drain on the surface of the silicon substrate adjacent to the spacer.

Abstract translation: 本发明涉及在半导体晶片上制造MOS晶体管的方法。 半导体晶片包括硅衬底。 首先在半导体晶片的表面上的预定区域中形成栅极。 然后执行第一离子注入工艺以在硅衬底的与栅极相邻的表面上形成掺杂区域，掺杂区域用作重掺杂漏极（HDD）。 在覆盖栅极的半导体晶片的表面上形成均匀的无氧介电层。 在门的每个壁上形成间隔物。 最后，进行第二离子注入工艺以在硅衬底的与间隔物相邻的表面上形成源极和漏极。

公开(公告)号：US11946630B2

公开(公告)日：2024-04-02

申请号：US17216779

申请日：2021-03-30

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: F21V29/77 ,  F21Y115/10

CPC classification number: F21V29/773 ,  F21Y2115/10

Abstract: Provided is an LED lamp heat dissipation structure, including: a metal plate and an LED lamp substrate. The metal plate has a first predetermined shape portion, wherein a center of the metal plate is defined to have a second predetermined shape portion, an outer edge of the metal plate is formed to be a tapered portion with outward corrugations and with a center at the second predetermined shape portion, the tapered portion has a predetermined inclination angle with respect to the second predetermined shape portion, two surfaces of the second predetermined are defined as an inner surface and an outer surface, respectively, and the tapered portion surrounds the inner surface to define an inner space. The LED lamp substrate is closely attached to the inner surface. The heat generated from the LED lamp substrate can be efficiently transferred to an ambient air through the LED lamp heat dissipation structure.

公开(公告)号：US11739778B2

公开(公告)日：2023-08-29

申请号：US16856383

申请日：2020-04-23

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: F16B7/14

CPC classification number: F16B7/1418

Abstract: Provided is a telescopic tube having a stabilizing structure, including: a first tube having an internal and external end, wherein at least three longitudinal stabilizing lines are protruded from an outer wall of the internal end, and at least one stabilizing line has a blocking surface disposed at one end thereof near the external end; and a second tube having an inner diameter larger than an outer diameter of the first tube and a diameter of an outer periphery of the stabilizing lines, and having an upper and lower end, wherein the upper end is provided with a blocking portion having an opening. The second tube is sleeved outside the first tube, the external end penetrates through the opening to expose outside the second tube, and the internal end remains therein. Therefore, the first tube can be stably slidable inside the second tube due to the stabilizing lines.

公开(公告)号：US20230038807A1

公开(公告)日：2023-02-09

申请号：US17882664

申请日：2022-08-08

Applicant: CHIEN-TING LIN

Inventor： CHIEN-TING LIN

IPC: B65H35/00

Abstract: A one-piece tape cutting device is provided, comprising: a tape shaft, a tape pressing part, a cutting part, a tape supporting part, a side plate, and a pressing plate, and all are integrally formed without being connected by any fasteners. the tape is sleeved on the outside of the tape shaft from the opposite side of the side plate, the pressing plate is stretched by the tape and away from the tape shaft, so that the tape is pressed by the pressing plate and does not rotate, the tape is restricted by the anti-dislodging gear piece and does not disengage, and the end of the tape is pulled through the gap between the tape supporting part and the tape pressing part, and non-adhesive surface of the tape faces the tape pressing part, and the cutting part can cut through the tape.

公开(公告)号：US11566644B2

公开(公告)日：2023-01-31

申请号：US17096954

申请日：2020-11-13

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: F16B2/06 ,  F16F1/02

Abstract: A clamp sleeve, including: a body and a first fastening assembly. The body has first and second ends, and includes a receiving portion therein. The receiving portion has first and second openings at the first and second ends. The body is provided with a gap, the gap has two ends extending to the first and second openings, and the gap is communicated with the receiving portion. The body is provided with first extending portions at two sides of the gap along a longitudinal direction, the first extending portions is provided with a first connecting sheet near the first opening, and the first connecting sheet is connected to each of the first extending portions and connected with the first opening. The first connecting sheet is provided with a first thin thread intersecting with the gap. The first fastening assembly is disposed on the first extending portions.