Abstract:
A generator circuit is coupled to apply a control signal the gate terminal of a power transistor driving an output node. A reference voltage is generated having a first voltage value as the reference for the control signal and having a second, higher, voltage value for use in stress testing. A clamping circuit is provided between the reference voltage and the power transistor gate to function in two modes. In one mode, the clamping circuit applies a first clamp voltage to clamp the voltage at the gate of the power transistor when the generator circuit is applying the control signal. In another mode, the clamping circuit applies a second, higher, clamp voltage to clamp the gate of the power transistor during gate stress testing.
Abstract:
A driving apparatus configured to drive a light emitting device includes a driving current source module operable to supply current to the light emitting device via a node during operation. A protection module coupled to the node and the driving current source module selectively injects current to the node during operation. The driving current source module is controlled based on a detection result of a voltage on the node.
Abstract:
A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
Abstract:
A Class-D amplifier includes a pre-amplifier having an input configured to receive an amplifier reference voltage signal which is ramped at start-up at a fast rate. An integrator has a first input configured to receive an input signal from the pre-amplifier and a second input configured to receive an integrator reference voltage signal which is ramped at start-up at a slower rate. A modulator has an input coupled to an output of the integrator. The modulator generates a pulse width modulated output signal. Operation of the Class-D amplifier is controlled at start-up by applying a slow ramped signal as the integrator reference voltage signal and a fast ramped signal as the amplifier reference voltage so that the pulse width modulated output signal exhibits an increasing change in duty cycle in response to an increasing voltage of the integrator reference voltage signal, and no “pop” is introduced at start-up.
Abstract:
A power converter includes an input and an output with an energy storage circuit and a power switching circuit coupled between the input and the output. A feedback circuit generates a feedback voltage which is differentially compared to a reference in an error amplifier circuit to generate an error amplification signal. A comparator circuit generates a control signal for controlling on/off of the power switching circuit based on a first comparison signal related to the error amplification signal and a second comparison signal related to a charging current of the energy storage circuit. A regulating circuit is coupled between an output of the error amplifier circuit and an input of the comparator circuit for receiving the first comparison signal, the regulating circuit is configured to couple a voltage compensation signal related to an input voltage received by the input to an output of the error amplifier, so as to reduce a variation amount of the error amplification signal when the input voltage varies.
Abstract:
A voltage regulator includes a feedback regulation loop and a drive transistor configured to source current to a regulated output. A transient recovery circuit is coupled to the voltage regulator circuit and includes a first transistor coupled to source current into a control terminal of the drive transistor, wherein the source current is in addition to current sourced in response to operation of the feedback regulation loop. The first transistor is selectively actuated in response to a drop in voltage at the regulated output. The transient recovery circuit further includes a second transistor coupled to sink current from the regulated output. The sink current has a first non-zero magnitude in the quiescent operating mode of the regulator circuit. In response to an increase in voltage at the regulated output, the operation of the second transistor is modified to increase the sink current to a second, greater, non-zero magnitude.
Abstract:
A clamping circuit for a class AB amplifier includes a reference voltage circuit, four NPN Darlington transistors having inputs coupled to the reference voltage circuit, and outputs for providing four clamped voltages and a split NPN Darlington transistor having an input coupled to the reference voltage circuit, and four separate outputs for providing four AC ground voltages.
Abstract:
An oscillator module includes a first MOS transistor and a capacitor. The capacitor is coupled between a gate and source of the first MOS transistor. The drain of the first MOS transistor receives a first bias current and generates an oscillating output signal. A switching circuit operates in response to the oscillating output signal to selective charge and discharge the capacitor. A current sourcing circuit is configured to generate the bias current. The current sourcing circuit includes a second MOS transistor which has an identical layout to the first MOS transistor and receives a second bias current. A resistor is coupled between a gate and source of the second MOS transistor. The current sourcing circuit further includes a current mirror having an input configured to receive a reference current passing through the resistor and generate the first and second bias currents.
Abstract:
A clamping circuit for a class AB amplifier includes a reference voltage circuit, four NPN Darlington transistors having inputs coupled to the reference voltage circuit, and outputs for providing four clamped voltages, and a split NPN Darlington transistor having an input coupled to the reference voltage circuit, and four separate outputs for providing four AC ground voltages.
Abstract:
A three-phase load is powered by an SPWM driven inverter having a single shunt-topology. During operation, drain-to-source resistances of transistors of each branch of the inverter are determined. Interpolation is performed on assumed drain-to-source resistances of the transistors for different temperatures to produce a non-linear model of drain-to-source resistance to temperature for the transistors, and the drain-to-source resistances determined during operation and the non-linear model are used to estimate temperature values of the transistors. Driving of the inverter can be adjusted so that conductivity of each branch is set so that power delivered by that branch is as high as possible without exceeding an allowed drain current threshold representing a threshold junction temperature. In addition, driving of the inverter can be ceased if the temperature of a transistor exceeds the threshold temperature.