INTERPOSER WITH FLEXIBLE PORTION
    101.
    发明申请

    公开(公告)号:US20210028094A1

    公开(公告)日:2021-01-28

    申请号:US17069421

    申请日:2020-10-13

    Abstract: To address the issue of shrinking volume that can be allocated for electrical components, a system can use an interposer with a flexible portion. A first portion of the interposer can electrically connect to a top side of a motherboard. A flexible portion of the interposer, adjacent to the first portion, can wrap around an edge of the motherboard. A peripheral portion of the interposer, adjacent to the flexible portion, can electrically connect to a bottom side of the motherboard. The peripheral portion can be flexible or rigid. The interposer can define a cavity that extends through the first portion of the interposer. A chip package can electrically connect to the first portion of the interposer. The chip package can be coupled to at least one electrical component that extends into the cavity when the chip package is connected to the interposer.

    FIBER WEAVE-SANDWICHED DIFFERENTIAL PAIR ROUTING TECHNIQUE

    公开(公告)号:US20200137886A1

    公开(公告)日:2020-04-30

    申请号:US16565639

    申请日:2019-09-10

    Abstract: To overcome the problem of the fiber weave effect desynchronizing differential signals in a pair of traces of approximately the same length in a printed circuit board, the pair of traces can be routed to traverse largely parallel paths that are above one another in the printed circuit board. The material between the paths can include weaved fiber bundles. The material on opposite sides of the paths, surrounding the pair of traces and the weaved fiber bundles, can include resin-rich material. As a result, the pair of traces are directly adjacent to the same materials, which can allow signals in the traces to propagate at the same speed, and prevent desynchronization of differential signals traversing the paths. The path length difference associated with traversing to different depths can be compensated with a relatively small in-plane diagonal jog of one of the traces.

    INTERPOSER WITH FLEXIBLE PORTION
    104.
    发明申请

    公开(公告)号:US20200006204A1

    公开(公告)日:2020-01-02

    申请号:US16423715

    申请日:2019-05-28

    Abstract: To address the issue of shrinking volume that can be allocated for electrical components, a system can use an interposer with a flexible portion. A first portion of the interposer can electrically connect to a top side of a motherboard. A flexible portion of the interposer, adjacent to the first portion, can wrap around an edge of the motherboard. A peripheral portion of the interposer, adjacent to the flexible portion, can electrically connect to a bottom side of the motherboard. The peripheral portion can be flexible or rigid. The interposer can define a cavity that extends through the first portion of the interposer. A chip package can electrically connect to the first portion of the interposer. The chip package can be coupled to at least one electrical component that extends into the cavity when the chip package is connected to the interposer.

    Integrated circuit packages
    105.
    发明授权

    公开(公告)号:US10515912B2

    公开(公告)日:2019-12-24

    申请号:US15713660

    申请日:2017-09-24

    Abstract: Substrateless integrated circuit (IC) packages having a die with direct diagonal connections, as well as related structures, devices, and methods, are disclosed herein. For example, in some embodiments, an IC package may include: a die having a face with a plurality of contacts thereon, a dielectric layer in contact with the face, and a conductive pathway extending diagonally through the dielectric layer and coupling to an individual contact of the plurality of contacts on the die. In some embodiments, a conductive pathway may fan out to translate the contacts from a more dense layout to a less dense layout. In some embodiments, a conductive pathway may fan in to translate the contacts from a less dense layout to a more dense layout. In some embodiments, the dielectric layer and the conductive pathway may extend beyond the footprint of the die on one or more edges.

    OVERPASS DICE STACKS AND METHODS OF USING SAME
    106.
    发明申请

    公开(公告)号:US20190229057A1

    公开(公告)日:2019-07-25

    申请号:US16329080

    申请日:2016-09-30

    Abstract: A system in package device includes an overpass die on a package substrate and the overpass die includes a recess on the back side in order to straddle a landed die also on the package substrate. The recess is bounded by at least two overpass walls. Communication between the dice is done with a through-silicon via and communication between the overpass die and the package substrate is also done with a through-silicon via.

    Reduced-height electronic memory system and method

    公开(公告)号:US10256213B2

    公开(公告)日:2019-04-09

    申请号:US14964972

    申请日:2015-12-10

    Abstract: A computer memory module can include a molded layer disposed on a DRAM substrate. The molded layer can encapsulate a DRAM die and wire bonds that connect the DRAM die to the DRAM substrate, and can be shaped to include at least one cavity having a footprint sized to accommodate a system on chip (SOC) die. The DRAM module can attach to an SOC package so that the SOC die and the DRAM die are both positioned between the DRAM substrate and the SOC package, the DRAM substrate can form its electrical connections on only one side of the DRAM substrate, and the SOC die can fit at least partially into the cavity in the molded layer. This can reduce a package Z-height, compared to conventional DRAM packages in which the SOC die and the DRAM die are positioned on opposite sides of the DRAM substrate.

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