公开(公告)号：US20220271167A1

公开(公告)日：2022-08-25

申请号：US17626654

申请日：2020-07-08

Applicant: Semiconductor Energy Laboratory co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Erika TAKAHASHI ,  Shinya SASAGAWA ,  Naoki OKUNO ,  Masahiro TAKAHASHI ,  Kazuki TANEMARA

IPC: H01L29/786 ,  H01L27/108 ,  H01L21/02 ,  H01L29/66

Abstract: A semiconductor device with high reliability is provided. The semiconductor device includes a first oxide; a first conductor, a second conductor, and a first insulator over the first oxide; and a third conductor over the first insulator. The first conductor includes a first crystal. The second conductor includes a crystal having the same crystal structure as the first crystal. The first crystal has (111) orientation with respect to a surface of the first oxide. The first oxide includes a second crystal. The second crystal has c-axis alignment with respect to a surface where the first oxide is formed. The lattice mismatch degree of the first crystal with respect to the second crystal is lower than or equal to 8 percent.

公开(公告)号：US20220216341A1

公开(公告)日：2022-07-07

申请号：US17606830

申请日：2020-04-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Ryota HODO ,  Tetsuya KAKEHATA ,  Shinya SASAGAWA

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/321 ,  H01L21/311

Abstract: A transistor with a high on-state current and a semiconductor device with high productivity are provided. Included are a first oxide, a second oxide, a third oxide, and a fourth oxide over a first insulator; a first conductor over the third oxide; a second conductor over the fourth oxide; a second insulator over the first conductor; a third insulator over the second conductor; a fifth oxide positioned over the second oxide and between the third oxide and the fourth oxide; a sixth oxide over the fifth oxide; a fourth insulator over the sixth oxide; a third conductor over the fourth insulator; and a fifth insulator over the first insulator to the third insulator. The fifth oxide includes a region in contact with the second oxide to the fourth oxide and the first insulator. The sixth oxide includes a region in contact with the fifth oxide, the first conductor, and the second conductor. The fourth insulator includes a region in contact with at least the sixth oxide, the third conductor, and the fifth insulator.

公开(公告)号：US20220189996A1

公开(公告)日：2022-06-16

申请号：US17557355

申请日：2021-12-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Okazaki ,  Tomoaki MORIWAKA ,  Shinya SASAGAWA ,  Takashi OHTSUKI

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L21/768

Abstract: To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.

公开(公告)号：US20220157986A1

公开(公告)日：2022-05-19

申请号：US17436136

申请日：2020-03-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Shinya SASAGAWA ,  Shunichi ITO ,  Erika TAKAHASHI ,  Tetsuya KAKEHATA

IPC: H01L29/786 ,  H01L27/108

Abstract: A semiconductor device includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; first and second conductors and a third oxide over the second oxide; a second insulator over the first conductor; a third insulator over the second conductor; first and second layers; and fourth to sixth insulators. The sixth insulator includes a region in contact with a top surface of the first insulator. The first layer includes a region in contact with side surfaces of the first and second oxides, a side surface of the first conductor, and the top surface of the first insulator. The second layer includes a region in contact with the side surfaces of the first and second oxides, a side surface of the second conductor, and the top surface of the first insulator.

公开(公告)号：US20220157817A1

公开(公告)日：2022-05-19

申请号：US17439500

申请日：2020-03-19

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Shinya SASAGAWA ,  Shunichi ITO ,  Erika TAKAHASHI ,  Tetsuya KAKEHATA

IPC: H01L27/108 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66

Abstract: A semiconductor device with less variations in transistor characteristics is provided. A first insulator, first and second oxide films, a first conductive film, a first insulating film, and a second conductive film are deposited and processed to form a first and second oxides, a first conductive layer, a first insulating layer, and a second conductive layer. In the process, a layer is formed to cover the first and second oxides, the first conductive layer, the first insulating layer, and the second conductive layer. The second conductive layer and the layer are removed. A second insulating layer in contact with side surfaces of the first and second oxides, the first conductive layer, and the first insulating layer is formed, and a second insulator is formed thereover. An opening reaching the second oxide is formed in the first conductive layer, the first insulating layer, the second insulating layer, and the second insulator.

公开(公告)号：US20220115409A1

公开(公告)日：2022-04-14

申请号：US17557185

申请日：2021-12-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu KURATA ,  Shinya SASAGAWA ,  Ryota HODO ,  Katsuaki TOCHIBAYASHI ,  Tomoaki MORIWAKA ,  Jiro NISHIDA ,  Hidekazu MIYAIRI ,  Shunpei YAMAZAKI

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L21/84 ,  H01L23/522 ,  H01L27/13

Abstract: The semiconductor device includes a first layer including a first transistor, a second layer including a first insulating film over the first layer, a third layer including a second insulating film over the second layer, and a fourth layer including a second transistor over the third layer. A first conductive film electrically connects the first transistor and the second transistor to each other through an opening provided in the first insulating film. A second conductive film electrically connects the first transistor, the second transistor, and the first conductive film to one another through an opening provided in the second insulating film. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The width of a bottom surface of the second conductive film is 5 nm or less.

公开(公告)号：US20200006328A1

公开(公告)日：2020-01-02

申请号：US16483302

申请日：2018-01-31

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Yuta ENDO ,  Shinya SASAGAWA ,  Shuhei NAGATSUKA

IPC: H01L27/07 ,  H01L29/786

Abstract: A favorable semiconductor device for miniaturization and high integration is provided. One embodiment of the present invention includes a first oxide including a first region and second region adjacent to each other, a third region and a fourth region with the first region and the second region provided therebetween, a second oxide over the first region, a first insulator over the second oxide, a first conductor over the first insulator, a second insulator over the second oxide and on side surfaces of the first insulator and the first conductor, a third insulator over the second region and on a side surface of the second insulator, and a second conductor over the second region with the third insulator provided therebetween. A part of the third insulator is positioned between the second conductor and the side surface of the second insulator.

公开(公告)号：US20190393079A1

公开(公告)日：2019-12-26

申请号：US16556330

申请日：2019-08-30

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Motomu KURATA ,  Shinya SASAGAWA ,  Ryota HODO ,  Yuta IIDA ,  Satoru OKAMOTO

IPC: H01L21/768

Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.

公开(公告)号：US20190115478A1

公开(公告)日：2019-04-18

申请号：US16214197

申请日：2018-12-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinya SASAGAWA ,  Motomu KURATA ,  Satoru OKAMOTO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L21/311 ,  H01L21/3213

CPC classification number: H01L29/78693 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A minute transistor is provided. A transistor with small parasitic capacitance is provided. A transistor with high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes an oxide semiconductor, a first conductor and a second insulator embedded in a first insulator, a second conductor and a third conductor. Edges of the second conductor and the third conductor facing each other each has a taper angle of 30 degree or more and 90 degree or less.

公开(公告)号：US20190103478A1

公开(公告)日：2019-04-04

申请号：US16194444

申请日：2018-11-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Shinya SASAGAWA ,  Motomu KURATA ,  Masashi TSUBUKU

IPC: H01L29/66 ,  H01L27/146 ,  H01L27/12 ,  H01L29/786 ,  H01L21/02

Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.