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公开(公告)号:US20240284674A1
公开(公告)日:2024-08-22
申请号:US18586866
申请日:2024-02-26
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hajime KIMURA , Takanori MATSUZAKI , Kiyoshi KATO , Satoru OKAMOTO
CPC classification number: H10B43/27 , H10B43/10 , H10B43/35 , H10B43/40 , H10B43/50 , H01L29/24 , H01L29/513
Abstract: A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.
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公开(公告)号:US20230352090A1
公开(公告)日:2023-11-02
申请号:US17791326
申请日:2020-12-28
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kazuki TSUDA , Hiromichi GODO , Satoru OHSHITA , Hitoshi KUNITAKE , Satoru OKAMOTO
IPC: G11C16/04 , H01L29/786 , H01L23/528 , H10B43/10 , H10B43/35 , H10B43/27
CPC classification number: G11C16/0483 , H01L29/7869 , H01L23/5283 , H10B43/10 , H10B43/35 , H10B43/27
Abstract: A highly reliable memory device is provided. The memory device includes a first conductor, a second conductor above the first conductor, a third conductor above the second conductor, a fourth conductor above the third conductor, a fifth conductor above the fourth conductor, a sixth conductor above the fifth conductor, a seventh conductor, a first insulator, a second insulator, a first semiconductor, and a second semiconductor. At least third conductor and the fourth conductor have an opening. The first insulator, the first semiconductor, the second insulator, and the second semiconductor are provided in this order on an inner surface of the opening. The seventh conductor is provided between the first semiconductor and the second insulator in a region between the third conductor and the second insulator. The first semiconductor is electrically connected to the second conductor and the fifth conductor. The second semiconductor is electrically connected to the first conductor and the sixth conductor.
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公开(公告)号:US20220199831A1
公开(公告)日:2022-06-23
申请号:US17591690
申请日:2022-02-03
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yoshinobu ASAMI , Yutaka OKAZAKI , Satoru OKAMOTO , Shinya SASAGAWA
IPC: H01L29/786 , H01L29/417
Abstract: A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.
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公开(公告)号:US20200185528A1
公开(公告)日:2020-06-11
申请号:US16634493
申请日:2018-07-26
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Daisuke MATSUBAYASHI , Ryota HODO , Daigo ITO , Hiroaki HONDA , Satoru OKAMOTO
IPC: H01L29/786 , G11C11/4091 , H01L27/108 , H01L27/105 , H01L27/12 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/24
Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes an oxide; a first conductor and a second conductor over the oxide; a third conductor over the oxide; a first insulator provided between the oxide and the third conductor and covering a side surface of the third conductor; a second insulator over the third conductor and the first insulator; a third insulator positioned over the first conductor and at a side surface of the second insulator; a fourth insulator positioned over the second conductor and at a side surface of the second insulator; a fourth conductor being in contact with a top surface and a side surface of the third insulator and electrically connected to the first conductor; and a fifth conductor being in contact with a top surface and a side surface of the fourth insulator and electrically connected to the second conductor. The first insulator is between the third insulator and the third conductor, and between the fourth insulator and the third conductor.
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公开(公告)号:US20180254291A1
公开(公告)日:2018-09-06
申请号:US15966231
申请日:2018-04-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Yuta ENDO , Kiyoshi KATO , Satoru OKAMOTO
IPC: H01L27/12 , H01L21/02 , H01L29/66 , H01L29/786 , H01L21/768 , H01L23/528 , H01L23/532 , H01L27/105 , H01L29/24
CPC classification number: H01L27/1207 , H01L21/0206 , H01L21/0214 , H01L21/02178 , H01L21/02183 , H01L21/02266 , H01L21/02271 , H01L21/0228 , H01L21/02323 , H01L21/0234 , H01L21/3105 , H01L21/31155 , H01L21/76813 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76832 , H01L21/76834 , H01L21/8258 , H01L23/528 , H01L23/53295 , H01L27/0629 , H01L27/0688 , H01L27/088 , H01L27/092 , H01L27/1052 , H01L27/1225 , H01L29/24 , H01L29/66969 , H01L29/78648 , H01L29/7869
Abstract: A highly reliable semiconductor device suitable for miniaturization and high integration is provided. The semiconductor device includes a first insulator; a transistor over the first insulator; a second insulator over the transistor; a first conductor embedded in an opening in the second insulator; a barrier layer over the first conductor; a third insulator over the second insulator and over the barrier layer; and a second conductor over the third insulator. The first insulator, the third insulator, and the barrier layer have a barrier property against oxygen and hydrogen. The second insulator includes an excess-oxygen region. The transistor includes an oxide semiconductor. The barrier layer, the third insulator, and the second conductor function as a capacitor.
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公开(公告)号:US20180210561A1
公开(公告)日:2018-07-26
申请号:US15874452
申请日:2018-01-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Isamu SHIGEMORI , Satoru OKAMOTO
IPC: G06F3/03 , G06F3/01 , G06F3/0487 , G02B27/01
CPC classification number: G06F3/0308 , G02B27/017 , G02B2027/0178 , G02B2027/0187 , G06F1/1626 , G06F1/163 , G06F1/1641 , G06F1/1652 , G06F3/011 , G06F3/012 , G06F3/013 , G06F3/03542 , G06F3/038 , G06F3/0386 , G06F3/0412 , G06F3/042 , G06F3/0487 , G06F2203/0381 , G06F2203/04102 , G09B21/00
Abstract: Provided is an input unit and input method for an information terminal for easy input work and avoiding an operating error. Included are a support, an input unit including a laser device on the support, an information terminal including a sensor in a display portion, and a switch connected with or without a wire to at least one of the laser device and the information terminal. A desired region of the display portion is irradiated with laser light output from the input unit. Information is input to the region by operation of the switch in the state where the region is irradiated with laser light.
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公开(公告)号:US20170125450A1
公开(公告)日:2017-05-04
申请号:US15332006
申请日:2016-10-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Ryota HODO , Motomu KURATA , Shinya SASAGAWA , Satoru OKAMOTO , Shunpei YAMAZAKI
IPC: H01L27/12 , H01L29/66 , H01L21/02 , H01L21/467 , H01L21/463 , H01L21/768 , H01L29/786 , H01L23/535
CPC classification number: H01L27/1225 , H01L21/02565 , H01L21/463 , H01L21/467 , H01L21/76895 , H01L23/5226 , H01L23/53238 , H01L23/53295 , H01L27/1288 , H01L29/66969 , H01L29/7781 , H01L29/7782 , H01L29/78603 , H01L29/7869
Abstract: First to third insulators are successively formed in this order over a first conductor over a semiconductor substrate; a hard mask with a first opening is formed thereover; a resist mask with a second opening is formed thereover; a third opening is formed in the third insulator; a fourth opening is formed in the second insulator; the resist mask is removed; a fifth opening is formed in the first to third insulators; a second conductor is formed to cover an inner wall and a bottom surface of the fifth opening; a third conductor is formed thereover; polishing treatment is performed so that the hard mask is removed, and that levels of top surfaces of the second and third conductors and the third insulator are substantially equal to each other; and an oxide semiconductor is formed thereover. The second insulator is less permeable to hydrogen than the first and third insulators, the second conductor is less permeable to hydrogen than the third conductor.
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公开(公告)号:US20250072009A1
公开(公告)日:2025-02-27
申请号:US18947085
申请日:2024-11-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hajime KIMURA , Takanori MATSUZAKI , Tatsuya ONUKI , Yuki OKAMOTO , Hideki UOCHI , Satoru OKAMOTO , Hiromichi GODO , Kazuki TSUDA , Hitoshi KUNITAKE
IPC: H10B63/00
Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.
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公开(公告)号:US20230309308A1
公开(公告)日:2023-09-28
申请号:US18129120
申请日:2023-03-31
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hajime KIMURA , Takanori MATSUZAKI , Kiyoshi KATO , Satoru OKAMOTO
Abstract: A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.
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公开(公告)号:US20230014711A1
公开(公告)日:2023-01-19
申请号:US17947252
申请日:2022-09-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Satoru OKAMOTO , Shinya SASAGAWA
IPC: H01L29/66 , H01L21/385 , H01L29/786 , H01L27/12 , H01L29/22 , H01L29/24 , H01L29/40 , H01L29/423 , H01L29/78
Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween. The second insulator has an opening and a side surface of the second insulator overlaps with a side surface of the first conductor in the opening with the first insulator positioned therebetween. Part of a surface of the second conductor and part of a surface of the third conductor are in contact with the first insulator in the opening. The oxide semiconductor overlaps with the second conductor and the third conductor.
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