Fan guard and outdoor unit for air conditioner having the same
    112.
    发明申请
    Fan guard and outdoor unit for air conditioner having the same 有权
    具有相同空调的风扇护罩和室外机

    公开(公告)号:US20090110542A1

    公开(公告)日:2009-04-30

    申请号:US12222452

    申请日:2008-08-08

    CPC classification number: F24F1/38 F04D29/703 F24F1/40 F24F1/48 F24F1/50

    Abstract: An outdoor unit for an air conditioner is disclosed. The outdoor unit according to the present invention comprises a housing which has an air inlet and an air outlet, a ventilation fan rotatably mounted in the housing, and a fan guard connected to the housing to cover the air outlet. Here, the fan guard comprises a plurality of closed ribs arranged sequentially and concentrically between a center and an outline thereof, and a plurality of radial ribs arranged in radial directions to interconnect the plurality of closed ribs, in such a manner that some of the closed ribs, which are disposed at intermediate positions near tips of the ventilation fan, are at a further distance from the ventilation fan than the other closed ribs, which are disposed near the center and the outline. Accordingly, since the fan guard is convexly raised at a position corresponding to the tips of the ventilation fan, thereby guaranteeing a predetermined space between the fan guard and the tips where the airflow is fastest, the flow resistance and the flow-induced noise can be reduced.

    Abstract translation: 公开了一种用于空调的室外机。 根据本发明的室外机包括具有空气入口和空气出口的壳体,可旋转地安装在壳体中的通风扇和连接到壳体以覆盖空气出口的风扇防护罩。 这里,风扇防护罩包括顺序并同心地布置在其中心和轮廓之间的多个封闭肋,以及沿径向布置的多个径向肋,以使多个封闭肋互相连接,使得一些闭合 设置在通风扇的顶端附近的中间位置处的肋与设置在中心和轮廓附近的其它封闭肋相比距离通风扇更远。 因此,由于风扇护罩在与通气风扇的前端相对应的位置处凸起地升高,所以能够确保风扇防护件与气流最快的端部之间的预定空间,所以流动阻力和流动感应噪声可以是 减少

    Non-Volatile Memory Devices with Discrete Resistive Memory Material Regions and Methods of Fabricating the Same
    114.
    发明申请
    Non-Volatile Memory Devices with Discrete Resistive Memory Material Regions and Methods of Fabricating the Same 审中-公开
    具有离散电阻记忆材料区域的非易失性存储器件及其制造方法

    公开(公告)号:US20080128853A1

    公开(公告)日:2008-06-05

    申请号:US11939041

    申请日:2007-11-13

    Abstract: A semiconductor memory device includes a first conductive line on a semiconductor substrate, an interlayer insulating layer on the first conductive line, a second conductive line on the interlayer insulating layer, and a memory cell in an hole through the interlayer insulating layer wherein the first and second conductive lines cross, the memory cell including a discrete resistive memory material region disposed in the hole and electrically connected between the first and second conductive lines. The resistive memory material region may be substantially contained within the hole. In some embodiments, contact between the resistive memory material region and the interlayer insulating layer is substantially limited to sidewalls of the interlayer insulating layer in the hole.

    Abstract translation: 半导体存储器件包括半导体衬底上的第一导电线,第一导线上的层间绝缘层,层间绝缘层上的第二导线,以及穿过层间绝缘层的孔中的存储单元,其中, 第二导线交叉,存储单元包括设置在孔中并电连接在第一和第二导线之间的分立的电阻性存储器材料区域。 电阻性存储器材料区域可以基本上包含在孔内。 在一些实施例中,电阻性存储器材料区域和层间绝缘层之间的接触基本上限于孔中的层间绝缘层的侧壁。

    SOCKET FOR TESTING SEMICONDUCTOR PACKAGE
    115.
    发明申请
    SOCKET FOR TESTING SEMICONDUCTOR PACKAGE 失效
    用于测试半导体封装的插座

    公开(公告)号:US20080113524A1

    公开(公告)日:2008-05-15

    申请号:US11940044

    申请日:2007-11-14

    Abstract: Example embodiments of the present invention include a socket for testing a semiconductor package. The socket comprises a body having a through hole. A lower magnet is disposed in a lower region of the through hole, and a first type magnetic pole of the lower magnet is directed upward. An upper magnet is disposed in an upper region of the through hole, wherein the first type magnetic pole of the upper magnet is directed toward the lower magnet. The upper and lower magnets are structured to absorb a shock wave which is generated when the semiconductor package is arranged for testing. A conductive medium is disposed between the lower magnet and the upper magnet to electrically couple contactors of the semiconductor package to a base substrate of the socket.

    Abstract translation: 本发明的示例性实施例包括用于测试半导体封装的插座。 插座包括具有通孔的主体。 下磁铁配置在通孔的下部区域,下磁铁的第一型磁极向上方。 上磁体设置在通孔的上部区域中,其中上磁体的第一型磁极指向下磁体。 上磁铁和下磁体被构造成吸收当半导体封装被布置用于测试时产生的冲击波。 导电介质设置在下磁体和上磁体之间,以将半导体封装的接触器电耦合到插座的基底。

    TRAY CARRIER AND SYSTEM INCLUDING THE TRAY CARRIER FOR HANDLING AND TRANSPORTING SEMICONDUCTOR PACKAGES
    116.
    发明申请
    TRAY CARRIER AND SYSTEM INCLUDING THE TRAY CARRIER FOR HANDLING AND TRANSPORTING SEMICONDUCTOR PACKAGES 审中-公开
    托盘和系统,包括用于处理和运输半导体封装的托盘托架

    公开(公告)号:US20080075575A1

    公开(公告)日:2008-03-27

    申请号:US11844364

    申请日:2007-08-24

    CPC classification number: H01L21/673 H01L21/67766

    Abstract: A system for facilitating the handling and transporting of semiconductor packages includes a stock of trays in which semiconductor packages can be held, and a tray carrier by which a stack of the trays can be easily handled using automated equipment and without producing dust. The tray carrier includes a frame having an open bottom end through which a stack of trays can be inserted into the frame, belt drums mounted on both sides of the bottom end of the frame, fork blocks mounted to the frame under the belt drums, and a belt extending from the belt drums through the fork blocks and across the open bottom end of the frame. When the tray carrier is placed over a stack of the trays, the belt surrounds the top and sides of the stack of trays. The fork blocks include prongs that are movable into the space constituting the open bottom end of the frame so as to support the bottom of the stack of trays. The tray carrier also has fork handles for actuating the fork blocks, and locking handles for locking the fork blocks in place.

    Abstract translation: 用于促进半导体封装的处理和运输的系统包括其中可以保持半导体封装的托盘库存和托盘托架,通过该托盘托盘可以使用自动化设备容易地处理托盘并且不产生灰尘。 托盘托架包括具有开放的底端的框架,通过该框架可以将一叠托盘插入框架中,安装在框架底端两侧的皮带滚筒,安装在皮带鼓下面的框架的叉形块,以及 从皮带鼓延伸通过叉块并穿过框架的敞开的底端的皮带。 当托盘托架放置在托盘的堆叠上时,皮带围绕托盘堆叠的顶部和侧面。 叉块包括可移动到构成框架的开放底端的空间中以便支撑托盘堆叠的底部的插脚。 托盘托架还具有用于致动叉块的叉柄,以及用于将叉块锁定在适当位置的锁定手柄。

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