Abstract:
A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.
Abstract:
A chemical vapor deposition process is carried out in a reactor chamber having a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower process region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, each orifice being oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. A workpiece is placed in the process region, so that a workpiece surface of the workpiece is generally facing a surface plane of the nearest one of the ion shower grids, and a gas mixture comprising a deposition precursor species is furnished into the ion generation region. The process region is evacuated at an evacuation rate sufficient to create a pressure drop across the plural ion shower grids between the ion generation and process regions whereby the pressure in the ion generation region is several times the pressure in the process region. The process further includes applying plasma source power to generate a plasma of the deposition precursor species in the ion generation region and applying successive grid potentials to successive ones of the grids.
Abstract:
Device-enhancing coatings are deposited on CMOS devices by successively masking with photoresist each one of the sets of N-channel and P-channel devices while unmasking or leaving unmasked the other set, and after each step of successively masking one of the sets of devices, carrying out low temperature CVD steps with a toroidal RF plasma current while applying an RF plasma bias voltage. The temperature of the workpiece is held below a threshold photoresist removal temperature. The RF bias voltage is held at a level at which the coating is deposited with a first stress when the unmasked set consists of the P-channel devices and with a second stress when the unmasked set consists of N-channel devices.
Abstract:
A support for a substrate processing chamber comprises a fluid circulating reservoir comprising a channel having serpentine convolutions. A fluid inlet supplies a heat transfer fluid to the fluid circulating reservoir and a fluid outlet discharges the heat transfer fluid. In one version, the channel is doubled over to turn back upon itself.
Abstract:
A low temperature process for depositing a coating containing any of silicon, nitrogen, hydrogen or oxygen on a workpiece includes placing the workpiece in a reactor chamber facing a processing region of the chamber, introducing a process gas containing any of silicon, nitrogen, hydrogen or oxygen into the reactor chamber, generating a torroidal RF plasma current in a reentrant path through the processing region by applying RF plasma source power at an HF frequency on the order of about 10 MHz to a portion of a reentrant conduit external of the chamber and forming a portion of the reentrant path, applying RF plasma bias power at an LF frequency on the order of one or a few MHz to the workpiece, and maintaining the temperature of the workpiece under about 100 degrees C.
Abstract:
A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls, depositing a metal barrier layer comprising the barrier metal on the first barrier layer, depositing a main conductor species seed layer on the metal barrier layer and depositing a main conductor layer. The method further includes annealing the main conductor layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light. The method of Claim 1 further comprising, prior to the annealing step, depositing an amorphous carbon optical absorber layer on the main conductor layer. The step of depositing an amorphous carbon optical absorber layer includes introducing a carbon-containing process gas into a reactor chamber containing the substrate in a process zone of the reactor, applying RF source power to an external reentrant conduit of the reactor to generate a reentrant toroidal RF plasma current passing through the process zone and applying a bias voltage to the substrate.
Abstract:
A method of processing a thin film structure on a semiconductor substrate using an optically writable mask includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be etched in accordance with a predetermined pattern, and depositing a carbon-containing hard mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, and (c) coupling RF plasma bias power or bias voltage to the workpiece. The method further includes photolithographically defining the predetermined pattern in the carbon-containing hard mask layer, and etching the target layer in the presence of the hard mask layer.
Abstract:
A method of performing plasma immersion ion implantation on a workpiece in a plasma reactor chamber, includes placing the workpiece on a workpiece support in the chamber, controlling a temperature of the wafer support near a constant level, performing plasma immersion ion implantation on the workpiece by introducing an implant species precursor gas into the chamber and generating a plasma while minimizing deposition and minimizing etching by holding the temperature of the workpiece within a temperature range that is above a workpiece deposition threshold temperature and below a workpiece etch threshold temperature.
Abstract:
A method of measuring ion dose in a plasma immersion ion implantation reactor during ion implantation of a selected species into a workpiece includes placing the workpiece on a pedestal in the reactor and feeding into the reactor a process gas comprising a species to be implanted into the workpiece, and then coupling RF plasma source power to a plasma in the reactor. It further includes coupling RF bias power to the workpiece by an RF bias power generator that is coupled to the workpiece through a bias feedpoint of the reactor and measuring RF current at the feedpoint to generate a current-related value, and then integrating the current-related over time to produce an ion implantation dose-related value.
Abstract:
A method of ion implanting a species in a workpiece to a selected ion implantation profile depth includes placing a workpiece having a semiconductor material on an electrostatic chuck in or near a processing region of a plasma reactor chamber and applying a chucking voltage to the electrostatic chuck. The method further includes introducing into the chamber a precursor gas including a species to be ion implanted in the workpiece and applying an RF bias to the electrostatic chuck, the RF bias having a bias level corresponding to the ion implantation profile depth.