Light-Emitting Diodes on Concave Texture Substrate
    111.
    发明申请
    Light-Emitting Diodes on Concave Texture Substrate 有权
    凹面纹理基板上的发光二极管

    公开(公告)号:US20120119236A1

    公开(公告)日:2012-05-17

    申请号:US13358327

    申请日:2012-01-25

    IPC分类号: H01L27/15 H01L33/48

    CPC分类号: H01L33/48 H01L33/20 H01L33/24

    摘要: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

    摘要翻译: 提供了一种形成在凹面纹理基板上的发光二极管(LED)的半导体器件。 对衬底进行图案化和蚀刻以形成凹陷。 沿着凹部的底部形成分离层。 沿着侧壁和任选地沿着相邻凹部之间的基板的表面形成LED结构。 在这些实施例中,与平面表面相比,LED结构的表面积增加。 在另一个实施例中,LED结构形成在凹部内,使得底部接触层与凹部的拓扑不一致。 在这些实施例中,硅衬底中的凹陷导致底接触层中的立方结构,例如具有非极性特性并且表现出更高外部量子效率的n-GaN层。

    Light-emitting diode integration scheme
    112.
    发明授权
    Light-emitting diode integration scheme 有权
    发光二极管集成方案

    公开(公告)号:US08058669B2

    公开(公告)日:2011-11-15

    申请号:US12535525

    申请日:2009-08-04

    IPC分类号: H01L33/00

    摘要: A circuit structure includes a carrier substrate, which includes a first through-via and a second through-via. Each of the first through-via and the second through-via extends from a first surface of the carrier substrate to a second surface of the carrier substrate opposite the first surface. The circuit structure further includes a light-emitting diode (LED) chip bonded onto the first surface of the carrier substrate. The LED chip includes a first electrode and a second electrode connected to the first through-via and the second through-via, respectively.

    摘要翻译: 电路结构包括载体基板,其包括第一通孔和第二通孔。 第一通孔和第二通孔中的每一个从载体衬底的第一表面延伸到与第一表面相对的载体衬底的第二表面。 电路结构还包括结合到载体基板的第一表面上的发光二极管(LED)芯片。 LED芯片包括分别连接到第一通孔和第二通孔的第一电极和第二电极。

    Light-emitting diode with textured substrate
    113.
    发明授权
    Light-emitting diode with textured substrate 有权
    具纹理衬底的发光二极管

    公开(公告)号:US08058082B2

    公开(公告)日:2011-11-15

    申请号:US12189635

    申请日:2008-08-11

    IPC分类号: H01L21/00

    摘要: A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

    摘要翻译: 提供了一种发光二极管(LED)装置。 LED装置已经凸起形成在基板上的半导体区域。 在凸起的半导体区域上形成LED结构,使得LED器件的底部接触层和有源层是保形层。 顶部接触层具有平坦的表面。 在一个实施例中,顶部接触层在多个凸起的半导体区域上是连续的,而底部接触层和有源层在相邻凸起的半导体区域之间是不连续的。

    III-nitride based semiconductor structure with multiple conductive tunneling layer
    114.
    发明授权
    III-nitride based semiconductor structure with multiple conductive tunneling layer 有权
    具有多个导电隧穿层的III族氮化物基半导体结构

    公开(公告)号:US08044409B2

    公开(公告)日:2011-10-25

    申请号:US12189562

    申请日:2008-08-11

    IPC分类号: H01L27/15

    CPC分类号: H01L33/04 H01L33/12 H01L33/32

    摘要: A semiconductor structure includes a substrate and a conductive carrier-tunneling layer over and contacting the substrate. The conductive carrier-tunneling layer includes first group-III nitride (III-nitride) layers having a first bandgap, wherein the first III-nitride layers have a thickness less than about 5 nm; and second III-nitride layers having a second bandgap lower than the first bandgap, wherein the first III-nitride layers and the second III-nitride layers are stacked in an alternating pattern. The semiconductor structure is free from a III-nitride layer between the substrate and the conductive carrier-tunneling layer. The semiconductor structure further includes an active layer over the conductive carrier-tunneling layer.

    摘要翻译: 半导体结构包括衬底和与衬底接触的导电载体隧穿层。 导电载体隧穿层包括具有第一带隙的第一III族氮化物(III族氮化物)层,其中第一III族氮化物层具有小于约5nm的厚度; 和具有比第一带隙低的第二带隙的第二III族氮化物层,其中第一III族氮化物层和第二III族氮化物层以交替图案堆叠。 半导体结构在衬底和导电载体 - 隧穿层之间不含III族氮化物层。 半导体结构还包括在导电载体 - 隧穿层上的有源层。

    Light-Emitting Diode With Current-Spreading Region
    117.
    发明申请
    Light-Emitting Diode With Current-Spreading Region 有权
    具有电流扩散区域的发光二极管

    公开(公告)号:US20100038674A1

    公开(公告)日:2010-02-18

    申请号:US12539757

    申请日:2009-08-12

    IPC分类号: H01L33/00

    摘要: A light-emitting diode (LED) device is provided. The LED device has a lower LED layer and an upper LED layer with a light-emitting layer interposed therebetween. A current blocking layer is formed in the upper LED layer such that current passing between an electrode contacting the upper LED layer flows around the current blocking layer. When the current blocking layer is positioned between the electrode and the light-emitting layer, the light emitted by the light-emitting layer is not blocked by the electrode and the light efficiency is increased. The current blocking layer may be formed by converting a portion of the upper LED layer into a resistive region. In an embodiment, ions such as magnesium, carbon, or silicon are implanted into the upper LED layer to form the current blocking layer.

    摘要翻译: 提供了一种发光二极管(LED)装置。 LED装置具有较低的LED层和位于其间的发光层的上部LED层。 在上LED层中形成电流阻挡层,使得在与上层LED层接触的电极之间的电流流过电流阻挡层。 当电流阻挡层位于电极和发光层之间时,由发光层发射的光不被电极阻挡,并且光效率增加。 可以通过将上部LED层的一部分转换成电阻区域来形成电流阻挡层。 在一个实施方案中,诸如镁,碳或硅的离子注入上层LED层以形成电流阻挡层。

    Forming III-Nitride Semiconductor Wafers Using Nano-Structures
    118.
    发明申请
    Forming III-Nitride Semiconductor Wafers Using Nano-Structures 审中-公开
    使用纳米结构形成III-氮化物半导体晶片

    公开(公告)号:US20100035416A1

    公开(公告)日:2010-02-11

    申请号:US12189651

    申请日:2008-08-11

    IPC分类号: H01L21/20

    摘要: A method of forming a circuit structure includes providing a substrate; etching the substrate to form nano-structures; and growing a compound semiconductor material onto the nano-structures using epitaxial growth. Portions of the compound semiconductor material grown from neighboring ones of the nano-structures join each other to form a continuous compound semiconductor film. The method further includes separating the continuous compound semiconductor film from the substrate.

    摘要翻译: 形成电路结构的方法包括提供基板; 蚀刻基板以形成纳米结构; 并使用外延生长将化合物半导体材料生长到纳米结构上。 从相邻的纳米结构体生长的化合物半导体材料的部分彼此连接以形成连续的化合物半导体膜。 该方法还包括从衬底分离连续化合物半导体膜。

    III-Nitride Based Semiconductor Structure with Multiple Conductive Tunneling Layer
    119.
    发明申请
    III-Nitride Based Semiconductor Structure with Multiple Conductive Tunneling Layer 有权
    基于III型氮化物的多导体隧穿层半导体结构

    公开(公告)号:US20100032718A1

    公开(公告)日:2010-02-11

    申请号:US12189562

    申请日:2008-08-11

    IPC分类号: H01L33/00 H01L29/20

    CPC分类号: H01L33/04 H01L33/12 H01L33/32

    摘要: A semiconductor structure includes a substrate and a conductive carrier-tunneling layer over and contacting the substrate. The conductive carrier-tunneling layer includes first group-III nitride (III-nitride) layers having a first bandgap, wherein the first III-nitride layers have a thickness less than about 5 nm; and second III-nitride layers having a second bandgap lower than the first bandgap, wherein the first III-nitride layers and the second III-nitride layers are stacked in an alternating pattern. The semiconductor structure is free from a III-nitride layer between the substrate and the conductive carrier-tunneling layer. The semiconductor structure further includes an active layer over the conductive carrier-tunneling layer.

    摘要翻译: 半导体结构包括衬底和与衬底接触的导电载体隧穿层。 导电载体隧穿层包括具有第一带隙的第一III族氮化物(III族氮化物)层,其中第一III族氮化物层具有小于约5nm的厚度; 和具有比第一带隙低的第二带隙的第二III族氮化物层,其中第一III族氮化物层和第二III族氮化物层以交替图案堆叠。 半导体结构在衬底和导电载体 - 隧穿层之间不含III族氮化物层。 半导体结构还包括在导电载体 - 隧穿层上的有源层。