Abstract:
A charge dissipation field emission device (200, 300, 400) includes a supporting substrate (210, 310, 410), a cathode (215, 315, 415) formed thereon, a dielectric layer (240, 340, 440) formed on the cathode (215, 315, 415) and having emitter wells (260, 360, 460) and a charge dissipation well (252, 352, 452, 453) exposing a charge-collecting surface (248, 348, 448, 449), for bleeding off gaseous positive charge generated during the operation of the charge dissipation field emission device (200, 300, 400), an electron emitter (270, 370, 470) formed in each of the emitter wells (260, 360, 460), and an anode (280, 380, 480) spaced from the dielectric layer (240, 340, 440) for collecting electrons emitted by the electron emitters (270, 370, 470).
Abstract:
A field emission type display device capable of preventing a variation in luminance of the display device due to a variation in ambient temperature. A resistive layer is formed on cathode electrodes arranged in a display region and conical emitters are arranged on the resistive layer. The resistive layer is made of a semiconductor material, resulting in being varied in resistance depending on a temperature. A monitor resistive pattern made of the same material as the resistive layer is arranged so as to measure the resistance variation in the form of a voltage variation through an OP amplifier 11, which is then fed to the control circuit. The control circuit controls a gate voltage depending on the resistance to prevent a variation in luminance of the display device.
Abstract:
A gated electron-emitter is fabricated according to the process in which charged particles are directed towards a track-susceptible layer (48) to form charged-particle tracks (50B.sub.1) through the track-susceptible layer. Apertures (52.sub.1) are formed through the track-susceptible layer by etching along the charged-particle tracks. A gate layer (46) is etched through the apertures to form gate openings (54.sub.1) through the gate layer. An insulating layer (24) is etched through the gate openings to form dielectric open spaces (56.sub.1, 94.sub.1, 106.sub.1, or 114.sub.1) through the insulating layer down to a resistive layer (22B) of an underlying conductive region (22). Electron-emissive elements (30B, 30/88D.sub.1, 98/102.sub.1, or 118.sub.1) are formed in the dielectric open spaces over the resistive layer.
Abstract:
A cold cathode structure, useful for field emission displays, is disclosed. A thin resistive silicon film is disposed on a glass substrate; conductive emitter tips are disposed on top thereof. An alloy of amorphous silicon and amorphous carbon is used for the emitter tips. The proportion of the carbon in the alloy increases, gradually or abruptly, from the base to the top of the emitter tips. The carbon gradient is implemented during the process step, in which an n-type silicon layer is formed from which the emitter tips are made in subsequent masking and etching steps. The amount of carbon makes the emitter tips harder and gives lower work function at greater stability. Moreover, the carbon gradient allows for additional sharpening of the emitter tips.
Abstract:
A thin-film edge field emitter device includes a substrate having a first rtion and having a protuberance extending from the first portion, the protuberance defining at least one side-wall, the side-wall constituting a second portion. An emitter layer is disposed on the substrate including the second portion, the emitter layer being selected from the group consisting of semiconductors and conductors and is a thin-film including a portion extending beyond the second portion and defining an exposed emitter edge. A pair of supportive layers is disposed on opposite sides of the emitter layer, the pair of supportive layers each being selected from the group consisting of semiconductors and conductors and each having a higher work function than the emitter layer.
Abstract:
A high resistance resistor for regulating current in a field emission display is integrated into circuitry of the field emission display. The resistor is in electrical communication with emitter sites for the field emission display and with other circuit components such as ground. The high resistance resistor can be formed as a layer of a high resistivity material, such as intrinsic polycrystalline silicon, polycrystalline silicon doped with a conductivity-degrading dopant, lightly doped polysilicon, titanium oxynitride, tantalum oxynitride or a glass type material deposited on a baseplate of the field emission display. Contacts are formed in the high resistivity material to establish electrical communication between the resistor and the emitter sites and between the resistor and the other circuit components. The contacts can be formed as low resistance contacts (e.g., ohmic contacts) or as high resistance contacts (e.g., Schottky contacts).
Abstract:
An emitter structure 12 for use in a field emission display device comprises a ballast layer 17 overlying ah electrically conductive coating 16 (cathode electrode), which is itself formed on an electrically insulating substrate 18. A gate electrode comprises a coating of an electrically conductive material 22 which is deposited on an insulating layer 20. Cone-shaped microtips 14 formed within apertures 34 through conductive layer 22 and insulating layer 20. In the present invention, insulating layer 20 comprises a dielectric material capable of desorbing at least ten atomic percent hydrogen, which may illustratively comprise hydrogen silsesquioxane (HSQ). HSQ is an abundant source of hydrogen which keeps deleterious oxides from forming on microtip emitters 14. HSQ also reduces the capacitance formed by cathode electrode 16 and gate electrode 22, since its relative dielectric constant is less than 3.5. In alternative embodiments, the gate insulation layer 20 additionally includes one or more sublayers of a more dense insulating material 20b and 20c, typically a plasma deposited silicon dioxide.
Abstract:
A cold cathode field emission display is described. A key feature of its design is that each individual microtip has its own ballast resistor. The latter is formed from a resistive layer that has been interposed between the cathode line and the substrate. When openings for the microtips are formed in the gate line, extending down as far as the resistive layer, an overetching step is introduced. This causes the dielectric layer to be substantially undercut immediately above the resistive layer thereby creating an annular resistor positioned between the gate line and the base of the microtip.
Abstract:
A field emission device cathode (10) may be fabricated by forming a dielectric layer (14) on an upper surface of a resistive layer (12). A gate layer (16) is formed on the dielectric layer (14). An opening is formed in the gate layer (16) and a microtip cavity (18) is formed in the dielectric layer (14). The microtip cavity (18) extends through the opening in the gate layer (16) to the resistive layer (12). A conductive layer is formed on the gate layer (16) and the resistive layer (12) within the microtip cavity (18) to form a conductive opening layer (20) on the gate layer (16) and a microtip cavity layer (22) on the resistive layer (12). A nonrefractory metal layer is formed on the conductive opening layer (20) and the microtip cavity layer (22) to form a nonrefractory layer (26) on the conductive opening layer (20) and to form a microtip metal nonrefractory base layer (24) on the microtip cavity layer (22) such that the microtip metal nonrefractory base layer (24) serves as the base layer for a microtip (28) within the microtip cavity (18). A microtip metal refractory tip layer (30) is formed on the microtip metal nonrefractory base layer (24) to serve as the tip of the microtip (28). Finally, polishing is performed to remove a portion of the layers on the gate layer (16). The polishing continues until the microtip (28) is exposed.
Abstract:
A method of manufacturing an electron source having a plurality of surface-conduction electron-emitting devices arranged on a substrate in row and column directions includes the forming of electron emission portions of the plurality of surface-conduction electron-emitting devices. The forming is carried out by supplying current through the plurality of surface-conduction electron-emitting devices upon dividing them into a plurality of groups. An image forming apparatus passes a current through a plurality of electron sources, which are formed on a substrate and arrayed in the form of a matrix, in dependence upon an image signal, and an image is formed by a light emission in response to electrons emitted from the plurality of electron sources.