公开(公告)号：US20130340047A1

公开(公告)日：2013-12-19

申请号：US13866259

申请日：2013-04-19

Applicant: ST-ERICSSON SA

Inventor： Stefan RUNESON ,  Per STAHL

IPC: H04W12/06

CPC classification number: H04W12/06 ,  G06F21/44 ,  H04L63/08 ,  H04L65/1006 ,  H04L65/1016 ,  H04L65/1073

Abstract: Systems and methods are provided for authenticating Internet Protocol (IP) Multimedia Subsystem (IMS) applications in a User Equipment (UE). A method includes: receiving a first Session Initiation Protocol (SIP) REGISTER message from an IMS application operating on the UE; transmitting a response message to the IMS application based on the received first SIP REGISTER message; receiving a second SIP REGISTER message from the IMS application operating on the UE; determining authentication for the IMS application based on the received second SIP REGISTER message from the IMS application operating on the UE; and based on the step of determining authentication for the IMS application, if the IMS application is authorized, then transmitting information associated with the first and second SIP REGISTER messages toward a SIP node or if the IMS application is unauthorized, then discarding data associated with the first and second SIP REGISTER messages.

Abstract translation: 提供了用于在用户设备（UE）中验证因特网协议（IP）多媒体子系统（IMS）应用的系统和方法。 一种方法包括：从在UE上操作的IMS应用接收第一会话发起协议（SIP）REGISTER消息; 基于所接收的第一SIP REGISTER消息向IMS应用发送响应消息; 从在UE上操作的IMS应用接收第二SIP REGISTER消息; 基于从UE上运行的IMS应用接收的第二SIP REGISTER消息确定IMS应用的认证; 并且基于为IMS应用确定认证的步骤，如果IMS应用被授权，则向SIP节点发送与第一和第二SIP注册消息相关联的信息，或者如果IMS应用未授权，则丢弃与 第一和第二SIP注册消息。

公开(公告)号：US20130057334A1

公开(公告)日：2013-03-07

申请号：US13669259

申请日：2012-11-05

Applicant: STMicroelectronics SA ,  ST Ericsson SA

Inventor： Frederic Hasbani ,  Pascal Urard ,  Fabrice Blisson ,  David Jacquet

IPC: H03K3/00

CPC classification number: H03K19/0016 ,  H03K19/0013 ,  H03K2217/0018

Abstract: Embodiments described in the present disclosure relate to a method for providing power for an integrated system, including acts of: providing the system with power, ground and body bias voltages, the body bias voltages comprising a body bias voltage of p-channel MOS transistors, greater or lower than the supply voltage, and a body bias voltage of n-channel MOS transistors, lower or greater than the ground voltage, selecting by means of the system out of the voltages provided, depending on whether a processing unit of the system is in a period of activity or inactivity, voltages to be supplied to bias the bodies of the MOS transistors of the processing unit, and providing the bodies of the MOS transistors of the processing unit with the voltages selected.

Abstract translation: 本公开中描述的实施例涉及一种用于为集成系统提供电力的方法，包括以下动作：向系统提供电源，接地和体偏置电压，体偏置电压包括p沟道MOS晶体管的体偏置电压， 大于或低于电源电压，以及n沟道MOS晶体管的体偏置电压低于或大于接地电压，根据系统的处理单元是否由系统提供的电压进行选择 在活动或不活动的时段期间，提供用于偏置处理单元的MOS晶体管的主体的电压，以及为处理单元的MOS晶体管的主体提供所选择的电压。

公开(公告)号：US09601180B2

公开(公告)日：2017-03-21

申请号：US14372244

申请日：2013-01-23

Applicant: ST-Ericsson SA, En Liquidation

Inventor： Maxime Coquelin ,  Loic Pallardy

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G11C11/406 ,  G06F1/32 ,  G06F13/16

CPC classification number: G11C11/40622 ,  G06F1/3203 ,  G06F1/3275 ,  G06F13/1668 ,  G11C11/406 ,  G11C11/40611 ,  G11C11/40615 ,  G11C11/40618 ,  Y02D10/14

Abstract: Methods of configuring dynamic memory associated with a processing system, are described. The dynamic memory is configured in a plurality of blocks, the method comprises: a) receiving information relating to a utilization status of the memory; b) processing the received information to determine at least one first block of the memory that is currently not in use for information storage; and c) configuring the at least one first block to be excluded from an information refresh process.

公开(公告)号：US09591620B2

公开(公告)日：2017-03-07

申请号：US14416666

申请日：2013-06-21

Applicant: ST-Ericsson SA

Inventor： Fabrizio Tomatis ,  Andrea Ancora

IPC: H04W72/04 ,  H04W16/02 ,  H04L25/02 ,  H04L25/03 ,  H04B1/7083 ,  H04W48/20

CPC classification number: H04W72/0406 ,  H04B1/7083 ,  H04B2201/70701 ,  H04B2201/70702 ,  H04L25/0202 ,  H04L25/03866 ,  H04W16/02 ,  H04W48/20

Abstract: A method permits a UE receiver to detect and report to the network a scrambling code collision (i.e., two neighbor cells transmitting with the same scrambling code while timing is aligned). The UE receiver decodes the PCCPCH's physical channel with all the associated broadcast information while a scrambling code collision at the UE is present. The UE reports SFN-SFN information to the network, to insure the UE mobility and then prepare the handover to a new detected cell. This process and a respective apparatus are usable in the presence of MIMO and further improve the detection of the scrambling code collision in the presence of MIMO.

Abstract translation: 一种方法允许UE接收机检测并向网络报告扰码冲突（即，在定时对准时以相同的扰码进行发送的两个相邻小区）。 UE在UE处的扰码冲突存在的情况下，利用所有相关联的广播信息解码PCCPCH的物理信道。 UE向网络报告SFN-SFN信息，以确保UE的移动性，然后准备切换到新的检测到的小区。 该过程和相应的装置在MIMO的存在下是可用的，并且进一步改善了在存在MIMO的情况下对扰码冲突的检测。

公开(公告)号：US09515559B2

公开(公告)日：2016-12-06

申请号：US14354165

申请日：2012-10-23

Applicant: ST-Ericsson SA

Inventor： Laurent Chevalier

IPC: H02M3/07 ,  H02M3/18 ,  G05F3/00 ,  H02M1/00

CPC classification number: H02M3/18 ,  G05F3/00 ,  H02M3/07 ,  H02M2001/0054 ,  Y02B70/1491

Abstract: There is described a charge pump circuit (1) circuit comprising an input terminal, an output terminal (5) connected to an intermediate node (Ni), a ground terminal (4), a first fly capacitor module (21) with a first fly capacitor (Cfly1) having a first pin (211) and a second pin (212) and connected to the intermediate node (Ni); and a second fly capacitor module (22) with a first fly capacitor (Cfly2) having a first pin (221) and a second pin (222) and connected to the intermediate node (Ni); wherein each being adapted to successively charge and discharge a the first fly capacitor and the second fly capacitor, respectively, wherein the second pin (212) of the first fly capacitor module (21) is connected to the first pin (221) of the second fly capacitor module (22) by a direct connection.

Abstract translation: 描述了一种电荷泵电路（1），包括输入端子，连接到中间节点（Ni）的输出端子（5），接地端子（4），具有第一飞行的第一飞行电容器模块（21） 电容器（Cfly1）具有第一引脚（211）和第二引脚（212）并连接到中间节点（Ni）; 和具有第一引脚（221）和第二引脚（222）并连接到中间节点（Ni）的第一飞电容器（Cfly2）的第二飞电容器模块（22）; 其中每个分别适于连续地对第一飞电容器和第二飞电容器进行充电和放电，其中第一飞电容器模块（21）的第二引脚（212）连接到第二飞电电容器的第二引脚（221） 飞电容器模块（22）通过直接连接。

公开(公告)号：US09467238B2

公开(公告)日：2016-10-11

申请号：US14426763

申请日：2013-09-12

Applicant: ST-Ericsson SA

Inventor： Achraf Dhayni

IPC: H04B5/00 ,  H04B17/21 ,  G01R31/317 ,  H04B17/14 ,  H04B17/345 ,  H04W4/00 ,  H04W24/02

CPC classification number: H04B17/21 ,  G01R31/31716 ,  H04B5/0056 ,  H04B17/14 ,  H04B17/345 ,  H04W4/80 ,  H04W24/02

Abstract: A method of determining a calibration of a near field communication, NFC, device, the NFC device comprising a receiver circuit, a transmitter circuit and a load modulator circuit, the method comprising: generating a carrier signal in the transmitter circuit, generating a modulation signal in the load modulator circuit, generating a modulated carrier signal, comprising first and second frequencies, by applying the modulation signal to the carrier signal, applying the modulated carrier signal at an input of the receiver circuit, and determining a response parameter of the receiver circuit on the basis of the response of the receiver circuit to the first and second frequencies in the modulated carrier signal.

Abstract translation: 一种确定近场通信NFC装置的NFC装置的方法，所述NFC装置包括接收机电路，发射机电路和负载调制器电路，所述方法包括：在所述发射机电路中产生载波信号，产生调制信号 在所述负载调制器电路中，通过将所述调制信号施加到所述载波信号来产生包括第一和第二频率的调制载波信号，在所述接收机电路的输入处应用所述调制载波信号，以及确定所述接收机电路的响应参数 基于接收机电路对调制载波信号中的第一和第二频率的响应。

公开(公告)号：US09455859B2

公开(公告)日：2016-09-27

申请号：US14420791

申请日：2013-09-03

Applicant: ST-Ericsson SA

Inventor： Achraf Dhayni

IPC: H04K1/10 ,  H04L27/26

CPC classification number: H04L27/2623 ,  H04L27/2624

Abstract: An emitter for modulating and emitting an orthogonal frequency division multiplexing signal through a transmission channel (TC), comprising a frequency-to-time converter for converting symbols to be transmitted into time symbols, and means for serializing and amplifying said time symbol so as to emit it as an OFDM signal through said transmission channel, said emitter further comprising: means (12) for clipping said time symbols; time-to-frequency convertor (13) for converting said time symbols; and means for applying a set of data subcarriers of the outputs of said time-to-frequency converter as inputs of said frequency-to-time converter wherein out-of-band subcarriers are set to zero and the clipping level is set to a minimum level allowing the amplifier to operate in an efficient region.

Abstract translation: 一种用于通过传输信道（TC）调制和发射正交频分复用信号的发射器，包括用于将要发送的符号转换为时间符号的频率 - 时间转换器，以及用于串行化和放大所述时间符号的装置，以便 通过所述传输信道将其发射为OFDM信号，所述发射器还包括：用于剪切所述时间符号的装置（12）; 时间 - 频率转换器（13），用于转换所述时间符号; 以及用于将所述时间 - 频率转换器的输出的一组数据子载波应用于所述频率 - 时间转换器的输入的装置，其中带外子载波被设置为零，并且限幅电平被设置为最小 电平允许放大器在有效的区域中工作。

公开(公告)号：US09438182B2

公开(公告)日：2016-09-06

申请号：US14358182

申请日：2012-10-30

Applicant: ST-Ericsson SA

Inventor： Carlo Crippa ,  Rossella Bassoli

IPC: H03F3/38 ,  H03F3/185 ,  H03F3/217 ,  H03K7/08

CPC classification number: H03F3/185 ,  H03F3/187 ,  H03F3/2175 ,  H03F3/45475 ,  H03F2200/165 ,  H03F2200/351 ,  H03F2200/78 ,  H03F2203/21112 ,  H03F2203/21196 ,  H03K7/08

Abstract: A digital class D amplifier (10) is disclosed, comprising a pulse width modulator (PW Mod) comprising: a digital loop filter (Loop F) adapted to receive an input signal (x[n]) and a feedback signal (fb[n]), the digital loop filter (Loop_F) being adapted to process at a clock frequency (f_s) said input and feedback signals for providing as output a filtered digital signal (w[n]); a PWM conversion module (PW_CM) having an input (24) for receiving the filtered digital signal (w[n]) and having a first output (25) connected to the digital loop filter (Loop F), the PWM conversion module being adapted for processing the filtered digital signal (w[n]) and providing at said first output (25) the feedback signal (fb[n]). The PWM conversion module (PW_CM) comprises: a first comparator (CMP_N) adapted to compare the filtered digital signal (w[n]) with a first reference triangular waveform (VTn[n]) for providing as output a first PWM signal (yn[n]), the first reference triangular waveform having a frequency (f_osc) much lower than said clock frequency (f.s); a second comparator (CMP_P) adapted to compare the filtered digital signal (w[n]) with a second reference triangular waveform (VTp[n]) for providing as output a second PWM signal (yp[n]), the second reference triangular waveform (VTp[n]) being the inverse of the first triangular waveform (VTn[n]), said first (yn[n]) and second (yp[n]) PWM signals representing a differential output pulse width modulated signal (yn[n],yp[n]).

Abstract translation: 公开了一种数字D类放大器（10），包括：脉冲宽度调制器（PW Mod），包括：适于接收输入信号（x [n]）和反馈信号（fb [n]）的数字环路滤波器 ]），所述数字环路滤波器（Loop_F）适于以时钟频率（f_s）处理所述输入和反馈信号，以提供经过滤波的数字信号（w [n]）作为输出; PWM转换模块（PW_CM），其具有用于接收经过滤波的数字信号（w [n]）并具有连接到数字环路滤波器（Loop F）的第一输出端25的输入端） 用于处理滤波后的数字信号（w [n]）并在所述第一输出端提供反馈信号（fb [n]）。 PWM转换模块（PW_CM）包括：第一比较器（CMP_N），适于将滤波后的数字信号（w [n]）与第一参考三角波形（VTn [n]）进行比较，以提供第一PWM信号 [n]），具有比所述时钟频率（fs）低得多的频率（f_osc）的第一参考三角波形; 适于将滤波后的数字信号（w [n]）与第二参考三角波形（VTp [n]）进行比较以用于提供第二PWM信号（yp [n]）作为输出的第二比较器（CMP_P），第二参考三角形 波形（VTp [n]）是第一三角波形（VTn [n]）的倒数，所述第一（yn [n]）和第二（yp [n]）PWM信号表示差分输出脉宽调制信号 [n]，yp [n]）。

公开(公告)号：US09425907B2

公开(公告)日：2016-08-23

申请号：US14433893

申请日：2013-11-07

Applicant: ST-Ericsson SA

Inventor： Achraf Dhayni ,  Christophe Arnal

IPC: H04B5/00 ,  H04B17/20 ,  H04L1/24 ,  H04B17/14 ,  H04B17/15 ,  H04B17/19 ,  H04B17/29 ,  H04B17/40

CPC classification number: H04B17/20 ,  H04B5/0031 ,  H04B17/14 ,  H04B17/15 ,  H04B17/19 ,  H04B17/29 ,  H04B17/408 ,  H04L1/243

Abstract: A method of self-test for a near-field communication (NFC) radio frequency (RF) front-end unit comprising one antenna driver and at least one unit from a group comprising one reader and one card emulator, the RF front-end unit being connected to a digital front-end unit, wherein the antenna driver and the unit are interconnected through a first connection line via their respective first input-output interface and are also interconnected through a second connection line via their respective second input-output interface, the digital front-end unit being connected to the second connection line, the method comprising: activating the antenna driver and the unit based on control signals; —generating a first signal onto the first connection line by modulating a respective first bitstream; —retrieving a second bitstream from the second connection line, by demodulating the first signal; and, —determining an outcome of the self-test by monitoring the demodulated signal.

Abstract translation: 一种用于近场通信（NFC）射频（RF）前端单元的自检的方法，包括一个天线驱动器和来自包括一个读取器和一个卡仿真器的组中的至少一个单元，所述RF前端单元 连接到数字前端单元，其中所述天线驱动器和所述单元经由其相应的第一输入 - 输出接口通过第一连接线互连，并且还经由其相应的第二输入 - 输出接口通过第二连接线互连， 所述数字前端单元连接到所述第二连接线，所述方法包括：基于控制信号激活所述天线驱动器和所述单元; - 通过调制相应的第一比特流来产生第一信号到第一连接线上; 通过解调第一信号，从第二连接线恢复第二比特流; 并且通过监视解调信号来确定自检的结果。

公开(公告)号：US09413580B2

公开(公告)日：2016-08-09

申请号：US14427816

申请日：2013-09-17

Applicant: ST-Ericsson SA

Inventor： Achraf Dhayni

IPC: H04L7/00 ,  H04L27/26 ,  H04L25/03

CPC classification number: H04L27/2665 ,  H04L25/03159 ,  H04L27/2662 ,  H04L27/2672 ,  H04L27/2675 ,  H04L27/2682 ,  H04L2025/03414

Abstract: Receiver (RCV) adapted for compensating for Symbol Timing Offset when receiving OFDM symbols, over a communication channel (TC), comprising: means (REG, DFT, CMP) for detecting a first phase with no Inter-Symbol Interference, means (REG, DFT, CMP) for detecting a second phase with presence of Inter-Symbol Interference, means (REG, DFT, CMP) for compensating for said Symbol Timing Offset by estimating starting points of said received OFDM symbols as being one sample before the start of said second phase. The timing synchronization is achieved in frequency domain by monitoring amplitude variation of the demodulated subcarriers symbols, said variation being due to the presence of Inter Symbol Interference when the FFT window overlaps with the subsequent OFDM symbol.

Abstract translation: 用于在通信信道（TC）上接收OFDM符号时补偿符号定时偏移的接收机（RCV），包括：用于检测没有符号间干扰的第一相位的装置（REG，DFT，CMP），装置（REG， DFT，CMP），用于通过存在符号间干扰来检测第二相位，用于通过将所述接收的OFDM符号的起始点估计为所述接收的OFDM符号开始之前的一个样本来补偿所述符号定时偏移的装置（REG，DFT，CMP） 第二阶段 通过监视解调的副载波符号的幅度变化，在频域中实现定时同步，所述变化是由于当FFT窗口与随后的OFDM符号重叠时存在帧间干扰。