公开(公告)号：US20030001594A1

公开(公告)日：2003-01-02

申请号：US10171086

申请日：2002-06-12

Applicant: STMicroelectronics S.A.

Inventor： Frederic Hasbani

IPC: G01R027/08

CPC classification number: G01R27/14 ,  G01R17/105 ,  G01R17/12

Abstract: A device for the comparison of two resistors is based upon analog information carried by currents. The device includes a measurement circuit for extracting the currents from the two resistors to be compared, and copies the currents to a parallel analog-digital converter that carries out the division of the extracted currents. The device converts the ratio of the extracted currents into a digital code that is the image of the ratio of the two resistors. The ratio is constantly re-updated as a function of environmental parameters of the circuit, such as the operating temperature. Also disclosed is a system for correcting the value of integrated compensated resistors. The system implements a device of this kind that does not use a reference voltage generator.

Abstract translation: 用于比较两个电阻的器件是基于电流携带的模拟信息。 该装置包括用于从要比较的两个电阻器中提取电流的测量电路，并将电流复制到并行模数转换器，其执行提取的电流的划分。 该装置将提取的电流的比率转换为作为两个电阻器的比率的图像的数字码。 该比率作为电路的环境参数（诸如操作温度）的函数不断地被更新。 还公开了用于校正积分补偿电阻器的值的系统。 该系统实现这种不使用参考电压发生器的装置。

公开(公告)号：US20030001228A1

公开(公告)日：2003-01-02

申请号：US10165051

申请日：2002-06-07

Applicant: STMicroelectronics S.A.

Inventor： Philippe Boivin ,  Francesco La Rosa

IPC: H01L029/00

CPC classification number: H01L27/0255 ,  H01L27/0251

Abstract: An integrated circuit on a silicon substrate includes at least one polysilicon line and at least one antistatic contact connecting the polysilicon line to the silicon substrate. The antistatic contact includes a thin oxide layer between the polysilicon line and the silicon substrate. The thin oxide layer is of a sufficiently small thickness so that a current flows across it by the tunnel effect when the polysilicon line is brought, relatively to the substrate, to a voltage greater or less than determined thresholds.

Abstract translation: 硅衬底上的集成电路包括至少一个多晶硅线和将多晶硅线连接到硅衬底的至少一个抗静电接触。 抗静电接触包括在多晶硅线和硅衬底之间的薄氧化层。 薄氧化物层具有足够小的厚度，使得当多晶硅线相对于衬底被带到大于或小于确定的阈值的电压时，电流通过隧道效应流过它。

公开(公告)号：US20020191432A1

公开(公告)日：2002-12-19

申请号：US10172179

申请日：2002-06-14

Applicant: STMicroelectronics S.A.

Inventor： Sigrid Thomas

IPC: G11C005/06

CPC classification number: H01L27/11233 ,  G11C17/12 ,  H01L27/112

Abstract: A read-only memory formed of cells, each of which includes, between a selection line and a bit line, the series connection of a memory element and of a selection MOS transistor with a gate connected to a read control line. The memory elements of blank cells are P-channel MOS transistors and the memory elements of programmed cells are uniformly N-type doped semiconductor regions.

Abstract translation: 由单元形成的只读存储器，每个单元在选择线和位线之间包括存储元件和选择MOS晶体管的串联连接，栅极连接到读控制线。 空白单元的存储元件是P沟道MOS晶体管，并且编程单元的存储元件是均匀的N型掺杂半导体区域。

公开(公告)号：US20020168028A1

公开(公告)日：2002-11-14

申请号：US10103575

申请日：2002-03-21

Applicant: STMICROELECTRONICS S.A.

Inventor： Marc Joisson ,  Luc Garcia ,  Marc Gens

IPC: H03K009/00

CPC classification number: H04L27/1566

Abstract: A receiver of a frequency-modulated signal is provided. The receiver includes a frequency-transposition unit for lowering the frequency of the frequency-modulated signal, and a digital demodulator for regenerating a digital signal from the frequency-transposed signal. The frequency-transposition unit includes a local oscillator for generating a local oscillator signal used in lowering the frequency of the frequency-modulated signal. The frequency-transposed signal is sampled in the digital demodulator at the rate of a sampling signal, and the sampling signal is generated by the local oscillator of the frequency-transposition unit. In a preferred embodiment, the local oscillator includes at least one frequency-divider circuit that delivers the sampling signal. Also provided is a method for regenerating a digital signal from a frequency-modulated signal.

Abstract translation: 提供了调频信号的接收机。 接收机包括用于降低频率调制信号的频率的频率转置单元和用于从频率转置信号再生数字信号的数字解调器。 频率转置单元包括本地振荡器，用于产生用于降低频率调制信号的频率的本地振荡器信号。 在数字解调器中以采样信号的速率采样频移信号，采样信号由频移单元的本地振荡器产生。 在优选实施例中，本地振荡器包括传送采样信号的至少一个分频器电路。 还提供了一种从频率调制信号再生数字信号的方法。

公开(公告)号：US20020167357A1

公开(公告)日：2002-11-14

申请号：US10144636

申请日：2002-05-13

Applicant: STMicroelectronics S.A.

Inventor： Claude Renous

IPC: H03F003/45

CPC classification number: H03F3/3023 ,  H03F1/086 ,  H03F3/3062 ,  H03F3/45659

Abstract: A differential amplifier may include a first stage including a first transistor and a second transistor having the same polarity and assembled to constitute a differential amplifier. The first stage may be supplied by first and second mirror current sources. The differential amplifier may further include a common mode control circuit, which may include two inputs receiving a reference voltage VCM and a common mode voltage controlling the first and second mirror current sources, respectively. The differential amplifier may further include a Miller gain stage having inputs and for a setting gain-band product. The differential amplifier may further include an unlocking circuit, inserted between the common mode voltage and the Miller gain stage inputs, to cause the Miller gain stage to conduct on circuit start-up.

Abstract translation: 差分放大器可以包括第一级，其包括具有相同极性的第一晶体管和第二晶体管，并组装以构成差分放大器。 第一级可以由第一和第二反射镜电流源提供。 差分放大器还可以包括共模控制电路，其可以包括接收参考电压VCM的两个输入端和分别控制第一和第二反射镜电流源的共模电压。 差分放大器还可以包括具有输入和设置增益带积的米勒增益级。 差分放大器还可以包括插入在共模电压和米勒增益级输入之间的解锁电路，以使得米勒增益级在电路启动时进行。

公开(公告)号：US20020163027A1

公开(公告)日：2002-11-07

申请号：US10114672

申请日：2002-04-02

Applicant: STMICROELECTRONICS S.A.

Inventor： Thomas Skotnicki ,  Emmanuel Josse

IPC: H01L027/108

CPC classification number: H01L29/66666 ,  H01L29/165 ,  H01L29/7827

Abstract: The vertical insulated gate transistor includes, on a semiconductor substrate, a vertical pillar incorporating one of the source and drain regions at the top, a gate dielectric layer situated on the flanks of the pillar and on the top surface of the substrate, and a semiconductor gate resting on the gate dielectric layer. The other of the source and drain regions is in the bottom part of the pillar PIL and the insulated gate includes an isolated external portion 15 resting on the flanks of the pillar and an isolated internal portion 14 situated inside the pillar between the source and drain regions. The isolated internal portion is separated laterally from the isolated external portion by two connecting semiconductor regions PL1, PL2 extending between the source and drain regions, and forming two very fine pillars.

Abstract translation: 垂直绝缘栅晶体管包括在半导体衬底上的垂直柱，其顶部包括源极和漏极区中的一个，位于柱的侧面和衬底顶表面上的栅极电介质层，以及半导体 门静置在栅介质层上。 源极和漏极区域中的另一个位于柱PIL的底部，并且绝缘栅极包括搁置在柱的侧面上的隔离的外部部分15和位于源极和漏极区域之间的柱内的隔离的内部部分14 。 隔离的内部部分通过在源极和漏极区域之间延伸的两个连接半导体区域PL1，PL2从隔离的外部部分侧向分离，并形成两个非常细的柱。

公开(公告)号：US20020156818A1

公开(公告)日：2002-10-24

申请号：US10068568

申请日：2002-02-06

Applicant: STMicroelectronics S.A.

Inventor： Franck Roche ,  Nicolas Lafargue

IPC: G06F007/00

CPC classification number: G06F9/3001 ,  G06F5/01 ,  G06F7/575 ,  G06F7/768 ,  G06F9/30025 ,  G06F9/30032

Abstract: A microprocessor comprises a central processing unit having an arithmetic and logic unit with two inputs and one input fed-back to one of the inputs through a data path. The arithmetic and logic unit performs arithmetic and logic operations on binary words temporarily stored within registers in the central processing unit. The central processing unit further includes a shift unit in the data path of the arithmetic and logic unit for performing operations to shift bits in the binary words applied thereto. A selection circuit selects a shift operation to be performed. An inverting circuit inverts the ordering of the bits in the binary words applied thereto, which are in the data path of the arithmetic and logic unit, and a selection circuit selects the inversion operation when the latter is required.

Abstract translation: 微处理器包括中央处理单元，其具有具有两个输入的算术和逻辑单元，以及通过数据路径反馈到其中一个输入的一个输入。 算术和逻辑单元对临时存储在中央处理单元中的寄存器内的二进制字执行算术和逻辑运算。 中央处理单元还包括在算术和逻辑单元的数据路径中的移位单元，用于执行将应用于其中的二进制字中的位移位的操作。 选择电路选择要执行的移位操作。 反相电路将应用于其中的二进制字中的位的顺序反转在算术和逻辑单元的数据路径中，并且当需要后者时，选择电路选择反转操作。

公开(公告)号：US20020121649A1

公开(公告)日：2002-09-05

申请号：US10068308

申请日：2002-02-05

Applicant: STMicroelectronics S.A.

Inventor： Didier Belot

IPC: H01L031/0328

CPC classification number: H01L27/0248 ,  H01L29/0603 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A structure of protection of an area of a semiconductor wafer including a lightly-doped substrate of a first conductivity type against high-frequency noise likely to be injected from components formed in the upper portion of a second area of the wafer. The structure includes a very heavily-doped wall of the first conductivity type having substantially the depth of the upper portion. The wall is divided into segments, each of which is connected to a ground plane.

Abstract translation: 包括半导体晶片的区域的保护结构，该半导体晶片的区域包括第一导电类型的轻掺杂衬底，以抵抗可能从形成在晶片的第二区域的上部的部件注入的高频噪声。 该结构包括基本上具有上部深度的第一导电类型的非常重掺杂的壁。 墙被分成段，每个段连接到接地平面。

公开(公告)号：US20020109536A1

公开(公告)日：2002-08-15

申请号：US10021287

申请日：2001-10-30

Applicant: STMicroelectronics S.A.

Inventor： Bruno Gailhard ,  Olivier Ferrand

IPC: H03L007/06

CPC classification number: H03K3/03 ,  H03L7/0997

Abstract: A generator includes an oscillator for producing a clock signal from N logic signals representing an N-bit control number, with N being an integer greater than 1. The oscillator has Nnull1 components. The N most significant components are each assigned a place value i ranging from 1 to N, and a least significant component provides the clock signal. At least one component with a place value i greater than 1 includes first and second arms. The first arm includes a cell and a first switch connected in series, and the second arm includes 1null21 cells and a second switch connected in series. Each cell includes an odd number of inverters.

Abstract translation: 发生器包括用于从表示N位控制号的N个逻辑信号产生时钟信号的振荡器，其中N是大于1的整数。振荡器具有N + 1个分量。 N个最重要的组件每个被分配一个从1到N的位置值i，并且最不重要的组件提供时钟信号。 位置值i大于1的至少一个部件包括第一和第二臂。 第一臂包括串联连接的单元和第一开关，第二臂包括1 + 21单元和串联连接的第二开关。 每个单元包括奇数个逆变器。

公开(公告)号：US20020101916A1

公开(公告)日：2002-08-01

申请号：US10045956

申请日：2001-10-26

Applicant: STMicroelectronics S.A.

Inventor： Maurice Le Van Suu

IPC: H04L005/16

CPC classification number: H04L27/0008 ,  H04L27/0012

Abstract: A modulation/demodulation device capable of operating with several types of modulation using different carrier frequencies may include a modulator which modulates at least one signal by a signal of a predetermined duration and representative of a binary information supplied by a microprocessor. The device may also include a demodulator which demodulates the modulated signals arriving from a remote site. This may be done by determining the type of modulation of the received signals and their carrier frequency (or frequencies), supplying signals from an analysis of the signals received according to the determined type of modulation, and detecting the signals of determined duration representative of binary information to make them accessible to the microprocessor.

Abstract translation: 能够使用不同载波频率进行多种调制的调制/解调装置可以包括调制器，其通过预定持续时间的信号调制至少一个信号，并且代表由微处理器提供的二进制信息。 该设备还可以包括解调器，其解调从远程站点到达的调制信号。 这可以通过确定接收信号的调制类型及其载波频率（或频率）来​​完成，从根据所确定的调制类型接收的信号的分析提供信号，以及检测表示二进制的确定持续时间的信号 信息使微处理器可访问。