公开(公告)号：US06693303B2

公开(公告)日：2004-02-17

申请号：US10166048

申请日：2002-06-11

Applicant: Hiroyuki Ota ,  Masayuki Sonobe ,  Norikazu Ito ,  Tetsuo Fujii

Inventor： Hiroyuki Ota ,  Masayuki Sonobe ,  Norikazu Ito ,  Tetsuo Fujii

IPC: H01L2713

CPC classification number: H01L33/02 ,  H01L33/08 ,  H01L33/145 ,  H01L33/32

Abstract: A nitride semiconductor device is composed of Group III nitride semiconductors. The device includes an active layer, and a barrier layer made from a predetermined material and provided adjacent to the active layer. The barrier layer has a greater band-gap than that of the active layer. The device also includes a barrier portion formed of the predetermined material for surrounding a threading dislocation in the active layer. The barrier portion has a vertex. The device also includes a semiconductor layer having an impurity concentration ranging from 1E16/cc to 1E17/cc in which the vertex is placed.

Abstract translation: 氮化物半导体器件由III族氮化物半导体组成。 该器件包括有源层和由预定材料制成并邻近有源层提供的阻挡层。 阻挡层具有比有源层更大的带隙。 该装置还包括由预定材料形成的阻挡部分，用于围绕有源层中的穿透位错。 阻挡部分具有顶点。 该器件还包括其中放置顶点的​​杂质浓度范围为1E16 / cc至1E17 / cc的半导体层。

公开(公告)号：US06429506B1

公开(公告)日：2002-08-06

申请号：US09525514

申请日：2000-03-15

Applicant: Tetsuo Fujii ,  Tsuyoshi Fukada ,  Hiroshi Muto ,  Kenichi Ao ,  Shinji Yoshihara ,  Sumitomo Inomata

Inventor： Tetsuo Fujii ,  Tsuyoshi Fukada ,  Hiroshi Muto ,  Kenichi Ao ,  Shinji Yoshihara ,  Sumitomo Inomata

IPC: H01L21301

CPC classification number: H01L21/6836 ,  B29C33/0022 ,  B29C2043/023 ,  B81C1/00888 ,  B81C1/00896 ,  B81C2201/053 ,  H01L2221/68327 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01057 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/16235 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A protective sheet is fixed to a jig, and regions of the protective sheet corresponding to regions where dicing-cut is to be performed are removed to form grooves. Then, a semiconductor wafer is bonded to the protective sheet at an opposite side of the jig, and the jig is detached from the protective sheet and the semiconductor wafer bonded together. After that, the semiconductor wafer is cut into semiconductor chips by dicing along the grooves of the protective sheet. Because the protective sheet is not cut by dicing, no scraps of the protective sheet is produced, thereby preventing contamination to the chips.

Abstract translation: 将保护片固定在夹具上，除去对应于要进行切割的区域的保护片的区域，形成槽。 然后，在夹具的相反侧将半导体晶片接合到保护片，并将夹具与保护片和半导体晶片接合在一起。 之后，通过沿保护片的沟槽切割将半导体晶片切割成半导体芯片。 由于保护片不是通过切割而切割的，所以不会产生保护片的废料，从而防止对芯片的污染。

公开(公告)号：US06373093B1

公开(公告)日：2002-04-16

申请号：US09776769

申请日：2001-02-06

Applicant: Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

Inventor： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

IPC: H01L2976

Abstract: A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.

公开(公告)号：US5627318A

公开(公告)日：1997-05-06

申请号：US508170

申请日：1995-07-27

Applicant: Tetsuo Fujii ,  Masahito Imai

Inventor： Tetsuo Fujii ,  Masahito Imai

IPC: B81B7/00 ,  C07C303/32 ,  C07C303/44 ,  C07C309/17 ,  G01C19/56 ,  G01C19/5656 ,  G01C19/5719 ,  G01P15/125

CPC classification number: B81B7/0006 ,  C07C303/32 ,  C07C303/44 ,  G01C19/56 ,  G01C19/5656 ,  G01C19/5719 ,  G01P15/0802 ,  G01P15/125 ,  B81B2201/0235 ,  G01P2015/0817 ,  G01P2015/0828 ,  Y10T29/49002 ,  Y10T29/49004

Abstract: A semiconductor mechanical sensor having a new structure in which a S/N ratio is improved. In the central portion of a silicon substrate 1, a recess portion 2 is formed which includes a beam structure. A weight is formed at the tip of the beam, and in the bottom surface of the weight in the bottom surface of the recess portion 2 facing the same, an electrode 5 is formed. An alternating current electric power is applied between the weight portion 4 and the electrode 5 so that static electricity is created and the weight is excited by the static electricity. In an axial direction which is perpendicular to the direction of the excitation of the weight, an electrode 6 is disposed to face one surface of the weight and a wall surface of the substrate which faces the same. A change in a capacitance between the facing electrodes is electrically detected, and therefore, a change in a physical force acting in the same direction is detected.

Abstract translation: 具有S / N比提高的新结构的半导体机械传感器。 在硅衬底1的中心部分，形成包括梁结构的凹部2。 在梁的尖端处形成重物，并且在凹部2的底面中的重物的底面中，重物形成为电极5。 在重量部分4和电极5之间施加交流电力，从而产生静电，并且重量被静电激励。 在与重量的激励方向垂直的轴向方向上，电极6设置为面对重物的一个表面和面向其的基板的壁表面。 对面对电极之间的电容变化进行电检测，因此检测到以相同方向作用的物理力的变化。

公开(公告)号：US5523692A

公开(公告)日：1996-06-04

申请号：US215759

申请日：1994-03-22

Applicant: Susumu Kuroyanagi ,  Tetsuo Fujii ,  Kingo Okada ,  Masaei Nozawa ,  Syuji Yamaguchi ,  Kiwamu Naito

Inventor： Susumu Kuroyanagi ,  Tetsuo Fujii ,  Kingo Okada ,  Masaei Nozawa ,  Syuji Yamaguchi ,  Kiwamu Naito

IPC: G01N27/416 ,  G01N33/28 ,  G01R27/08

CPC classification number: G01N33/2888 ,  G01N27/4167

Abstract: An oil deterioration detector comprising a sensitive electrode whose electric potential varies in response to acidity and/or basicity of oil to be measured, and a reference electrode associated with this sensitive electrode. An electrically conductive housing accommodates the sensitive electrode and the reference electrode together with the oil. A potential difference detector detects oil deterioration by measuring a potential difference between the sensitive electrode and the reference electrode. And, an insulating member is interposed between these electrodes and the electrically conductive housing for electrically insulating these electrodes from the electrically conductive housing. The reference electrode is grounded together with the electrically conductive housing. An insulating, hydrophilic porous member would be interposed between the sensitive electrode and the reference electrode.

Abstract translation: 一种油劣化检测器，包括响应于要测量的油的酸度和/或碱度而电位变化的敏感电极和与该敏感电极相关的参考电极。 导电壳体与油一起容纳敏感电极和参考电极。 电位差检测器通过测量敏感电极和参考电极之间的电位差来检测油劣化。 并且，绝缘构件插入在这些电极和用于将这些电极与导电壳体电绝缘的导电壳体之间。 参考电极与导电壳体一起接地。 绝缘的亲水性多孔构件将介于敏感电极和参考电极之间。

公开(公告)号：US5520051A

公开(公告)日：1996-05-28

申请号：US249082

申请日：1994-05-25

Applicant: Tetsuo Fujii ,  Yoshitaka Gotoh ,  Susumu Kuroyanagi

Inventor： Tetsuo Fujii ,  Yoshitaka Gotoh ,  Susumu Kuroyanagi

IPC: G01P15/12 ,  G01L9/00 ,  G01L15/00 ,  G01P15/08 ,  H01L29/84

CPC classification number: G01L9/0042 ,  G01L15/00 ,  G01P15/0802 ,  G01P15/123

Abstract: Device including a strain generating portion supported at least at one end on a substrate and formed in a displaceable manner with respect to the substrate in a cavity of the substrate. A semiconductor strain sensing element, which is disposed at the strain generating portion, detects the amount of strain of the strain generating portion. A support is disposed at a connection point between the strain generating portion and the substrate so as to reinforce the connection point.

Abstract translation: 该装置包括一个应变产生部分，该部分至少在一个端部支撑在衬底上，并且在衬底的空腔中相对于衬底以可移位的方式形成。 设置在应变发生部的半导体应变感测元件检测应变发生部的应变量。 支撑件设置在应变发生部和基板之间的连接点处，以便加强连接点。

公开(公告)号：US5461916A

公开(公告)日：1995-10-31

申请号：US109504

申请日：1993-08-20

Applicant: Tetsuo Fujii ,  Masahito Imai

Inventor： Tetsuo Fujii ,  Masahito Imai

IPC: B81B7/00 ,  C07C303/32 ,  C07C303/44 ,  C07C309/17 ,  G01C19/56 ,  G01C19/5656 ,  G01C19/5719 ,  G01P15/125

CPC classification number: B81B7/0006 ,  C07C303/32 ,  C07C303/44 ,  G01C19/56 ,  G01C19/5656 ,  G01C19/5719 ,  G01P15/0802 ,  G01P15/125 ,  B81B2201/0235 ,  G01P2015/0817 ,  G01P2015/0828 ,  Y10T29/49002 ,  Y10T29/49004

Abstract: A semiconductor mechanical sensor having a new structure in which a S/N ratio is improved. In the central portion of a silicon substrate 1, a recess portion 2 is formed which includes a beam structure. A weight is formed at the tip of the beam, and in the bottom surface of the weight in the bottom surface of the recess portion 2 facing the same, an electrode 5 is formed. An alternating current electric power is applied between the weight portion 4 and the electrode 5 so that static electricity is created and the weight is excited by the static eletricity. In an axial direction which is perpendicular to the direction of the excitation of the weight, an electrode 6 is disposed to face one surface of the weight and a wall surface of the substrate which faces the same. A change in a capacitance between the facing electrodes is electrically detected, and therefore, a change in a physical force acting in the same direction is detected.

Abstract translation: 具有S / N比提高的新结构的半导体机械传感器。 在硅衬底1的中心部分，形成包括梁结构的凹部2。 在梁的尖端处形成重物，并且在凹部2的底面中的重物的底面中，重物形成为电极5。 在重量部分4和电极5之间施加交流电力，从而产生静电，并通过静电电动激发重量。 在与重量的激励方向垂直的轴向方向上，电极6设置为面对重物的一个表面和面向其的基板的壁表面。 对面对电极之间的电容变化进行电检测，因此检测到以相同方向作用的物理力的变化。

公开(公告)号：US5063423A

公开(公告)日：1991-11-05

申请号：US567760

申请日：1990-08-15

Applicant: Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

Inventor： Tetsuo Fujii ,  Minekazu Sakai ,  Akira Kuroyanagi

IPC: H01L21/28 ,  H01L29/788

CPC classification number: H01L21/28273 ,  H01L29/7883

Abstract: A tunnel insulating film of a three-layer structure, wherein an oxide film is interposed between nitrided oxide films, is formed on the surface of a semiconductor substrate. A first polysilicon film serving as a low-concentration impurity region is formed on the tunnel insulating film. An oxide film is formed on that region of the first polysilicon film, which corresponds to the tunnel insulating film, the oxide film having such a thickness that the film can serve as a stopper for impurity diffusion and can allow electrons to pass through. A second polysilicon film, having an impurity concentration higher than that of the first polysilicon film, is formed on the oxide film. The first and second polysilicon films constitute a floating gate. A third polysilicon film serving as a control gate is formed above the second polysilicon film, with an insulating layer interposed therebetween.

Abstract translation: 在半导体衬底的表面上形成三层结构的隧道绝缘膜，其中在氮化氧化物膜之间插入氧化膜。 在隧道绝缘膜上形成用作低浓度杂质区的第一多晶硅膜。 在第一多晶硅膜的与隧道绝缘膜相对应的区域上形成氧化膜，氧化膜具有使膜能够作为用于杂质扩散的阻挡层的厚度，并且可以使电子通过。 在氧化膜上形成杂质浓度高于第一多晶硅膜的第二多晶硅膜。 第一和第二多晶硅膜构成浮栅。 用作控制栅极的第三多晶硅膜形成在第二多晶硅膜上方，绝缘层位于其间。

公开(公告)号：US5028967A

公开(公告)日：1991-07-02

申请号：US494393

申请日：1990-03-16

Applicant: Nobusuke Yamada ,  Koji Tsukuma ,  Tetsuo Fujii ,  Hideaki Segawa ,  Shinichi Kondo ,  Keishi Honta

Inventor： Nobusuke Yamada ,  Koji Tsukuma ,  Tetsuo Fujii ,  Hideaki Segawa ,  Shinichi Kondo ,  Keishi Honta

IPC: C03C3/06 ,  C03C3/076 ,  C03C3/089 ,  G02B1/00 ,  G02B13/14

CPC classification number: C03C3/076 ,  C03C3/06 ,  C03C3/089 ,  G02B1/00 ,  G02B13/143 ,  C03C2201/10 ,  C03C2201/12 ,  C03C2201/31

Abstract: An achromatic lens for ultraviolet rays constituted by (A) high-purity silica glass having a purity of 99.9% or more, or fluorine-containing, high-purity silica glass having a purity of 99.9% or more; and (B) silica glass containing germanium dioxide or silica glass containing germanium dioxide and boron oxide.

Abstract translation: 由（A）纯度为99.9％以上的高纯度二氧化硅玻璃或纯度为99.9％以上的含氟高纯度二氧化硅玻璃构成的紫外线消色差透镜; 和（B）含有二氧化锗或含有二氧化锗和氧化硼的二氧化硅玻璃的二氧化硅玻璃。

公开(公告)号：US5019526A

公开(公告)日：1991-05-28

申请号：US249514

申请日：1988-09-26

Applicant: Hiroyuki Yamane ,  Yasushi Higuchi ,  Tetsuo Fujii

Inventor： Hiroyuki Yamane ,  Yasushi Higuchi ,  Tetsuo Fujii

IPC: H01L21/311 ,  H01L21/762

CPC classification number: H01L21/76213 ,  H01L21/31111 ,  H01L21/76216 ,  Y10S148/117 ,  Y10S438/911

Abstract: A method of manufacturing a semiconductor apparatus having a plurality of elements formed on a substrate comprises forming a pad oxidized film on the surface of the semiconductor substrate, forming a pattern of silicon nitride film to coat device areas on the pad oxidized film, and injecting boron ions into that surface of the pad oxidized film where no silicon nitride film is present, thereby to form a channel stopper region. Using the pattern of the silicon nitride film as a mask, a heat oxidized film is then formed on an elements separating region by heat oxidization, and ions of Si, N, C, or the like are injected into the surface of the heat oxidized film with such an acceleration energy that the ions are not injected into the silicon nitride film thereby to change the quality of the heat oxidized film. The silicon nitride film is removed by etching and the heat oxidized film is etching-treated by a solution of the hydrofluoric acid group to etching-remove particularly the bird's beak portions each of which is present along and under the peripheral rim of an element area of the silicon nitride film.

Abstract translation: 一种制造具有形成在基板上的多个元件的半导体装置的方法包括在半导体基板的表面上形成焊盘氧化膜，形成氮化硅膜的图案以涂覆焊盘氧化膜上的器件区域，并注入硼 离子进入焊盘氧化膜的不存在氮化硅膜的表面，从而形成通道停止区域。 使用氮化硅膜的图案作为掩模，然后通过热氧化在元件分离区域上形成热氧化膜，并且将Si，N，C等的离子注入到热氧化膜的表面 具有这样的加速能量，使得离子不被注入到氮化硅膜中，从而改变热氧化膜的质量。 通过蚀刻去除氮化硅膜，并且通过氢氟酸基团的溶液对热氧化膜进行蚀刻处理，特别是沿着元件区域的外围边缘沿着和/或 氮化硅膜。