Abstract:
Provided is a method of managing memory in a multiprocessor system on chip (MPSoC). According to an aspect of the present invention, locality of memory can be reflected and restricted memory resources can be efficiently used by determining a storage location of a variable or a function which corresponds to a symbol with reference to a symbol table based on memory access frequency of the variable or the function, comparing the determined storage location and a previous storage location, and copying the variable or the function stored in the previous storage location to the determined storage location if the determined storage location is different from the previous storage location.
Abstract:
Provided is a method and apparatus for preventing a stack overflow in an embedded system. The method of preventing a stack overflow includes: reading a maximum stack usage of at least one function for executing a requested operation from maximum stack usages of functions provided from a kernel, which are stored in advance; and processing the requested operation on the basis of the read maximum stack usage of the at least one function and a size of a usable region in a stack for the requested operation. Accordingly, the stack overflow can be prevented without generating a run-time overhead.
Abstract:
A scheduling method, medium and apparatus are provided. In the scheduling method, medium and apparatus, it is possible to prevent the possibility that the order between the priorities of the tasks represented by the expired timers and the tasks requested by the interrupt is reversed while also not deteriorating the performance of a real time operating system (RTOS), even though the number of timers expired when the interrupt occurs or that are already expired before the interrupt occurs is large, by selecting a timer for representing a point of time corresponding to a point of time when an interrupt occurs from among one or more timers each of which representing a task, a point of time assigned to the tasks, and a priority assigned to the task and executing a task represented by the selected timer and one or more tasks requested by the interrupt in order of priority.
Abstract:
A memory device in accordance with embodiments of the present invention includes a reference cell array and a plurality of banks. Each of the banks includes memory cells. A plurality of current copier circuits corresponds to the banks, respectively. Each of the current copier circuits copies a reference current flowing through a reference cell array to generate a reference voltage. A plurality of sense blocks correspond to the banks, respectively. Each of the sense blocks includes a plurality of sense amplifiers for sensing data from a corresponding bank in response to the reference voltage from the corresponding current copier circuit. Memory cell lay-out area is reduced, and sense speed is increased.
Abstract:
A suction head for a mounting apparatus includes: a socket having a first through hole in an inner direction and a fixing member inside the first through hole, one end of the inside of the first through hole being mounted to a hollow shaft by using the fixing member, a nozzle having a second through hole for forming an air passage when sucking parts in the inner direction, a coupling member having a third through hole in the inner direction and plate spring members installed inside the third through hole for supporting the nozzle and for alleviating impact when the nozzle sucks parts, and a holder for fixing the nozzle so that it is not removed from the coupling member.
Abstract:
The present invention relates to an optical filter for selecting a wavelength to be used in an optical communication and optical switching equipment and, more particularly, to an optical filter in order to reduce a sidelobe deteriorating its characteristics. The optical filter according to the present invention includes a plurality of pair gratings formed in a cladding layer, wherein a period of the grating pairs is constant throughout the optical filter, wherein the pair gratings are divided into two unit gratings, and wherein intervals between unit grating within pair grating are spatially different.
Abstract:
Disclosed herein is a novel process for the manufacture of optical bistable switching device including multiple quantum wells. The process is carried out by: supplying a first organo-metallic compound as the source of a first metallic element and a reaction gas continuously while supplying a second organo-metallic compound as the source of a second metallic element in a discrete mode into a reactor and cultivating a semiconductor multiple quantum wells region having multiple pairs of intrinsic semiconductor-layer/semiconductor-layer(GaAs/AlGaAs), one of the layer containing said second metallic element(Al), while controlling the mole fraction of said second metallic element(Al) to be in the range of 0.01 to 0.25 of the total first and second metal contents existing in the layer containing the second metallic element, thereby lowering the impurity concentration and optimizing the negative resistance.
Abstract:
The present invention relates to an exit device door lock and an exit device comprising same. To this end, the exit device of the present invention comprises: a device frame inserted into a door panel; a damper part inserted into the device frame and provided to absorb and damp impact power generated according to the operation of pushing parts; the pushing parts provided at both sides of the damper part to be pressable by a user; a slider provided to slidingly reciprocate along the device frame by the pushing part at the other side; and a slide bar coupled at one side thereof to the slider and provided such that the other side thereof is coupled to a door lock deadbolt by which a door is locked/unlocked.
Abstract:
Provided is a computing system having a hierarchical memory structure. When a data structure is allocated with respect to a task processed in the computing system, the data structure is divided and a portion of the data structure is allocated to a high speed memory of the hierarchical memory structure and a remaining data structure is allocated to a low speed memory of the hierarchical memory.
Abstract:
Provided is a method and apparatus for measuring a performance or a progress state of an application program to perform data processing and execute particular functions in a computing environment using a micro architecture. A thread progress tracking apparatus may include a selector to select at least one thread constituting an application program; a determination unit to determine, based on a predetermined criterion, whether an instruction execution scheme corresponds to a deterministic execution scheme having a regular cycle or a nondeterministic execution scheme having an irregular delay cycle with respect to each of at least one instruction constituting a corresponding thread; and a deterministic progress counter to generate a deterministic progress index with respect to an instruction that is executed by the deterministic execution scheme, excluding an instruction that is executed by the nondeterministic execution scheme.