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    Forming Isolation Regions for Separating Fins and Gate Stacks
    131.
    发明申请
    Forming Isolation Regions for Separating Fins and Gate Stacks 有权

    公开(公告)号：US20220359299A1

    公开(公告)日：2022-11-10

    申请号：US17813850

    申请日：2022-07-20

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chung-Ting Ko ,  Tai-Chun Huang ,  Jr-Hung Li ,  Tze-Liang Lee ,  Chi On Chui

    IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088

    Abstract: A method includes forming a semiconductor fin protruding higher than top surfaces of isolation regions. The isolation regions extend into a semiconductor substrate. A portion of the semiconductor fin is etched to form a trench, which extends lower than bottom surfaces of the isolation regions, and extends into the semiconductor substrate. The method further includes filling the trench with a first dielectric material to form a first fin isolation region, recessing the first fin isolation region to form a first recess, and filling the first recess with a second dielectric material. The first dielectric material and the second dielectric material in combination form a second fin isolation region.

    FINFET DEVICE AND METHOD
    134.
    发明申请
    FINFET DEVICE AND METHOD 有权

    公开(公告)号：US20220231023A1

    公开(公告)日：2022-07-21

    申请号：US17150044

    申请日：2021-01-15

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Tsai-Jung Ho ,  Tze-Liang Lee

    IPC: H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/02

    Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the spacer, and the source/drain region; a contact plug extending through the ILD and contacting the source/drain region; a dielectric layer including a first portion on a top surface of the ILD and a second portion extending between the ILD and the contact plug, wherein a top surface of the second portion is closer to the substrate than the top surface of the ILD; and an air gap between the spacer and the contact plug, wherein the second portion of the dielectric layer seals the top of the air gap.

    Seamless Gap Fill
    135.
    发明申请
    Seamless Gap Fill 有权

    公开(公告)号：US20220157934A1

    公开(公告)日：2022-05-19

    申请号：US17588478

    申请日：2022-01-31

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yen-Chun Huang ,  Bor Chiuan Hsieh ,  Pei-Ren Jeng ,  Tai-Chun Huang ,  Tze-Liang Lee

    IPC: H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L21/762

    Abstract: A method includes depositing a first dielectric layer in an opening, the first dielectric layer comprising a semiconductor element and a non-semiconductor element. The method further includes depositing a semiconductor layer on the first dielectric layer, the semiconductor layer comprising a first element that is the same as the semiconductor element. The method further includes introducing a second element to the semiconductor layer wherein the second element is the same as the non-semiconductor element. The method further includes applying a thermal annealing process to the semiconductor layer to change the semiconductor layer into a second dielectric layer.

    Metal Hard Masks for Reducing Line Bending
    136.
    发明申请
    Metal Hard Masks for Reducing Line Bending 有权

    公开(公告)号：US20220102143A1

    公开(公告)日：2022-03-31

    申请号：US17332553

    申请日：2021-05-27

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chun-Kai Chen ,  JeiMing Chen ,  Tze-Liang Lee

    IPC: H01L21/033 ,  H01L21/311 ,  H01L21/768

    Abstract: A method includes forming a metal-containing hard mask layer over a dielectric layer, wherein the metal-containing hard mask layer has a Young's modulus greater than about 400 MPa and a tensile stress greater than about 600 MPa, patterning the metal-containing hard mask layer to form an opening in the metal-containing hard mask layer, and etching the dielectric layer using the metal-containing hard mask layer as an etching mask. The opening extends into the dielectric layer. The opening is filled with a conductive material to form a conductive feature. The metal-containing hard mask layer is then removed.

    Seamless gap fill
    137.
    发明授权
    Seamless gap fill 有权

    公开(公告)号：US11239310B2

    公开(公告)日：2022-02-01

    申请号：US16889401

    申请日：2020-06-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yen-Chun Huang ,  Bor Chiuan Hsieh ,  Pei-Ren Jeng ,  Tai-Chun Huang ,  Tze-Liang Lee

    IPC: H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L21/762 ,  H01L29/66

    Abstract: A method includes depositing a first dielectric layer in an opening, the first dielectric layer comprising a semiconductor element and a non-semiconductor element. The method further includes depositing a semiconductor layer on the first dielectric layer, the semiconductor layer comprising a first element that is the same as the semiconductor element. The method further includes introducing a second element to the semiconductor layer wherein the second element is the same as the non-semiconductor element. The method further includes applying a thermal annealing process to the semiconductor layer to change the semiconductor layer into a second dielectric layer.

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