公开(公告)号：US12148672B2

公开(公告)日：2024-11-19

申请号：US17581611

申请日：2022-01-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Chun Huang ,  Shu Ling Liao ,  Fang-Yi Liao ,  Yu-Chang Lin

IPC: H01L21/00 ,  H01L21/3115 ,  H01L21/8234 ,  H01L27/088

Abstract: A semiconductor device and a method of forming the same are provided. A device includes a substrate, a first isolation structure over the substrate, a first fin and a second fin over the substrate and extending through the first isolation structure, and a hybrid fin extending into the first isolation structure and interposed between the first fin and the second fin. A top surface of the first fin and a top surface of the second fin are above a top surface of the first isolation structure. A top surface of the hybrid fin is above the top surface of the first isolation structure. The hybrid fin includes an upper region, and a lower region under the upper region. The lower region includes a seam. A topmost portion of the seam is below the top surface of the first fin and the top surface of the second fin.

公开(公告)号：US20230411150A1

公开(公告)日：2023-12-21

申请号：US18362136

申请日：2023-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Je-Ming Kuo ,  Yen-Chun Huang ,  Chih-Tang Peng ,  Tien-I Bao

IPC: H01L21/02 ,  H01L29/06 ,  B05D7/00 ,  H01L21/8234 ,  H01L21/311 ,  H01L21/762 ,  B05D3/06 ,  B05D1/38 ,  H01L21/768 ,  B05D1/00 ,  G03F7/16

CPC classification number: H01L21/02282 ,  H01L21/76828 ,  B05D7/546 ,  H01L21/823481 ,  H01L21/31111 ,  H01L21/02126 ,  H01L21/76224 ,  H01L21/0223 ,  H01L21/02164 ,  H01L21/02348 ,  H01L21/02323 ,  B05D3/067 ,  B05D1/38 ,  H01L21/76825 ,  B05D1/005 ,  H01L21/02255 ,  H01L21/76832 ,  H01L21/76826 ,  G03F7/162 ,  H01L29/0649

Abstract: The present disclosure is generally related to semiconductor devices, and more particularly to a dielectric material formed in semiconductor devices. The present disclosure provides methods for forming a dielectric material layer by a cyclic spin-on coating process. In an embodiment, a method of forming a dielectric material on a substrate includes spin-coating a first portion of a dielectric material on a substrate, curing the first portion of the dielectric material on the substrate, spin-coating a second portion of the dielectric material on the substrate, and thermal annealing the dielectric material to form an annealed dielectric material on the substrate.

公开(公告)号：US11450526B2

公开(公告)日：2022-09-20

申请号：US15992384

申请日：2018-05-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Je-Ming Kuo ,  Yen-Chun Huang ,  Chih-Tang Peng ,  Tien-I Bao

IPC: H01L21/02 ,  H01L21/762 ,  H01L29/06 ,  H01L21/311 ,  H01L21/8234 ,  H01L21/768 ,  B05D1/00 ,  B05D1/38

Abstract: The present disclosure is generally related to semiconductor devices, and more particularly to a dielectric material formed in semiconductor devices. The present disclosure provides methods for forming a dielectric material layer by a cyclic spin-on coating process. In an embodiment, a method of forming a dielectric material on a substrate includes spin-coating a first portion of a dielectric material on a substrate, curing the first portion of the dielectric material on the substrate, spin-coating a second portion of the dielectric material on the substrate, and thermal annealing the dielectric material to form an annealed dielectric material on the substrate.

公开(公告)号：US11444173B2

公开(公告)日：2022-09-13

申请号：US15797973

申请日：2017-10-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsiang-Ku Shen ,  Jin-Mu Yin ,  Tsung-Chieh Hsiao ,  Chia-Lin Chuang ,  Li-Zhen Yu ,  Dian-Hau Chen ,  Shih-Wei Wang ,  De-Wei Yu ,  Chien-Hao Chen ,  Bo-Cyuan Lu ,  Jr-Hung Li ,  Chi-On Chui ,  Min-Hsiu Hung ,  Hung-Yi Huang ,  Chun-Cheng Chou ,  Ying-Liang Chuang ,  Yen-Chun Huang ,  Chih-Tang Peng ,  Cheng-Po Chau ,  Yen-Ming Chen

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/311 ,  H01L29/78 ,  H01L21/768 ,  H01L21/3065 ,  H01L29/45 ,  H01L29/08 ,  H01L29/165

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.

公开(公告)号：US20180350906A1

公开(公告)日：2018-12-06

申请号：US16043244

申请日：2018-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Chun Huang ,  Bor Chiuan Hsieh ,  Pei-Ren Jeng ,  Tai-Chun Huang ,  Tze-Liang Lee

IPC: H01L29/06 ,  H01L21/762 ,  H01L21/324 ,  H01L21/02

Abstract: A method includes depositing a first dielectric layer in an opening, the first dielectric layer comprising a semiconductor element and a non-semiconductor element. The method further includes depositing a semiconductor layer on the first dielectric layer, the semiconductor layer comprising a first element that is the same as the semiconductor element. The method further includes introducing a second element to the semiconductor layer wherein the second element is the same as the non-semiconductor element. The method further includes applying a thermal annealing process to the semiconductor layer to change the semiconductor layer into a second dielectric layer.

公开(公告)号：US20220157934A1

公开(公告)日：2022-05-19

申请号：US17588478

申请日：2022-01-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Chun Huang ,  Bor Chiuan Hsieh ,  Pei-Ren Jeng ,  Tai-Chun Huang ,  Tze-Liang Lee

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L21/762

Abstract: A method includes depositing a first dielectric layer in an opening, the first dielectric layer comprising a semiconductor element and a non-semiconductor element. The method further includes depositing a semiconductor layer on the first dielectric layer, the semiconductor layer comprising a first element that is the same as the semiconductor element. The method further includes introducing a second element to the semiconductor layer wherein the second element is the same as the non-semiconductor element. The method further includes applying a thermal annealing process to the semiconductor layer to change the semiconductor layer into a second dielectric layer.

公开(公告)号：US11239310B2

公开(公告)日：2022-02-01

申请号：US16889401

申请日：2020-06-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Chun Huang ,  Bor Chiuan Hsieh ,  Pei-Ren Jeng ,  Tai-Chun Huang ,  Tze-Liang Lee

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L21/762 ,  H01L29/66

Abstract: A method includes depositing a first dielectric layer in an opening, the first dielectric layer comprising a semiconductor element and a non-semiconductor element. The method further includes depositing a semiconductor layer on the first dielectric layer, the semiconductor layer comprising a first element that is the same as the semiconductor element. The method further includes introducing a second element to the semiconductor layer wherein the second element is the same as the non-semiconductor element. The method further includes applying a thermal annealing process to the semiconductor layer to change the semiconductor layer into a second dielectric layer.

公开(公告)号：US11798984B2

公开(公告)日：2023-10-24

申请号：US17588478

申请日：2022-01-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Chun Huang ,  Bor Chiuan Hsieh ,  Pei-Ren Jeng ,  Tai-Chun Huang ,  Tze-Liang Lee

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L21/762 ,  H01L29/66

CPC classification number: H01L29/0649 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/0262 ,  H01L21/02532 ,  H01L21/324 ,  H01L21/76227 ,  H01L29/66795

Abstract: A method includes depositing a first dielectric layer in an opening, the first dielectric layer comprising a semiconductor element and a non-semiconductor element. The method further includes depositing a semiconductor layer on the first dielectric layer, the semiconductor layer comprising a first element that is the same as the semiconductor element. The method further includes introducing a second element to the semiconductor layer wherein the second element is the same as the non-semiconductor element. The method further includes applying a thermal annealing process to the semiconductor layer to change the semiconductor layer into a second dielectric layer.

公开(公告)号：US20230155006A1

公开(公告)日：2023-05-18

申请号：US17744061

申请日：2022-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi Kao ,  Fang-Yi Liao ,  Shu Ling Liao ,  Yen-Chun Huang ,  Che-Hao Chang ,  Yung-Cheng Lu ,  Chi On Chui

IPC: H01L29/66 ,  H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/762

CPC classification number: H01L29/66795 ,  H01L27/0886 ,  H01L29/7851 ,  H01L29/0649 ,  H01L21/823431 ,  H01L21/76224

Abstract: Semiconductor devices including fin-shaped isolation structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a fin extending from a semiconductor substrate; a shallow trench isolation (STI) region over the semiconductor substrate adjacent the fin; and a dielectric fin structure over the STI region, the dielectric fin structure extending in a direction parallel to the fin, the dielectric fin structure including a first liner layer in contact with the STI region; and a first fill material over the first liner layer, the first fill material including a seam disposed in a lower portion of the first fill material and separated from a top surface of the first fill material, a first carbon concentration in the lower portion of the first fill material being greater than a second carbon concentration in an upper portion of the first fill material.

公开(公告)号：US20190341294A1

公开(公告)日：2019-11-07

申请号：US16517934

申请日：2019-07-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jian-Shiou Huang ,  Bang-Tai Tang ,  Chih-Tang Peng ,  Tai-Chun Huang ,  Yen-Chun Huang

IPC: H01L21/762 ,  H01L21/02 ,  H01L21/8234

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor device having an enhanced gap fill layer in trenches. The present disclosure provides a novel gap fill layer formed using a multi-step deposition and in-situ treatment process. The deposition process can be a flowable chemical vapor deposition (FCVD) utilizing one or more assist gases and molecules of low reactive sticking coefficient (RSC). The treatment process can be an in-situ process after the deposition process and includes exposing the deposited gap fill layer to plasma activated assist gas. The assist gas can be formed of ammonia. The low RSC molecule can be formed of trisilylamin (TSA) or perhydropolysilazane (PHPS).