Abstract:
A characterized cell library for EDA tools includes one or more mathematical models for each cell, and one or more preconditioning functions (and/or inverse preconditioning functions) for each mathematical model. Each mathematical model represents a performance parameter (e.g., delay, power consumption, noise) or a preconditioned performance parameter of the cell. The preconditioning functions convert an operating parameter (e.g., input slew, output capacitance) associated with the performance parameter into a preconditioned input variable for the mathematical models. In doing so, the preconditioning functions allow for more accurate modeling of complex data relationships without increasing the complexity (e.g., order and number of coefficients) of the mathematical models. Also, because the cell library can be substantially similar to conventional polynomial-based cell libraries except for the inclusion of preconditioning functions, preconditioning does not significantly increase storage requirements and conventional EDA tools can be readily adapted to use the preconditioned cell library.
Abstract:
Nanowire and larger, post-based HEMTs, arrays of such HEMTs, and methods for their manufacture are provided. In one embodiment, a HEMT can include a III-N based core-shell structure including a core member (e.g., GaN), a shell member (e.g., AlGaN) surrounding a length of the core member and a two-dimensional electron gas (2-DEG) at the interface therebetween. The core member including a nanowire and/or a post can be disposed over a doped buffer layer and a gate material can be disposed around a portion of the shell member. Exemplary methods for making the nanowire HEMTs and arrays of nanowire HEMTs can include epitaxially forming nanowire(s) and epitaxially forming a shell member from each formed nanowire. Exemplary methods for making the post HEMTs and arrays of post HEMTs can include etching a III-N layer to form III-N post(s) followed by formation of the shell member(s).
Abstract:
Techniques to provide a replica bias circuit for a high speed and low voltage common mode driver. In an embodiment, a pre-driver is coupled to provide driver input voltages to the driver, which driver includes a set of circuit elements coupled to provide, based on the driver input voltages, an output signal of a differential output. In another embodiment, a regulator circuit is coupled to provide regulated power to the pre-driver and driver, where the regulator circuit includes a scale replica circuit having a replica of the first set of circuit elements.
Abstract:
An assembly determines an analyte concentration in a sample of body fluid. The assembly includes a test sensor having a fluid-receiving area for receiving a sample of body fluid, where the fluid-receiving area contains a reagent that produces a measurable reaction with an analyte in the sample. The assembly also includes a meter having a port or opening configured to receive the test sensor; a measurement system configured to determine a measurement of the reaction between the reagent and the analyte; and a temperature-measuring system configured to determine a measurement of the test-sensor temperature when the test sensor is received into the opening. The meter determines a concentration of the analyte in the sample according to the measurement of the reaction and the measurement of the test-sensor temperature.
Abstract:
A characterized cell library for EDA tools includes one or more mathematical models for each cell, and one or more preconditioning functions (and/or inverse preconditioning functions) for each mathematical model. Each mathematical model represents a performance parameter (e.g., delay, power consumption, noise) or a preconditioned performance parameter of the cell. The preconditioning functions convert an operating parameter (e.g., input slew, output capacitance) associated with the performance parameter into a preconditioned input variable for the mathematical models. In doing so, the preconditioning functions allow for more accurate modeling of complex data relationships without increasing the complexity (e.g., order and number of coefficients) of the mathematical models. Also, because the cell library can be substantially similar to conventional polynomial-based cell libraries except for the inclusion of preconditioning functions, preconditioning does not significantly increase storage requirements and conventional EDA tools can be readily adapted to use the preconditioned cell library.
Abstract:
Novel proton exchange membrane fuel cells and direct methanol fuel cells with nanostructured components are configured with higher precious metal utilization rate at the electrodes, higher power density, and lower cost. To form a catalyst, platinum or platinum-ruthenium nanoparticles are deposited onto carbon-based materials, for example, single-walled, dual-walled, multi-walled and cup-stacked carbon nanotubes. The deposition process includes an ethylene glycol reduction method. Aligned arrays of these carbon nanomaterials are prepared by filtering the nanomaterials with ethanol. A membrane electrode assembly is formed by sandwiching the catalyst between a proton exchange membrane and a diffusion layer that form a first electrode. The second electrode may be formed using a conventional catalyst. The several layers of the MEA are hot pressed to form an integrated unit. Proton exchange membrane fuel cells and direct methanol fuel cells are developed by stacking the membrane electrode assemblies in a conventional manner.
Abstract:
A method, system and device for transferring rights adapted to be associated with items from a rights supplier to a rights consumer, including obtaining a set of rights associated with an item, the set of rights including meta-rights specifying derivable rights that can be derived from the meta-; determining whether the rights consumer is entitled to the derivable rights specified by the meta-rights; and deriving at least one right from the derivable rights, if the rights consumer is entitled to the derivable rights specified by the meta-rights, wherein the derived right includes at least one state variable based on the set of rights and used for determining a state of the derived right.
Abstract:
An integrated process flow for forming an NMOS transistor (104) and an embedded SiGe (eSiGe) PMOS transistor (102) using a stress memorization technique (SMT) layer (126). The SMT layer (126) is deposited over both the NMOS transistor (104) and PMOS transistor (102). The portion of SMT layer (126) over PMOS transistor (102) is anisotropically etched to form spacers (128) without etching the portion of SMT layer (126) over NMOS transistor (104). Spacers (128) are used to align the SiGe recess etch and growth to form SiGe source/drain regions (132). The source/drain anneals are performed after etching the SMT layer (126) such that SMT layer (126) provides the desired stress to the NMOS transistor (104) without degrading PMOS transistor (102).
Abstract:
An enhanced library accessible by an EDA tool can include a base curve database and a plurality of curve data sets. Each curve data set refers to a standard cell having certain timing characteristics. To determine those timing characteristics, each curve data set identifies at least one base curve (in the base curve database) as well as a starting current, a peak current, a peak voltage, and a peak time. In one embodiment, each base curve can be normalized. The base curve(s), the starting current, peak current, peak voltage, and peak time can accurately model the functioning of the IC device, e.g. represented by an I(V) curve.
Abstract:
The inventive system includes a host, a network including a security gateway, and a public application. Established are an access session between the network and the host and an application session between the public application and the network. An application session record is created for the application session, and includes the user's public user identity used to access the public application, the user's private user identity used to access the network, a host identity, and an application session time. To determine the private user identity for the application session, the security gateway sends a query with the host identity and the application session time. These are compared with the host identity and access session time in an access session record. If they match, then the private user identity in the access session record is returned, and it is stored as the private user identity in the application session record.