公开(公告)号：US20230145473A1

公开(公告)日：2023-05-11

申请号：US18094320

申请日：2023-01-06

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Madison E. Wale ,  James L. Voelz ,  Dylan W. Southern ,  Dustin L. Holloway

IPC: H01L23/00

CPC classification number: H01L24/82 ,  H01L24/20 ,  H01L24/29 ,  H01L24/45 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/82203 ,  H01L2924/1431 ,  H01L2924/1434

Abstract: Semiconductor devices having redistribution structures, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor assembly comprises a die stack including a plurality of semiconductor dies, and a routing substrate mounted on the die stack. The routing substrate includes an upper surface having a redistribution structure. The semiconductor assembly also includes a plurality of electrical connectors coupling the redistribution structure to at least some of the semiconductor dies. The semiconductor assembly further includes a controller die mounted on the routing substrate. The controller die includes an active surface that faces the upper surface of the routing substrate and is electrically coupled to the redistribution structure, such that the routing substrate and the semiconductor dies are electrically coupled to the controller die via the redistribution structure.

公开(公告)号：US20230025886A1

公开(公告)日：2023-01-26

申请号：US17958986

申请日：2022-10-03

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Chan H. Yoo

IPC: H01L23/522 ,  H01L25/065 ,  H01L23/31 ,  H01L23/528 ,  H01M50/414 ,  H05K9/00

Abstract: Semiconductor device package assemblies and associated methods are disclosed herein. The semiconductor device package assembly includes (1) a base component having a front side and a back side, the base component having a first metallization structure at the front side; (2) a semiconductor device package having a first side, a second side with a recess, and a second metallization structure at the first side and a contacting region exposed in the recess at the second side; (3) an interconnect structure at least partially positioned in the recess at the second side of the semiconductor device package; and (4) a thermoset material or structure between the front side of the base component and the second side of the semiconductor device package. The interconnect structure is in the thermoset material and includes discrete conductive particles electrically coupled to one another.

公开(公告)号：US11482504B2

公开(公告)日：2022-10-25

申请号：US17023143

申请日：2020-09-16

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Madison E. Wale ,  James L. Voelz ,  Dylan W. Southern

IPC: H01L23/00 ,  H01L25/18 ,  H01L23/13 ,  H01L25/065 ,  H01L25/00

Abstract: Systems and methods for a semiconductor device having an edge-notched substrate are provided. The device generally includes a substrate having a front side, a backside having substrate contacts, and an inward notch at an edge of the substrate. The device includes a die having an active side attached to the front side of the substrate and positioned such that bond pads of the die are accessible from the backside of the substrate through the inward notch. The device includes wire bonds routed through the inward notch and electrically coupling the bond pads of the die to the substrate contacts. The device may further include a second die having an active side attached to the backside of the first die and positioned laterally offset from the first die such that the second bond pads are accessible by wire bonds around the edge of the first die and through the inward notch.

公开(公告)号：US11462472B2

公开(公告)日：2022-10-04

申请号：US16985047

申请日：2020-08-04

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Chan H. Yoo

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/528 ,  H01M50/414 ,  H05K9/00 ,  H01L23/522

Abstract: Semiconductor device package assemblies and associated methods are disclosed herein. The semiconductor device package assembly includes (1) a base component having a front side and a back side, the base component having a first metallization structure at the front side; (2) a semiconductor device package having a first side, a second side with a recess, and a second metallization structure at the first side and a contacting region exposed in the recess at the second side; (3) an interconnect structure at least partially positioned in the recess at the second side of the semiconductor device package; and (4) a thermoset material or structure between the front side of the base component and the second side of the semiconductor device package. The interconnect structure is in the thermoset material and includes discrete conductive particles electrically coupled to one another.

公开(公告)号：US11410973B2

公开(公告)日：2022-08-09

申请号：US16939756

申请日：2020-07-27

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Randon K. Richards ,  Aparna U. Limaye ,  Dong Soon Lim ,  Chan H. Yoo ,  Bret K. Street ,  Eiichi Nakano ,  Shijian Luo

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L23/552 ,  H01L23/64 ,  H01L21/78 ,  H01L21/66 ,  H01L25/00 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/48

Abstract: Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed.

公开(公告)号：US20220140468A1

公开(公告)日：2022-05-05

申请号：US17578103

申请日：2022-01-18

Applicant: Micron Technology, Inc.

Inventor： Shijian Luo ,  Owen R. Fay

IPC: H01Q1/22 ,  H01L23/00 ,  H04B1/38 ,  H01L23/66

Abstract: A semiconductor device, or semiconductor device package, that includes a substrate having an antenna structure on a surface of the substrate and a wire bond that electrically connects the antenna structure to the substrate to form an antenna or a first antenna configuration. The substrate may include a second antenna structure with the wire bond connected to the second antenna structure forming a second antenna or antenna configuration. The semiconductor device may include a radio communication device electrically connected to the substrate. The antenna or antenna configuration may be tuned to the requirements of the radio communication device. The antenna configuration may be tuned by connected to different antenna structures on the surface of the substrate. The antenna configuration may be tuned by changing a length of the wire bond, changing a diameter of the wire bond, and/or changing the material of the wire bond.

公开(公告)号：US20220068837A1

公开(公告)日：2022-03-03

申请号：US17524473

申请日：2021-11-11

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Dong Soon Lim ,  Randon K. Richards ,  Aparna U. Limaye

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/31 ,  H01L21/56 ,  H01Q1/22

Abstract: Semiconductor devices with antennas and electromagnetic interference (EMI) shielding, and associated systems and methods, are described herein. In one embodiment, a semiconductor device includes a semiconductor die coupled to a package substrate. An antenna structure is disposed over and/or adjacent the semiconductor die. An electromagnetic interference (EMI) shield is disposed between the semiconductor die and the antenna structure to shield at least the semiconductor die from electromagnetic radiation generated by the antenna structure and/or to shield the antenna structure from interference generated by the semiconductor die. A first dielectric material and/or a thermal interface material can be positioned between the semiconductor die and the EMI shield, and a second dielectric material can be positioned between the EMI shield and the antenna structure. In some embodiments, the semiconductor device includes a package molding over at least a portion of the antenna, the EMI shield, and/or the second dielectric material.

公开(公告)号：US11239129B2

公开(公告)日：2022-02-01

申请号：US17006740

申请日：2020-08-28

Applicant: Micron Technology, Inc.

Inventor： Andrew M. Bayless ,  Wayne H. Huang ,  Owen R. Fay

IPC: H01L23/31 ,  H01L23/473 ,  H01L21/56 ,  H01L23/36 ,  H01L23/467

Abstract: A semiconductor device assembly can include a first die package comprising a bottom side; a top side; and lateral sides extending between the top and bottom sides. The assembly can include an encapsulant material encapsulating the first die package. In some embodiments, the assembly includes a cooling cavity in the encapsulant material. The cooling cavity can have a first opening; a second opening; and an elongate channel extending from the first opening to the second opening. In some embodiments, the elongate channel surrounds at least two of the lateral sides of the first die package. In some embodiments, the elongate channel is configured to accommodate a cooling fluid.

公开(公告)号：US20210183842A1

公开(公告)日：2021-06-17

申请号：US16715242

申请日：2019-12-16

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Chan H. Yoo

IPC: H01L25/18 ,  H01L25/16 ,  H01L23/48 ,  H01L23/00 ,  H01L25/00

Abstract: An interposer comprises a semiconductor material and includes cache memory under a location on the interposer for a host device. Memory interface circuitry may also be located under one or more locations on the interposer for memory devices. Microelectronic device assemblies incorporating such an interposer and comprising a host device and multiple memory devices are also disclosed, as are methods of fabricating such microelectronic device assemblies.

公开(公告)号：US10784224B2

公开(公告)日：2020-09-22

申请号：US16541449

申请日：2019-08-15

Applicant: Micron Technology, Inc.

Inventor： Suresh Yeruva ,  Kyle K. Kirby ,  Owen R. Fay ,  Sameer S. Vadhavkar

IPC: H01L23/00 ,  H01L23/24 ,  H01L21/56 ,  H01L23/31

Abstract: Semiconductor devices with underfill control features, and associated systems and methods. A representative system includes a substrate having a substrate surface and a cavity in the substrate surface, and a semiconductor device having a device surface facing toward the substrate surface. The semiconductor device further includes at least one circuit element electrically coupled to a conductive structure. The conductive structure is electrically connected to the substrate, and the semiconductor device further has a non-conductive material positioned adjacent the conductive structure and aligned with the cavity of the substrate. An underfill material is positioned between the substrate and the semiconductor device. In other embodiments, in addition to or in lieu of the con-conductive material, a first conductive structure is connected within the cavity, and a second conductive structure connected outside the cavity. The first conductive structure extends away from the device surface a greater distance than does the second conductive structure.