公开(公告)号：US09627350B2

公开(公告)日：2017-04-18

申请号：US14959139

申请日：2015-12-04

申请人： Mitsubishi Electric Corporation

发明人： Yasunari Hino ,  Daisuke Kawabata

IPC分类号： H01L21/00 ,  H01L23/00

CPC分类号： H01L24/83 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/2711 ,  H01L2224/27334 ,  H01L2224/27505 ,  H01L2224/27848 ,  H01L2224/29013 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29294 ,  H01L2224/29347 ,  H01L2224/2957 ,  H01L2224/2969 ,  H01L2224/32054 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/48175 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/82203 ,  H01L2224/83192 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2224/83986 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A method for manufacturing a semiconductor device according to the present invention includes: (a) disposing, on a substrate (insulating substrate), a bonding material having a sheet shape and having sinterability; (b) disposing a semiconductor element on the bonding material after the (a); and (c) sintering the bonding material while applying pressure to the bonding material between the substrate and the semiconductor element. The bonding material includes particles of Ag or Cu, and the particles are coated with an organic film.

公开(公告)号：US08033039B2

公开(公告)日：2011-10-11

申请号：US12547575

申请日：2009-08-26

申请人： Edward-yi Chang ,  Li-Han Hsu ,  Chee-Way Oh ,  Wei-Cheng Wu ,  Chin-te Wang

发明人： Edward-yi Chang ,  Li-Han Hsu ,  Chee-Way Oh ,  Wei-Cheng Wu ,  Chin-te Wang

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/66 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/81 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81444 ,  H01L2224/81895 ,  H01L2224/82203 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19033 ,  H01L2224/0401

摘要： In a high frequency flip chip package process of a polymer substrate and a structure thereof, the structure is a one-layer structure packaged by a high frequency flip chip package process to overcome the shortcomings of a conventional two-layer structure packaged by the high frequency flip chip package process. The conventional structure not only incurs additional insertion loss and return loss in its high frequency characteristic, but also brings out a reliability issue. Thus, the manufacturing process of a ceramic substrate in the conventional structure still has the disadvantages of a poor yield rate and a high cost.

摘要翻译： 在聚合物基板的高频倒装芯片封装工艺及其结构中，该结构是通过高频倒装芯片封装工艺封装的单层结构，以克服由高频率封装的常规双层结构的缺点 倒装芯片封装过程。 常规结构不仅在其高频特性中引起额外的插入损耗和回波损耗，而且带来可靠性问题。 因此，传统结构中的陶瓷基板的制造工序仍然具有成品率低，成本高的缺点。

公开(公告)号：US20110186974A1

公开(公告)日：2011-08-04

申请号：US13085602

申请日：2011-04-13

申请人： Edward-yi Chang ,  Li-Han Hsu ,  Chee-Way Oh ,  Wei-Cheng Wu ,  Chin-te Wang

发明人： Edward-yi Chang ,  Li-Han Hsu ,  Chee-Way Oh ,  Wei-Cheng Wu ,  Chin-te Wang

IPC分类号： H01L23/50

CPC分类号： H01L23/66 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/81 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81444 ,  H01L2224/81895 ,  H01L2224/82203 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19033 ,  H01L2224/0401

摘要： A high frequency flip chip package substrate of a polymer is a one-layer structure packaged by a high frequency flip chip package process to overcome the shortcomings of a conventional two-layer structure packaged by the high frequency flip chip package process. The conventional structure not only incurs additional insertion loss and return loss in its high frequency characteristic, but also brings out a reliability issue. Thus, the manufacturing process of a ceramic substrate in the conventional structure still has the disadvantages of a poor yield rate and a high cost.

摘要翻译： 聚合物的高频倒装芯片封装衬底是通过高频倒装芯片封装工艺封装的单层结构，以克服通过高频倒装芯片封装工艺封装的常规双层结构的缺点。 常规结构不仅在其高频特性中引起额外的插入损耗和回波损耗，而且带来可靠性问题。 因此，传统结构中的陶瓷基板的制造工序仍然具有成品率低，成本高的缺点。

公开(公告)号：US08946852B2

公开(公告)日：2015-02-03

申请号：US13807210

申请日：2011-06-10

申请人： Hiroyuki Niwa

发明人： Hiroyuki Niwa

IPC分类号： G03F7/023 ,  H01L23/00 ,  H01L23/29

CPC分类号： G03F7/0233 ,  C08G73/1042 ,  C08G73/1046 ,  C08G73/106 ,  C08L79/08 ,  G03F7/0226 ,  G03F7/0236 ,  G03F7/038 ,  H01L23/293 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/26 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/1146 ,  H01L2224/1148 ,  H01L2224/11845 ,  H01L2224/13147 ,  H01L2224/27416 ,  H01L2224/276 ,  H01L2224/29036 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81903 ,  H01L2224/82203 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2924/10253 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/351 ,  C08L63/00 ,  C08L33/04 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

摘要： A photosensitive resin composition contains: (a) an alkali-soluble polyimide; (b) a compound which has two or more epoxy groups and/or oxetanyl groups in each molecule; and (c) a quinonediazide compound. Less than 10 parts by weight of an acrylic resin is contained per 100 parts by weight of the polyimide (a); and the content of the compound (b) is not less than 20 parts by weight per 100 parts by weight of the polyimide (a).

摘要翻译： 感光性树脂组合物含有：（a）碱溶性聚酰亚胺; （b）在每个分子中具有两个或更多个环氧基和/或氧杂环丁烷基的化合物; 和（c）醌二叠氮化合物。 每100重量份的聚酰亚胺（a）含有少于10重量份的丙烯酸树脂; 化合物（b）的含量相对于100重量份聚酰亚胺（a）为20重量份以上。

公开(公告)号：US20130214379A1

公开(公告)日：2013-08-22

申请号：US13807210

申请日：2011-06-10

申请人： Hiroyuki Niwa

发明人： Hiroyuki Niwa

IPC分类号： G03F7/023 ,  H01L23/00 ,  H01L23/29

CPC分类号： G03F7/0233 ,  C08G73/1042 ,  C08G73/1046 ,  C08G73/106 ,  C08L79/08 ,  G03F7/0226 ,  G03F7/0236 ,  G03F7/038 ,  H01L23/293 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/26 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/1146 ,  H01L2224/1148 ,  H01L2224/11845 ,  H01L2224/13147 ,  H01L2224/27416 ,  H01L2224/276 ,  H01L2224/29036 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81903 ,  H01L2224/82203 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2924/10253 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/351 ,  C08L63/00 ,  C08L33/04 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

摘要： A photosensitive resin composition contains: (a) an alkali-soluble polyimide; (b) a compound which has two or more epoxy groups and/or oxetanyl groups in each molecule; and (c) a quinonediazide compound. Less than 10 parts by weight of an acrylic resin is contained per 100 parts by weight of the polyimide (a); and the content of the compound (b) is not less than 20 parts by weight per 100 parts by weight of the polyimide (a).

摘要翻译： 感光性树脂组合物含有：（a）碱溶性聚酰亚胺; （b）在每个分子中具有两个或更多个环氧基和/或氧杂环丁烷基的化合物; 和（c）醌二叠氮化合物。 每100重量份的聚酰亚胺（a）含有少于10重量份的丙烯酸树脂; 化合物（b）的含量相对于100重量份聚酰亚胺（a）为20重量份以上。

公开(公告)号：US20180359874A1

公开(公告)日：2018-12-13

申请号：US15993935

申请日：2018-05-31

申请人： DYCONEX AG

发明人： Marc Hauer ,  Eckardt Bihler ,  Jochen Held

IPC分类号： H05K5/06 ,  H05K1/02 ,  H05K1/18 ,  H05K1/11 ,  H05K1/03 ,  H05K1/09 ,  H05K3/30 ,  H05K3/40 ,  H05K3/28

CPC分类号： H01L24/82 ,  A61N1/3752 ,  A61N1/3754 ,  H01L23/49811 ,  H01L23/4985 ,  H01L24/24 ,  H01L24/81 ,  H01L24/92 ,  H01L2224/80203 ,  H01L2224/80385 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81898 ,  H01L2224/821 ,  H01L2224/82138 ,  H01L2224/82203 ,  H01L2224/8236 ,  H01L2224/82895 ,  H01L2224/9212 ,  H01L2224/92124 ,  H01L2224/92144 ,  H05K3/4661 ,  H01L2224/80001 ,  H01L2224/82

摘要： An electronic module on a flexible planar circuit substrate with a conductor configuration on a first substrate surface and a plurality of electronic components on the opposite, second substrate surface, wherein the components have component contacts, which are electrically connected selectively by way of vias in the circuit substrate and the conductor configuration, wherein the circuit substrate is a thermoplastic polymer and the component contacts are melted or thermally pressed into the second substrate surface in the region of the vias.

公开(公告)号：US20170084577A1

公开(公告)日：2017-03-23

申请号：US15364715

申请日：2016-11-30

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Francis J. CARNEY ,  Michael J. SEDDON

IPC分类号： H01L25/065 ,  H01L21/768 ,  H01L21/48 ,  H01L25/00

CPC分类号： H01L25/0652 ,  H01L21/486 ,  H01L21/76877 ,  H01L23/13 ,  H01L23/49805 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L24/24 ,  H01L24/25 ,  H01L24/73 ,  H01L24/80 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/06181 ,  H01L2224/06183 ,  H01L2224/08137 ,  H01L2224/11002 ,  H01L2224/14181 ,  H01L2224/14183 ,  H01L2224/16137 ,  H01L2224/16147 ,  H01L2224/24051 ,  H01L2224/24101 ,  H01L2224/24137 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/29019 ,  H01L2224/29021 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/30151 ,  H01L2224/32137 ,  H01L2224/73251 ,  H01L2224/73267 ,  H01L2224/80897 ,  H01L2224/809 ,  H01L2224/81005 ,  H01L2224/81815 ,  H01L2224/81897 ,  H01L2224/821 ,  H01L2224/82121 ,  H01L2224/82138 ,  H01L2224/82203 ,  H01L2224/82815 ,  H01L2224/82862 ,  H01L2224/82874 ,  H01L2224/83141 ,  H01L2224/83203 ,  H01L2224/839 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/10156 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10322 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335 ,  H01L2924/141 ,  H01L2924/1421 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/15159 ,  H01L2924/19104 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2224/03 ,  H05K3/4661 ,  H05K3/4664 ,  H01L2924/00014 ,  H01L2224/80001 ,  H01L2224/82 ,  H01L2924/00012 ,  H01L2224/08 ,  H01L2224/24 ,  H01L2224/83 ,  H01L2924/014

摘要： A semiconductor device has a plurality of interconnected modular units to form a 3D semiconductor package. Each modular unit is implemented as a vertical component or a horizontal component. The modular units are interconnected through a vertical conduction path and lateral conduction path within the vertical component or horizontal component. The vertical component and horizontal component each have an interconnect interposer or semiconductor die. A first conductive via is formed vertically through the interconnect interposer. A second conductive via is formed laterally through the interconnect interposer. The interconnect interposer can be programmable. A plurality of protrusions and recesses are formed on the vertical component or horizontal component, and a plurality of recesses on the vertical component or horizontal component. The protrusions are inserted into the recesses to interlock the vertical component and horizontal component. The 3D semiconductor package can be formed with multiple tiers of vertical components and horizontal components.

公开(公告)号：US20160322327A1

公开(公告)日：2016-11-03

申请号：US14959139

申请日：2015-12-04

申请人： Mitsubishi Electric Corporation

发明人： Yasunari HINO ,  Daisuke KAWABATA

IPC分类号： H01L23/00

CPC分类号： H01L24/83 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/2711 ,  H01L2224/27334 ,  H01L2224/27505 ,  H01L2224/27848 ,  H01L2224/29013 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29294 ,  H01L2224/29347 ,  H01L2224/2957 ,  H01L2224/2969 ,  H01L2224/32054 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/48175 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/82203 ,  H01L2224/83192 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2224/83986 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A method for manufacturing a semiconductor device according to the present invention includes: (a) disposing, on a substrate (insulating substrate), a bonding material having a sheet shape and having sinterability; (b) disposing a semiconductor element on the bonding material after the (a); and (c) sintering the bonding material while applying pressure to the bonding material between the substrate and the semiconductor clement. The bonding material includes particles of Ag or Cu, and the particles are coated with an organic film.

摘要翻译： 根据本发明的半导体器件的制造方法包括：（a）在基板（绝缘基板）上设置具有片状且具有烧结性的接合材料; （b）在（a）之后，在所述接合材料上设置半导体元件; 和（c）在对基板和半导体元件之间的接合材料施加压力的同时烧结接合材料。 接合材料包括Ag或Cu的颗粒，并且颗粒被有机膜涂覆。

公开(公告)号：US09450147B2

公开(公告)日：2016-09-20

申请号：US14194509

申请日：2014-02-28

申请人： LuxVue Technology Corporation

发明人： Kelly McGroddy ,  Hsin-Hua Hu ,  Andreas Bibl ,  Clayton Ka Tsun Chan ,  Daniel Arthur Haeger

IPC分类号： H01L33/14 ,  H01L27/01 ,  H01L33/06 ,  H01L23/00 ,  G09G3/32 ,  H01L25/075 ,  H01L27/15 ,  H01L33/16 ,  H01L33/20 ,  H01L33/00

CPC分类号： H01L33/145 ,  G09G3/32 ,  H01L24/75 ,  H01L24/95 ,  H01L25/0753 ,  H01L27/016 ,  H01L27/156 ,  H01L33/0016 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/06 ,  H01L33/14 ,  H01L33/16 ,  H01L33/20 ,  H01L33/30 ,  H01L33/42 ,  H01L2224/75305 ,  H01L2224/75725 ,  H01L2224/7598 ,  H01L2224/82203 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/00

摘要： Methods and structures for forming arrays of LED devices are disclosed. The LED devices in accordance with embodiments of the invention may include an internally confined current injection area to reduce non-radiative recombination due to edge effects. Several manners for confining current may include etch removal of a current distribution layer, etch removal of a current distribution layer and active layer followed by mesa re-growth, isolation by ion implant or diffusion, quantum well intermixing, and oxide isolation.

摘要翻译： 公开了用于形成LED器件阵列的方法和结构。 根据本发明的实施例的LED器件可以包括内部限制的电流注入区域，以减少由于边缘效应引起的非辐射复合。 限制电流的几种方式可以包括电流分布层的蚀刻去除，电流分布层和活性层的蚀刻去除，随后的台面再生长，通过离子注入或扩散的分离，量子阱混合和氧化物隔离。

公开(公告)号：US09136220B2

公开(公告)日：2015-09-15

申请号：US13607906

申请日：2012-09-10

申请人： Kenta Uchiyama

发明人： Kenta Uchiyama

IPC分类号： H01L23/48 ,  H01L23/538 ,  H01L21/56 ,  H01L25/03 ,  H01L25/065 ,  H01L21/683 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H05K1/18

CPC分类号： H01L23/5389 ,  H01L21/4857 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16237 ,  H01L2224/24246 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29355 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81191 ,  H01L2224/82203 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2225/06524 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15183 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/185 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2924/01047 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor package includes a first semiconductor chip including a target circuit surface and a side surface, a first sealing insulating layer including a first surface positioned toward the target circuit surface and configured to seal the target circuit surface and the side surface, at least one wiring layer formed on the first surface of the first sealing insulating layer, at least one insulating layer formed on the at least one wiring layer, a second semiconductor chip mounted on the at least one insulating layer, and a second sealing insulating layer formed on the at least one insulating layer and configured to seal the second semiconductor chip.

摘要翻译： 半导体封装包括：包括目标电路表面和侧表面的第一半导体芯片;第一密封绝缘层，包括朝向目标电路表面定位的第一表面，并且被构造成密封目标电路表面和侧表面;至少一个布线 形成在所述第一密封绝缘层的第一表面上的至少一个绝缘层，形成在所述至少一个布线层上的至少一个绝缘层，安装在所述至少一个绝缘层上的第二半导体芯片，以及形成在所述至少一个绝缘层上的第二密封绝缘层 至少一个绝缘层，并被配置为密封第二半导体芯片。