公开(公告)号：US20170092776A1

公开(公告)日：2017-03-30

申请号：US15372493

申请日：2016-12-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Masashi TSUBUKU ,  Kosei NODA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L29/24 ,  G06K19/077 ,  H01L29/66 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/088

CPC classification number: H01L29/26 ,  G06K19/07758 ,  G11C7/00 ,  G11C19/28 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78609 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2223/6677 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel fog nation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US20170052415A1

公开(公告)日：2017-02-23

申请号：US15344795

申请日：2016-11-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hiroyuki MIYAKE ,  Kouhei TOYOTAKA ,  Masahiko HAYAKAWA ,  Daisuke MATSUBAYASHI ,  Shinpei MATSUDA

IPC: G02F1/1343 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/1343 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: The following semiconductor device provides high reliability and a narrower frame width. The semiconductor device includes a driver circuit and a pixel portion. The driver circuit has a first transistor including a first gate and a second gate electrically connected to each other with a semiconductor film sandwiched therebetween, and a second transistor electrically connected to the first transistor. The pixel portion includes a third transistor, a liquid crystal element, and a capacitor. The liquid crystal element includes a first transparent conductive film electrically connected to the third transistor, a second conductive film, and a liquid crystal layer. The capacitor includes the first conductive film, a third transparent conductive film, and a nitride insulating film. The nitride insulating film is positioned between the first transparent conductive film and the third transparent conductive film, and positioned between the semiconductor film and the second gate of the first transistor.

Abstract translation: 以下半导体器件提供高可靠性和较窄的帧宽度。 半导体器件包括驱动电路和像素部分。 驱动电路具有包括第一栅极和第二栅极的第一晶体管，其中夹在其间的半导体膜彼此电连接，第二晶体管与第一晶体管电连接。 像素部分包括第三晶体管，液晶元件和电容器。 液晶元件包括与第三晶体管电连接的第一透明导电膜，第二导电膜和液晶层。 电容器包括第一导电膜，第三透明导电膜和氮化物绝缘膜。 氮化物绝缘膜位于第一透明导电膜和第三透明导电膜之间，位于第一晶体管的半导体膜和第二栅极之间。

公开(公告)号：US20160335979A1

公开(公告)日：2016-11-17

申请号：US15223659

申请日：2016-07-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroyuki MIYAKE ,  Daisuke MATSUBAYASHI

IPC: G09G3/36 ,  H01L27/12

CPC classification number: G09G3/3696 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/043 ,  G09G2310/0286 ,  G09G2320/0214 ,  G09G2330/00 ,  H01L27/1225 ,  H01L27/124

Abstract: To prevent an influence of normally-on characteristics of the transistor which a clock signal is input to a terminal of, a wiring to which a first low power supply potential is applied and a wiring to which a second low power supply potential lower than the first low power supply potential is applied are electrically connected to a gate electrode of the transistor. A semiconductor device including the transistor can operate stably.

Abstract translation: 为了防止输入时钟信号的晶体管的常开特性对施加第一低电源电位的布线和低于第一低电源电位的第二低电源电位的布线的端子的影响 低电源电位被施加电连接到晶体管的栅电极。 包括晶体管的半导体器件可以稳定地工作。

公开(公告)号：US20160314851A1

公开(公告)日：2016-10-27

申请号：US15203885

申请日：2016-07-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiko AMANO ,  Kouhei TOYOTAKA ,  Hiroyuki MIYAKE ,  Aya MIYAZAKI ,  Hideaki SHISHIDO ,  Koji KUSUNOKI

IPC: G11C19/28 ,  G09G3/36 ,  H01L27/12

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0809 ,  G09G2310/0286 ,  G11C19/184 ,  H01L25/03 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/1288 ,  H01L2924/0002 ,  H03K19/0013 ,  H05K7/02 ,  H01L2924/00

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

公开(公告)号：US20160307934A1

公开(公告)日：2016-10-20

申请号：US15134910

申请日：2016-04-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Hiroyuki MIYAKE ,  Jun KOYAMA

IPC: H01L27/12 ,  H01L27/32 ,  H01L27/02

CPC classification number: H01L27/1244 ,  H01L27/0296 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3248 ,  H01L27/3276 ,  H01L2227/323

Abstract: To provide a novel display device. The display device includes a pixel portion, a driver circuit portion that is provided outside the pixel portion, and a protection circuit that is electrically connected to one of or both the pixel portion and the driver circuit portion and includes a pair of electrodes. The pixel portion includes pixel electrodes arranged in a matrix and transistors electrically connected to the pixel electrodes. The transistor includes a first insulating layer containing nitrogen and silicon, and a second insulating layer containing oxygen, nitrogen, and silicon. The protection circuit includes the first insulating layer between the pair of electrodes.

Abstract translation: 提供一种新颖的显示设备。 显示装置包括像素部分，设置在像素部分外部的驱动器电路部分，以及电连接到像素部分和驱动器电路部分中的一个或两个并且包括一对电极的保护电路。 像素部分包括以矩阵布置的像素电极和电连接到像素电极的晶体管。 该晶体管包括含有氮和硅的第一绝缘层和含有氧，氮和硅的第二绝缘层。 保护电路包括一对电极之间的第一绝缘层。

公开(公告)号：US20160140921A1

公开(公告)日：2016-05-19

申请号：US15007999

申请日：2016-01-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Hiroyuki MIYAKE

IPC: G09G3/36

CPC classification number: G09G3/3618 ,  G02F1/1345 ,  G06F3/0416 ,  G06F3/0421 ,  G06F3/044 ,  G09G3/3648 ,  G09G3/3655 ,  G09G3/3696 ,  G09G2300/0809 ,  G09G2310/04 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2320/0209 ,  G09G2320/0219 ,  G09G2320/10 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2340/0435 ,  G09G2340/16 ,  G09G2354/00

Abstract: The liquid crystal display device includes a first substrate provided with a terminal portion, a switching transistor, a driver circuit portion, and a pixel circuit portion including a pixel transistor and a plurality of pixels, a second substrate provided with a common electrode electrically connected to the terminal portion through the switching transistor, and liquid crystal between a pixel electrode and the common electrode. In a period during which a still image is switched to a moving image, the following steps are sequentially performed: a first step of supplying the common potential to the common electrode; a second step of supplying a power supply voltage to the driver circuit portion; a third step of supplying a clock signal to the driver circuit portion; and a fourth step of supplying a start pulse signal to the driver circuit portion.

公开(公告)号：US20160133651A1

公开(公告)日：2016-05-12

申请号：US14982042

申请日：2015-12-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroyuki MIYAKE ,  Junichi KOEZUKA ,  Masami JINTYOU ,  Yukinori SHIMA ,  Shunpei YAMAZAKI

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/7869

Abstract: A light-emitting device capable of suppressing variation in luminance among pixels is provided. A light-emitting device includes a pixel and first and second circuits. The first circuit has a function of generating a signal including a value of current extracted from the pixel. The second circuit has a function of correcting an image signal by the signal. The pixel includes at least a light-emitting element and first and second transistors. The first transistor has a function of controlling supply of the current to the light-emitting element by the image signal. The second transistor has a function of controlling extraction of the current from the pixel. A semiconductor film of each of the first and second transistors includes a first semiconductor region overlapping with a gate, a second semiconductor region in contact with a source or a drain, and a third semiconductor region between the first and second semiconductor regions.

公开(公告)号：US20160042807A1

公开(公告)日：2016-02-11

申请号：US14921073

申请日：2015-10-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroyuki MIYAKE ,  Seiko AMANO

IPC: G11C19/28

CPC classification number: G11C19/28 ,  G09G3/3266 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0417 ,  G09G2310/0267 ,  G09G2320/0223 ,  G09G2320/0285

Abstract: The shift register includes first to fourth flip-flops. A first clock signal which is in a first voltage state in a first period and in a second voltage state in second to fourth periods is input to the first flip-flop. A second clock signal which is in the first voltage state in the second period and in the second voltage state in the third period and the fourth period is input to the second flip-flop. A third clock signal which is in the second voltage state in the first, second, and fourth periods and in the first voltage state in the third period is input to the third flip-flop. A fourth clock signal which is in the second voltage state in the first and second periods and in the first voltage state in the fourth period is input to the fourth flip-flop.

Abstract translation: 移位寄存器包括第一至第四触发器。 在第一时间段中处于第一电压状态并且在第二至第四周期中处于第二电压状态的第一时钟信号被输入到第一触发器。 第二时钟信号在第二周期和第四周期中的第二周期和第二电压状态下处于第一电压状态，并被输入到第二触发器。 第三时钟信号在第一，第二和第四周期处于第二电压状态，并且在第三周期中处于第一电压状态，被输入到第三触发器。 第四时钟信号在第一和第二周期处于第二电压状态，并且在第四周期中处于第一电压状态，被输入到第四触发器。

公开(公告)号：US20150317020A1

公开(公告)日：2015-11-05

申请号：US14691933

申请日：2015-04-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kazunori WATANABE ,  Hiroyuki MIYAKE ,  Yuji IWAKI ,  Hideaki SHISHIDO ,  Kouhei TOYOTAKA ,  Koji KUSUNOKI

IPC: G06F3/041

CPC classification number: G06F3/044 ,  G02F1/13338 ,  G06F3/0412 ,  G06F2203/04102

Abstract: To increase the detection sensitivity of a touch panel, increase the visibility of a touch panel, provide a bendable touch panel, provide a thin touch panel, or provide a lightweight touch panel. The touch sensor has a first substrate, a first conductive layer, a second conductive layer, and an insulating layer. The first conductive layer includes a region between the first substrate and the second conductive layer. The insulating layer includes a region between the first conductive layer and the second conductive layer. The first conductive layer, the second conductive layer, and the insulating layer form a capacitor. The second conductive layer has an opening. The opening in the second conductive layer and the first conductive layer overlap with each other in a region.

Abstract translation: 为了提高触摸面板的检测灵敏度，增加触摸面板的可视性，提供可弯曲的触摸面板，提供薄的触摸面板或提供轻质的触摸面板。 触摸传感器具有第一基板，第一导电层，第二导电层和绝缘层。 第一导电层包括在第一基板和第二导电层之间的区域。 绝缘层包括在第一导电层和第二导电层之间的区域。 第一导电层，第二导电层和绝缘层形成电容器。 第二导电层具有开口。 第二导电层和第一导电层中的开口在一个区域中彼此重叠。

公开(公告)号：US20150301382A1

公开(公告)日：2015-10-22

申请号：US14692297

申请日：2015-04-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Tetsuji ISHITANI ,  Ryo HATSUMI ,  Koji KUSUNOKI ,  Hiroyuki MIYAKE

IPC: G02F1/1333 ,  G02F1/1343

CPC classification number: G06F3/044 ,  G06F3/0412 ,  G09G3/3618 ,  G09G2340/0435

Abstract: A novel liquid crystal display device (LCD) including a touch sensor. The LCD includes a first substrate and a second substrate, which face each other, and a liquid crystal layer. The first substrate is provided with a pixel electrode. The second substrate is provided with a first electrode, a second electrode, and an insulating layer. The pixel electrode overlaps with the first electrode with the liquid crystal layer interposed therebetween. The second electrode overlaps with the first electrode with the insulating layer interposed therebetween. The LCD generates a signal corresponding to a potential of the second electrode. This structure enables a thin and lightweight LCD.

Abstract translation: 一种包括触摸传感器的新型液晶显示装置（LCD）。 LCD包括彼此面对的第一基板和第二基板以及液晶层。 第一基板设置有像素电极。 第二基板设置有第一电极，第二电极和绝缘层。 像素电极与第一电极重叠，液晶层插入其间。 第二电极与第一电极重叠，绝缘层置于其间。 LCD产生对应于第二电极的电位的信号。 这种结构使薄型轻便的液晶显示器。