公开(公告)号：US07456432B2

公开(公告)日：2008-11-25

申请号：US11561593

申请日：2006-11-20

Applicant: Yi-Fan Shih ,  Chun-Yen Liu ,  Kuo-Bin Hsu ,  Chang-Ho Tseng ,  Shih-Chang Chang

Inventor： Yi-Fan Shih ,  Chun-Yen Liu ,  Kuo-Bin Hsu ,  Chang-Ho Tseng ,  Shih-Chang Chang

IPC: H01L27/12

CPC classification number: H01L27/0248 ,  G02F1/136204 ,  H01L27/124 ,  Y10T29/49204

Abstract: A system having an electrostatic discharge protection structure and a method for manufacturing the structure are provided. The structure comprises a conducting layer, a material layer and a bridging layer wherein the conducting layer is divided into a first conducting portion and a second conducting portion to form a gap therebetween. The material layer is disposed onto the conducting layer, forming a first via hole to expose a part of the first conducting portion and a second via hole to expose a part of the second conducting portion. Finally, the bridging layer disposed onto the material layer electrically connects the first conducting portion to the second conducting portion within the first and second via holes, whereby the electrostatic produced during the manufacturing process would be prevented from damaging the driver circuits.

Abstract translation: 提供一种具有静电放电保护结构的系统和用于制造该结构的方法。 该结构包括导电层，材料层和桥接层，其中导电层被分成第一导电部分和第二导电部分，以在它们之间形成间隙。 材料层设置在导电层上，形成第一通孔以暴露第一导电部分的一部分和第二通孔，以露出第二导电部分的一部分。 最后，布置在材料层上的桥接层将第一和第二通孔内的第一导电部分电连接到第二导电部分，从而防止在制造过程中产生的静电损坏驱动电路。

公开(公告)号：US07449716B2

公开(公告)日：2008-11-11

申请号：US11758013

申请日：2007-06-05

Applicant: Ming-Yao Chen ,  Sheng-Shu Yang ,  Shyh-Ming Chang ,  Ngai Tsang

Inventor： Ming-Yao Chen ,  Sheng-Shu Yang ,  Shyh-Ming Chang ,  Ngai Tsang

IPC: H01L23/58 ,  H01L23/544

CPC classification number: H01L23/49816 ,  H01L22/12 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/06505 ,  H01L2224/10135 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14505 ,  H01L2224/16 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15787 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A bump structure on a substrate including at least one first electrode, at least one first bump, at least one second bump is provided. The first electrode is disposed on the substrate. The first bump is disposed on the first electrode. The second bump is disposed on the substrate. The height of the second bump is greater than that of the first bump. The elastic bump of the present invention can be used for measuring the bonding process quality.

Abstract translation: 提供了包括至少一个第一电极，至少一个第一凸块，至少一个第二凸块的衬底上的凸块结构。 第一电极设置在基板上。 第一凸块设置在第一电极上。 第二凸块设置在基板上。 第二凸块的高度大于第一凸块的高度。 本发明的弹性凸块可用于测量接合工艺质量。

公开(公告)号：US20080272703A1

公开(公告)日：2008-11-06

申请号：US12113991

申请日：2008-05-02

Applicant: Chuan-Yi Chan ,  Chang-Ho Tseng

Inventor： Chuan-Yi Chan ,  Chang-Ho Tseng

IPC: G09G3/20

CPC classification number: H01L27/3265

Abstract: A pixel driving circuit array is disclosed, comprising a first capacitor and a second capacitor. The first capacitor comprises a first electrode, an insulator layer and a common electrode. The second capacitor comprises a second electrode, the insulator layer and the common electrode. The first capacitor and the second capacitor share the same common electrode. The first electrode and the second electrode are on the same plane.

Abstract translation: 公开了一种像素驱动电路阵列，包括第一电容器和第二电容器。 第一电容器包括第一电极，绝缘体层和公共电极。 第二电容器包括第二电极，绝缘体层和公共电极。 第一电容器和第二电容器共用相同的公共电极。 第一电极和第二电极在同一平面上。

公开(公告)号：US20080259005A1

公开(公告)日：2008-10-23

申请号：US11738555

申请日：2007-04-23

Applicant: Keiichi Sano

Inventor： Keiichi Sano

IPC: G09G3/30

CPC classification number: G09G3/3648 ,  G09G3/2088 ,  G09G3/3614 ,  G09G3/3618 ,  G09G2300/0842 ,  G09G2330/021

Abstract: A display panel including a first sub-pixel, a second sub-pixel, and a processing unit is disclosed. The first sub-pixel includes a first storage capacitor for storing a first voltage. The second sub-pixel includes a second storage capacitor for storing a second voltage. The processing unit processes the first voltage and transmits the processed result to the first or the second capacitor according to a control signal group.

Abstract translation: 公开了一种包括第一子像素，第二子像素和处理单元的显示面板。 第一子像素包括用于存储第一电压的第一存储电容器。 第二子像素包括用于存储第二电压的第二存储电容器。 处理单元根据控制信号组处理第一电压并将处理结果发送到第一或第二电容器。

公开(公告)号：US07438947B2

公开(公告)日：2008-10-21

申请号：US11001195

申请日：2004-11-30

Applicant: Tan-Ching Yen ,  Chi-Ming Cheng ,  Kuang-Lung Kuo

Inventor： Tan-Ching Yen ,  Chi-Ming Cheng ,  Kuang-Lung Kuo

IPC: G02B5/20 ,  G02F1/1335

CPC classification number: G02B5/201 ,  B82Y10/00 ,  B82Y40/00 ,  G02F1/133516 ,  G03F7/0002 ,  G03F7/0007

Abstract: A process for fabricating a color filter. An imprint mask accompanied by a dry etching step is used to replace the conventional wet development process. The present invention attains the advantages of increased pattern uniformity of color elements, improved film flatness of color elements, increased resolution, reduced process time, reduced process cost, and elimination of the use of developing solvent to reduce waste treatment and environmental impact.

Abstract translation: 一种制造滤色器的方法。 使用伴随干蚀刻步骤的印迹掩模来代替常规的湿式显影工艺。 本发明具有增加色素的图案均匀性，提高色素的膜平整性，分辨率提高，工艺时间缩短，工艺成本降低以及消除使用显影溶剂以减少废物处理和环境影响的优点。

公开(公告)号：US20080238841A1

公开(公告)日：2008-10-02

申请号：US11731341

申请日：2007-03-29

Applicant: Mu-Chia Lee ,  Hao-Chun Lee ,  I-Lin Wu ,  Chun-Yi Lee ,  Cheng-Hsin Chen

Inventor： Mu-Chia Lee ,  Hao-Chun Lee ,  I-Lin Wu ,  Chun-Yi Lee ,  Cheng-Hsin Chen

IPC: G09G3/36

CPC classification number: G02F1/136213 ,  G02F1/133555 ,  G02F1/133707 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/139 ,  G02F2001/134345

Abstract: A system for displaying images is disclosed. A display panel having a multi-domain pixel structure comprises a plurality of electrodes that are physically separated form one another, each defining a domain within pixel, and a capacitance element, electrically connecting the electrodes.

Abstract translation: 公开了一种用于显示图像的系统。 具有多畴像素结构的显示面板包括彼此物理分离的多个电极，每个限定像素内的畴，以及电连接电极的电容元件。

公开(公告)号：US20080224973A1

公开(公告)日：2008-09-18

申请号：US11686997

申请日：2007-03-16

Applicant: Hendrik Louwsma

Inventor： Hendrik Louwsma

IPC: G09G3/36

CPC classification number: G09G3/342 ,  G09G3/3607 ,  G09G2310/0235 ,  G09G2310/024

Abstract: A color LCD arrangement with a lower substrate, an upper substrate, liquid crystal material between the lower substrate and upper substrate, and a backlight unit with light sources. The backlight unit is divided into a plurality of segments. Each segment has a light source arrangement to generate light with at least a first and a second color. The light sources are driven such that during different fields within a frame different color driving schemes for the segments are used. This provides for a spreading of the color light up both in time and in location, thus, seriously reducing the color break-up problem.

Abstract translation: 具有下基板，上基板，下基板和上基板之间的液晶材料的彩色LCD装置和具有光源的背光单元。 背光单元被分成多个段。 每个段具有用于产生具有至少第一和第二颜色的光的光源装置。 光源被驱动，使得在帧内的不同场中使用用于段的不同颜色驱动方案。 这样可以在时间和位置上均匀分布颜色光，从而严重降低了颜色分解问题。

公开(公告)号：US20080198149A1

公开(公告)日：2008-08-21

申请号：US12030464

申请日：2008-02-13

Applicant: Keitaro YAMASHITA ,  Yasuyuki Onda

Inventor： Keitaro YAMASHITA ,  Yasuyuki Onda

IPC: G06F3/038

CPC classification number: G09G3/3677 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2300/0417 ,  G09G2320/0252 ,  G09G2340/16

Abstract: To apply the overdriving technique to a display device provided with a gate driver circuit on a glass substrate for improving the liquid crystal response time.A gate driver circuit is formed on a glass substrate of a display panel and includes a plurality of gate driver units that are connected to respective gate lines GL. A control circuit controls the gate driver circuit so that the gate driver units sequentially drive the plurality of gate lines GL. The control circuit drives one gate line GL in a first period in each line period, while driving another gate line GL in a second period in each line period. The control circuit causes a delay in driving each gate line GL in the second period from the driving of each gate line GL in the first period with a delay time equal to the time for a plurality of gate lines.

Abstract translation: 将过驱动技术应用于在玻璃基板上设置有栅极驱动电路的显示装置，以改善液晶响应时间。 栅极驱动器电路形成在显示面板的玻璃基板上，并且包括连接到各个栅极线GL的多个栅极驱动器单元。 控制电路控制栅极驱动器电路，使得栅极驱动器单元依次驱动多个栅极线GL。 控制电路在每个行周期中在第一周期中驱动一个栅极线GL，同时在每个行周期中的第二周期中驱动另一个栅极线GL。 控制电路在第一时段中的每个栅极线GL的驱动与延迟时间等于多个栅极线的时间的情况下，在第二时段中驱动每个栅极线GL延迟。

公开(公告)号：US07414604B2

公开(公告)日：2008-08-19

申请号：US10935860

申请日：2004-09-07

Applicant: Ching-Wei Lin ,  Shih-Chang Chang ,  Chun-Hsiang Fang

Inventor： Ching-Wei Lin ,  Shih-Chang Chang ,  Chun-Hsiang Fang

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G2300/0876 ,  G09G2330/021

Abstract: A method and circuit for driving LCD are provided. Because the conventional Vcom inversion drive method cannot be applied in a self-aligned process, the power consumption cannot be reduced when the size of the transistor decreases. The method and circuit provided uses two different AC signals to provide different reference voltages for the storage capacitor and the liquid crystal capacitor in a pixel respectively. Therefore, it can be applied to the self-aligned process to reduce the power consumption.

Abstract translation: 提供了一种用于驱动LCD的方法和电路。 由于传统的Vcom反转驱动方法不能应用于自对准过程中，所以当晶体管的尺寸减小时，功耗不能降低。 所提供的方法和电路使用两个不同的AC信号来分别为像素中的存储电容器和液晶电容器提供不同的参考电压。 因此，它可以应用于自对准过程以降低功耗。

公开(公告)号：US07385441B2

公开(公告)日：2008-06-10

申请号：US11535499

申请日：2006-09-27

Applicant: Ping-Lin Liu

Inventor： Ping-Lin Liu

IPC: H03K7/08

CPC classification number: H03K19/01714

Abstract: A buffer circuit has a first transistor and a second transistor in a cascode, and a buffer switch coupled from an output of the buffer to a gate of the second transistor. The buffer circuit is bootstrapped by a bootstrap capacitor, a diode circuit, and a bootstrap switch. The bootstrap capacitor is coupled from the output to the gate of the second transistor through the bootstrap switch. A potential difference is set up across the bootstrap capacitor through the diode circuit. When a low input is given to the buffer circuit, the second transistor turns off and the output goes to a high bias voltage through the first transistor. When a high input is given, the first transistor turns off, the second transistor turns on, and as the output goes low, the gate of the second transistor is bootstrapped to drop the output completely down to a low bias voltage.

Abstract translation: 缓冲电路具有共源共栅中的第一晶体管和第二晶体管，以及从缓冲器的输出端耦合到第二晶体管的栅极的缓冲器开关。 缓冲电路由自举电容器，二极管电路和自举开关自举。 自举电容器通过自举开关从输出端耦合到第二晶体管的栅极。 通过二极管电路在自举电容器之间建立电位差。 当向缓冲器电路提供低输入时，第二晶体管截止，并且输出通过第一晶体管达到高偏置电压。 当给定高输入时，第一晶体管截止，第二晶体管导通，并且随着输出变低，第二晶体管的栅极被自举地将输出完全降低到低偏置电压。