Radio frequency device and electronic apparatus having the same

    公开(公告)号:US11967754B2

    公开(公告)日:2024-04-23

    申请号:US17028124

    申请日:2020-09-22

    CPC classification number: H01Q1/245 H01Q1/243 H01Q9/045 H04M1/0269

    Abstract: The present disclosure relates to an electronic apparatus. The electronic apparatus includes a display panel in which an active area and a peripheral area are defined and an antenna with at least a portion overlapping the active area. The antenna includes a first pattern portion having a first characteristic impedance and a first mesh structure, a second pattern portion, and a third pattern portion. The second pattern portion is disposed adjacent to the first pattern portion and has a second characteristic impedance different from the first characteristic impedance and a second mesh structure. The third pattern portion is disposed adjacent to the second pattern portion and has a third characteristic impedance different from the second characteristic impedance and a third mesh structure. The second characteristic impedance has a value between the first characteristic impedance and the third characteristic impedance.

    Ternary logic circuit
    159.
    发明授权

    公开(公告)号:US11923846B2

    公开(公告)日:2024-03-05

    申请号:US17673772

    申请日:2022-02-16

    CPC classification number: H03K19/08 H03K19/20

    Abstract: A ternary logic circuit includes: a first inverter unit; a second inverter unit arranged in parallel with the first inverter unit; a first junction unit arranged between the first inverter unit and an output terminal and including a tunnel PN junction; and a second junction unit arranged between the second inverter unit and the output terminal and including a tunnel PN junction, wherein, when an absolute value of an input voltage applied to an input terminal is less than a first input voltage, the output terminal outputs a first output voltage, and when the absolute value of the input voltage is greater than the first input voltage and less than a second input voltage, the output terminal outputs a second output voltage, and when the absolute value of the input terminal is greater than the second input voltage, the output terminal outputs a third output voltage.

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