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公开(公告)号:US20160254167A1
公开(公告)日:2016-09-01
申请号:US15149464
申请日:2016-05-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Toshinari SASAKI , Junichiro SAKATA , Hiroki OHARA , Shunpei YAMAZAKI
IPC: H01L21/477 , H01L21/383 , H01L21/02 , H01L29/786 , H01L29/66
CPC classification number: H01L21/477 , H01L21/02565 , H01L21/02664 , H01L21/383 , H01L21/46 , H01L27/1225 , H01L29/66969 , H01L29/7869 , H01L29/78693
Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.
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公开(公告)号:US20160181405A1
公开(公告)日:2016-06-23
申请号:US15057445
申请日:2016-03-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Toshinari SASAKI , Junichiro SAKATA , Hiroki OHARA , Shunpei YAMAZAKI
IPC: H01L29/66 , H01L21/465 , H01L21/477
CPC classification number: H01L29/66969 , H01L27/1225 , H01L27/124 , H01L29/24 , H01L29/42356 , H01L29/42384 , H01L29/66742 , H01L29/78606 , H01L29/78618 , H01L29/7869 , H01L29/78696
Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.
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公开(公告)号:US20160035902A1
公开(公告)日:2016-02-04
申请号:US14819801
申请日:2015-08-06
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Toshinari SASAKI , Junichiro SAKATA , Masashi TSUBUKU
IPC: H01L29/786 , H01L29/24
CPC classification number: H01L27/1225 , H01L27/1214 , H01L27/1248 , H01L27/1255 , H01L27/3248 , H01L27/3262 , H01L27/3265 , H01L29/24 , H01L29/42356 , H01L29/45 , H01L29/458 , H01L29/4908 , H01L29/78606 , H01L29/78618 , H01L29/7869 , H01L29/78693
Abstract: It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.
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公开(公告)号:US20160020332A1
公开(公告)日:2016-01-21
申请号:US14867636
申请日:2015-09-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Toshinari SASAKI , Junichiro SAKATA , Hiroki OHARA , Shunpei YAMAZAKI
IPC: H01L29/786 , H01L29/24 , H01L29/423
CPC classification number: H01L29/66969 , H01L27/1225 , H01L27/124 , H01L29/24 , H01L29/42356 , H01L29/42384 , H01L29/66742 , H01L29/78606 , H01L29/78618 , H01L29/7869 , H01L29/78696
Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.
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165.
公开(公告)号:US20150236167A1
公开(公告)日:2015-08-20
申请号:US14701616
申请日:2015-05-01
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei Yamazaki , Junichiro SAKATA , Hiroki OHARA , Hideaki KUWABARA
CPC classification number: H01L27/3262 , G06F1/163 , H01L21/02614 , H01L27/1218 , H01L27/1222 , H01L27/1225 , H01L29/04 , H01L29/24 , H01L29/66969 , H01L29/78603 , H01L29/7869 , H01L29/78696 , H04B1/16
Abstract: One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer.
Abstract translation: 一个目的是提供具有能够在布线之间充分降低寄生电容的结构的半导体器件。 在包括作为部分或全部氧化的金属薄膜的第一层的堆叠层和氧化物半导体层的底栅型薄膜晶体管中,形成以下氧化物绝缘层:作为沟道的氧化物绝缘层 与氧化物半导体层的与栅电极层重叠的部分结合并接触的保护层; 以及覆盖层叠的氧化物半导体层的周边部分和侧面的氧化物绝缘层。
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166.
公开(公告)号:US20150228667A1
公开(公告)日:2015-08-13
申请号:US14692077
申请日:2015-04-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hiroki OHARA , Junichiro SAKATA , Toshinari SASAKI , Miyuki HOSOBA
IPC: H01L27/12 , H01L29/04 , H01L29/786
CPC classification number: H01L27/127 , H01L21/477 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L27/1274 , H01L27/1296 , H01L29/04 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78693
Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.
Abstract translation: 目的是制造和提供包括具有稳定电特性的薄膜晶体管的高度可靠的半导体器件。 在包括薄膜晶体管的半导体器件的制造方法中,其中包括沟道形成区域的半导体层用作氧化物半导体膜,用于减少诸如湿度的杂质(脱水或脱氢热处理)的热处理在 形成与氧化物半导体层接触的用作保护膜的氧化物绝缘膜。 然后,在漏极电极层,栅极绝缘层和氧化物半导体层中以及在氧化物半导体膜和上下膜之间的界面处不仅在源电极层中存在的诸如水分的杂质 它们与氧化物半导体层接触。
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公开(公告)号:US20150162450A1
公开(公告)日:2015-06-11
申请号:US14621838
申请日:2015-02-13
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Akiharu MIYANAGA , Junichiro SAKATA , Masayuki SAKAKURA , Masahiro TAKAHASHI , Hideyuki KISHIDA , Shunpei YAMAZAKI
IPC: H01L29/786
CPC classification number: H01L29/7869 , H01L29/10 , H01L29/41733
Abstract: A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.
Abstract translation: 提供了包括具有良好电特性的氧化物半导体的薄膜晶体管。 薄膜晶体管包括设置在基板上的栅极电极,设置在栅极上的栅极绝缘膜,设置在栅电极和栅极绝缘膜上的氧化物半导体膜,设置在氧化物半导体膜上的金属氧化物膜, 以及设置在金属氧化物膜上的金属膜。 氧化物半导体膜与金属氧化物膜接触,并且包括金属的浓度高于氧化物半导体膜中的任何其它区域(高金属浓度区域)的区域。 在高金属浓度区域中,包含在氧化物半导体膜中的金属可以作为晶粒或微晶存在。
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168.
公开(公告)号:US20150108478A1
公开(公告)日:2015-04-23
申请号:US14585953
申请日:2014-12-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kengo AKIMOTO , Junichiro SAKATA , Shunpei YAMAZAKI
IPC: H01L29/786
CPC classification number: H01L29/78618 , H01L27/1225 , H01L29/7869
Abstract: An object is to provide a method for manufacturing a highly reliable semiconductor device including thin film transistors which have stable electric characteristics and are formed using an oxide semiconductor. A method for manufacturing a semiconductor device includes the steps of: forming an oxide semiconductor film over a gate electrode with a gate insulating film interposed between the oxide semiconductor film and the gate electrode, over an insulating surface; forming a first conductive film including at least one of titanium, molybdenum, and tungsten, over the oxide semiconductor film; forming a second conductive film including a metal having lower electronegativity than hydrogen, over the first conductive film; forming a source electrode and a drain electrode by etching of the first conductive film and the second conductive film; and forming an insulating film in contact with the oxide semiconductor film, over the oxide semiconductor film, the source electrode, and the drain electrode.
Abstract translation: 本发明的目的是提供一种用于制造具有稳定电特性并使用氧化物半导体形成的薄膜晶体管的高可靠性半导体器件的方法。 一种制造半导体器件的方法包括以下步骤:在绝缘表面上,在栅极上形成氧化物半导体膜,其中栅极绝缘膜置于氧化物半导体膜和栅电极之间; 在所述氧化物半导体膜上形成包括钛,钼和钨中的至少一种的第一导电膜; 在所述第一导电膜上形成包含具有比氢更低的电负性的金属的第二导电膜; 通过蚀刻第一导电膜和第二导电膜形成源电极和漏电极; 以及在所述氧化物半导体膜,所述源电极和所述漏极上形成与所述氧化物半导体膜接触的绝缘膜。
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公开(公告)号:US20150048364A1
公开(公告)日:2015-02-19
申请号:US14496404
申请日:2014-09-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunichi ITO , Toshinari SASAKI , Miyuki HOSOBA , Junichiro SAKATA
IPC: H01L27/12
CPC classification number: H01L27/1225 , G09G3/20 , H01L27/1248 , H01L27/1259 , H01L29/247 , H01L29/45 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78693 , H01L29/78696
Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.
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170.
公开(公告)号:US20150041806A1
公开(公告)日:2015-02-12
申请号:US14521716
申请日:2014-10-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Junichiro SAKATA , Masayuki SAKAKURA , Yoshiaki OIKAWA , Kenichi OKAZAKI , Hotaka MARUYAMA , Masashi TSUBUKU
IPC: H01L27/12
CPC classification number: H01L27/1225 , G02F1/13306 , G02F1/133345 , G02F1/133528 , G02F1/1337 , G02F1/1339 , G02F1/13394 , G02F1/134336 , G02F1/13439 , G02F1/13454 , G02F1/136204 , G02F1/136286 , G02F1/1368 , G02F2001/133302 , G02F2001/133357 , G02F2201/123 , G11C19/28 , H01L27/124 , H01L27/1255 , H01L27/127 , H01L27/1288 , H01L29/247 , H01L29/78618 , H01L29/78648 , H01L29/78693 , H01L29/78696
Abstract: An object is to improve reliability of a semiconductor device. A semiconductor device including a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate is provided. The driver circuit portion and the display portion include thin film transistors in which a semiconductor layer includes an oxide semiconductor; a first wiring; and a second wiring. The thin film transistors each include a source electrode layer and a drain electrode layer. In the thin film transistor in the driver circuit portion, the semiconductor layer is sandwiched between a gate electrode layer and a conductive layer. The first wiring and the second wiring are electrically connected to each other in an opening provided in a gate insulating film through an oxide conductive layer.
Abstract translation: 目的是提高半导体器件的可靠性。 提供了包括驱动电路部分和在相同基板上的显示部分(也称为像素部分)的半导体器件。 驱动器电路部分和显示部分包括其中半导体层包括氧化物半导体的薄膜晶体管; 第一布线 和第二布线。 薄膜晶体管各自包括源极电极层和漏极电极层。 在驱动电路部分的薄膜晶体管中,半导体层夹在栅电极层和导电层之间。 第一布线和第二布线在通过氧化物导电层设置在栅极绝缘膜中的开口中彼此电连接。
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