Method and apparatus for light estimation

    公开(公告)号:US12249026B2

    公开(公告)日:2025-03-11

    申请号:US17699629

    申请日:2022-03-21

    Inventor: Inwoo Ha

    Abstract: A processor-implemented method for light estimation includes: estimating light information corresponding to an input image using a light estimation model; detecting a reference object in the input image; determining object information of the reference object and plane information of a reference plane supporting the reference object; rendering a virtual object corresponding to the reference object based on the light information, the object information, and the plane information; and training the light estimation model by updating the light estimation model based on a result of comparing the reference object and the rendered virtual object.

    DEVICE AND METHOD WITH RESONANCE FREQUENCY CONTROL

    公开(公告)号:US20250081858A1

    公开(公告)日:2025-03-06

    申请号:US18602554

    申请日:2024-03-12

    Abstract: A superconducting device includes a frequency-tunable device including a first conductive pad and a second conductive pad which are connected to each other by a Josephson junction, a ferromagnet having a magnetic domain wall, and a control circuit configured to apply a current to the ferromagnet to adjust a position of the magnetic domain wall of the ferromagnet, and to control a resonance frequency of the frequency-tunable device.

    SEMICONDUCTOR PACKAGE INCLUDING MULTIPLE SEMICONDUCTOR CHIPS

    公开(公告)号:US20250081654A1

    公开(公告)日:2025-03-06

    申请号:US18458991

    申请日:2023-08-30

    Inventor: IKJUN CHOI

    Abstract: A semiconductor package includes a semiconductor chip structure and a transparent substrate. The semiconductor chip structure includes first and second semiconductor chips. The first semiconductor chip includes a semiconductor substrate including first and second surfaces, a wiring layer, and a through electrode. The first semiconductor chip has a step structure on an edge of the semiconductor chip structure and connected to the second surface. The step structure includes first to fourth steps. The first step includes a first bottom surface and a first lateral surface. The second step includes a second bottom surface and a second lateral surface. The third step includes a third bottom surface and a third lateral surface. The through electrode extends from the second bottom surface toward the wiring layer.

    IMAGE SENSOR
    179.
    发明申请

    公开(公告)号:US20250081645A1

    公开(公告)日:2025-03-06

    申请号:US18661946

    申请日:2024-05-13

    Inventor: Jungwook LIM

    Abstract: Disclosed is an image sensor comprising a first semiconductor substrate that includes a first pixel region and a second pixel region, a first photoelectric conversion element on the first pixel region, a second photoelectric conversion element on the second pixel region, a first floating diffusion section on the first pixel region, a second floating diffusion section on the second pixel region, a first transfer gate electrode between the first photoelectric conversion element and the first floating diffusion section, a second transfer gate electrode between the second photoelectric conversion element and the second floating diffusion section, a second semiconductor substrate on the first semiconductor substrate, and pixel transistors connected to the first and second photoelectric conversion elements. A width of the second photoelectric conversion element is less than that of the first photoelectric conversion element. At least one of the pixel transistors is on the second semiconductor substrate.

    VERTICAL SEMICONDUCTOR DEVICE
    180.
    发明申请

    公开(公告)号:US20250081469A1

    公开(公告)日:2025-03-06

    申请号:US18812283

    申请日:2024-08-22

    Abstract: A vertical semiconductor device includes: a plurality of insulation patterns on a substrate, the plurality of insulation patterns being spaced apart from each other in a vertical direction; a plurality of channel structures being spaced apart from each other in a first direction, each of the plurality of channel structures including interface insulation patterns, and the plurality of channel structures disposed in a first trench extending in the first direction and passing through the insulation patterns in the vertical direction; a ferroelectric structure on an outer surface of each of the plurality channel structures, the ferroelectric structure protruding in a direction toward a gap between some of the insulation patterns in the vertical direction; and a conductive pattern on a sidewall of the ferroelectric structure, the conductive pattern filling the gap in the vertical direction.

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