公开(公告)号：US08853755B2

公开(公告)日：2014-10-07

申请号：US12889537

申请日：2010-09-24

Applicant: Frédéric Barbier ,  François Roy

Inventor： Frédéric Barbier ,  François Roy

IPC: H01L31/113 ,  H04N5/365 ,  H01L27/146 ,  H04N5/378 ,  H04N5/3745

CPC classification number: H04N5/378 ,  H01L27/14609 ,  H01L27/1463 ,  H01L27/14683 ,  H04N5/365 ,  H04N5/3745

Abstract: A pixel circuit of an image sensor includes a sense node for storing a charge transferred from one or more photodiodes, a source follower transistor having its gate coupled to the sense node and its source node coupled to an output line of the pixel circuit via a read transistor, wherein a body contact of the source follower transistor is connected to the output line.

Abstract translation: 图像传感器的像素电路包括用于存储从一个或多个光电二极管传送的电荷的感测节点，源极跟随器晶体管，其栅极耦合到感测节点，其源极节点通过读取耦合到像素电路的输出线 晶体管，其中源极跟随器晶体管的体接触连接到输出线。

公开(公告)号：US08828882B2

公开(公告)日：2014-09-09

申请号：US13713135

申请日：2012-12-13

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Arnaud Tournier ,  Françcois Leverd

IPC: H01L21/302 ,  H01L21/461 ,  H01L29/06 ,  H01L21/762 ,  H01L21/3065

CPC classification number: H01L21/30655 ,  H01L21/76237 ,  H01L29/0649

Abstract: A trench is formed in a semiconductor substrate by depositing an etch mask on the substrate having an opening, etching of the trench through the opening, and doping the walls of the trench. The etching step includes a first phase having an etch power set to etch the substrate under the etch mask, and a second phase having an etch power set smaller than the power of the first phase. Further, the doping of the walls of the trench is applied through the opening of the etch mask.

Abstract translation: 通过在具有开口的衬底上沉积蚀刻掩模，通过开口蚀刻沟槽以及掺杂沟槽的壁，在半导体衬底中形成沟槽。 蚀刻步骤包括具有蚀刻功能的第一相，其蚀刻蚀刻掩模下的衬底，以及具有小于第一相的功率的蚀刻功率集的第二相。 此外，通过蚀刻掩模的开口施加沟槽的壁的掺杂。

公开(公告)号：US20140217520A1

公开(公告)日：2014-08-07

申请号：US14169913

申请日：2014-01-31

Applicant: STMicroelectronics S.A. ,  STMicroelectronics (Crolles 2) SAS ,  Commissariat à I'Énergie Atomique et aux Énergies Alternatives

Inventor： Heimanu Niebojewski ,  Yves Morand ,  Cyrille Le Royer

IPC: H01L29/49 ,  H01L21/28

CPC classification number: H01L29/49 ,  H01L21/28008 ,  H01L21/28114 ,  H01L29/42376 ,  H01L29/4925 ,  H01L29/4991 ,  H01L29/6653

Abstract: A MOS transistor including, above a gate insulator, a conductive gate stack having a height, a length, and a width, this stack having a lower portion close to the gate insulator and an upper portion, wherein the stack has a first length in its lower portion, and a second length shorter than the first length in its upper portion.

Abstract translation: 一种MOS晶体管，包括在栅极绝缘体上方的具有高度，长度和宽度的导电栅极堆叠，该堆叠具有靠近栅绝缘体的下部和上部，其中堆叠具有第一长度 下部，并且在其上部比第一长度短的第二长度。

公开(公告)号：US20140210071A1

公开(公告)日：2014-07-31

申请号：US14155007

申请日：2014-01-14

Applicant: Anne Lombardot ,  STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Laurent-Luc Chapelon ,  Pascal Ancey ,  Sandrine Lhostis

IPC: H01L23/36

CPC classification number: H01L23/36 ,  H01L23/3128 ,  H01L23/4275 ,  H01L23/4334 ,  H01L23/481 ,  H01L25/0657 ,  H01L29/0657 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589

Abstract: An integrated structure includes a support supporting at least one chip and a heat dissipating housing, attached to the chip. The housing is thermally conductive and has a thermal expansion compatible with the chip. The housing may further including closed cavities filled with a phase change material.

Abstract translation: 集成结构包括支撑至少一个芯片的支撑件和附接到芯片的散热壳体。 壳体是导热的并具有与芯片兼容的热膨胀。 壳体还可以包括填充有相变材料的封闭空腔。

公开(公告)号：US08791512B2

公开(公告)日：2014-07-29

申请号：US13241666

申请日：2011-09-23

Applicant: Francois Roy ,  Julien Michelot

Inventor： Francois Roy ,  Julien Michelot

IPC: H01L31/113

CPC classification number: H01L27/14603 ,  H01L27/14609 ,  H01L27/1463 ,  H01L27/14641 ,  H01L27/14679 ,  H01L31/112

Abstract: An imaging device is formed in a semiconductor substrate. The device includes a matrix array of photosites. Each photosite is formed of a semiconductor region for storing charge, a semiconductor region for reading charge specific to said photosite, and a charge transfer circuit configured so as to permit a transfer of charge between the charge storage region and the charge reading region. Each photosite further includes at least one buried first electrode. At least one part of that buried first electrode bounds at least one part of the charge storage region. The charge transfer circuit for each photosite includes at least one second buried electrode.

Abstract translation: 成像装置形成在半导体衬底中。 该装置包括矩阵阵列的光斑。 每个光斑由用于存储电荷的半导体区域，用于读取对所述光斑特定的电荷的半导体区域和电荷转移电路构成，以使得能够在电荷存储区域和电荷读取区域之间传输电荷。 每个光斑还包括至少一个埋入的第一电极。 该埋置的第一电极的至少一部分界定电荷存储区域的至少一部分。 每个光电子的电荷转移电路包括至少一个第二埋电极。

公开(公告)号：USRE44922E1

公开(公告)日：2014-06-03

申请号：US13040148

申请日：2011-03-03

Applicant: Mickael Denais ,  Vincent Huard ,  Chittoor Parthasarathy

Inventor： Mickael Denais ,  Vincent Huard ,  Chittoor Parthasarathy

IPC: H03K17/687

CPC classification number: G05F3/205 ,  H03K19/00384

Abstract: An integrated circuit comprising at least one MOS-type transistor, further comprising a system for detecting the variations of the electrical quantities of the at least one transistor, and a biasing device modifying the bias voltage of the bulk of the at least one transistor according to the variations measured by the detection system.

Abstract translation: 一种包括至少一个MOS型晶体管的集成电路，还包括用于检测所述至少一个晶体管的电量的变化的系统，以及修正所述至少一个晶体管本体的偏置电压的偏置装置，根据 由检测系统测量的变化。

公开(公告)号：US08693165B2

公开(公告)日：2014-04-08

申请号：US13332124

申请日：2011-12-20

Applicant: Thomas Skotnicki ,  Stéphane Monfray

Inventor： Thomas Skotnicki ,  Stéphane Monfray

IPC: H01G4/38 ,  H01G9/00 ,  H01G2/08

CPC classification number: H01G9/0003 ,  H01G2/08 ,  H01G9/155 ,  H01L37/02

Abstract: A device for generating electrical energy from the heat dissipated by a heat source, comprising: a capacitor comprising two electrodes between which a ferroelectric material is present, said capacitor being arranged so as to be positioned to capture all or part of the heat dissipated by said heat source; a capacitive element a first electrode of which is connected to a first electrode of said capacitor; a recovery circuit interposed between the second electrode of said capacitor and the second electrode of the capacitive element, and able to have the current flowing between said second electrodes pass through it. a mechanism adapted to move the capacitor with respect to the heat source, said mechanism having at least one arm able to move between two positions, the capacitor being closer to the heat source in one of the two positions.

Abstract translation: 一种用于从由热源消散的热量产生电能的装置，包括：电容器，包括两个电极，所述两个电极之间存在铁电材料，所述电容器被布置成被定位成捕获由所述 热源; 电容元件，其第一电极连接到所述电容器的第一电极; 插入在所述电容器的第二电极和电容元件的第二电极之间并且能够使在所述第二电极之间流动的电流通过其的恢复电路。 适于相对于所述热源移动所述电容器的机构，所述机构具有能够在两个位置之间移动的至少一个臂，所述电容器在所述两个位置中的一个位置更靠近所述热源。

公开(公告)号：US20140070158A1

公开(公告)日：2014-03-13

申请号：US14018223

申请日：2013-09-04

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives ,  STMicroelectronics (Crolles 2) SAS

Inventor： Jean-Francois Nodin ,  Veronique Sousa ,  Sandrine Lhostis

IPC: H01L45/00

CPC classification number: H01L45/1246 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/165 ,  H01L45/1683

Abstract: A memory cell including a via made of a phase-change material arranged between a lower electrode and an upper electrode, wherein the via includes a central region laterally surrounded with a peripheral region, the crystallization and melting temperatures of the central region being respectively lower than those of the peripheral region.

Abstract translation: 一种存储单元，包括由布置在下电极和上电极之间的相变材料制成的通孔，其中所述通孔包括横向围绕周边区域的中心区域，所述中心区域的结晶和熔融温度分别低于 那些周边地区。

公开(公告)号：US08671262B2

公开(公告)日：2014-03-11

申请号：US13221587

申请日：2011-08-30

Applicant: Cedric Minne

Inventor： Cedric Minne

IPC: G06F12/00 ,  G06F13/00

CPC classification number: G06F12/06 ,  G06F12/023 ,  G06F12/04 ,  G06F2212/1016 ,  G06F2213/0038

Abstract: A memory and a method for controlling a memory including: a set of first memory blocks of identical size, intended to contain first words, a set of second memory blocks of identical size, intended to contain second words, the number of second words being identical to the number of first words, a third memory block identical to the first blocks, a fourth memory block identical to the second blocks, each memory address comprising a first portion identifying a same line in all blocks, and each first word of the third block identifying a free word from among the second words sharing a same second address portion.

Abstract translation: 一种用于控制存储器的存储器和方法，包括：一组相同大小的第一存储器块，用于包含第一个字，一组相同大小的第二存储器块，用于包含第二个字，第二个字的数量是相同的 与第一块相同的第三存储块，与第二块相同的第四存储块，每个存储器地址包括标识所有块中的同一行的第一部分，以及第三块的每个第一个字 从共享相同的第二地址部分的第二个字中识别一个空闲字。

公开(公告)号：US08643063B2

公开(公告)日：2014-02-04

申请号：US12821785

申请日：2010-06-23

Applicant: François Roy

Inventor： François Roy

IPC: H01L29/80

CPC classification number: H01L29/76841 ,  H01L27/14812 ,  H01L29/76808

Abstract: A charge transfer device formed in a semiconductor substrate and including an array of electrodes distributed in rows and columns, wherein: each electrode is formed in a cavity with insulated walls formed of a groove which generally extends in the row direction, having a first end closer to an upper row and a second end closer to a lower row; and the electrodes of two adjacent rows are symmetrical with respect to a plane orthogonal to the sensor and comprising the direction of a row.

Abstract translation: 一种电荷转移装置，形成在半导体衬底中并且包括分布在行和列中的电极阵列，其中：每个电极形成在具有绝缘壁的空腔中，所述绝缘壁由大致沿行方向延伸的凹槽形成，具有第一端更靠近 到更靠近下排的上排和第二端; 并且两个相邻行的电极相对于与传感器正交的平面对称并且包括行的方向。