公开(公告)号：US20130046504A1

公开(公告)日：2013-02-21

申请号：US13483055

申请日：2012-05-30

Applicant: HUI-CHI LO ,  HSIEN-CHUAN LIANG ,  JUI-HSIUNG HO ,  SHOU-KUO HSU ,  CHENG-CHUNG HUANG ,  CHENG-HSIEN LEE

Inventor： HUI-CHI LO ,  HSIEN-CHUAN LIANG ,  JUI-HSIUNG HO ,  SHOU-KUO HSU ,  CHENG-CHUNG HUANG ,  CHENG-HSIEN LEE

IPC: G06F19/00 ,  G01R31/28

CPC classification number: G11B5/455 ,  G06F11/2221 ,  G11B27/36 ,  G11B2220/2516

Abstract: In a method for testing integrity of signals transmitted from hard disk interfaces using a computing device, the computing device connects to an oscilloscope and a mechanical arm that is equipped with a test fixture. The mechanical arm controls the test fixture to make contact with one of the hard disk interfaces to be tested. The method adjusts an intensity grade of the signals through the hard disk interface, and controls the hard disk interface to produce a signal corresponding to the adjusted intensity grade. The test fixture obtains the signal from the hard disk interface, and the oscilloscope measures one or more test parameters of the signal. The method analyzes values of the test parameters to find an optimal signal, determines an intensity grade of the optimal signal as a driving parameter of the hard disk interface, and generates a test report of the hard disk interfaces.

Abstract translation: 在用于测试使用计算设备从硬盘接口传输的信号的完整性的方法中，计算设备连接到配备有测试夹具的示波器和机械臂。 机械臂控制测试夹具与待测试的硬盘接口之间的接触。 该方法通过硬盘接口调整信号的强度等级，并控制硬盘接口产生对应于调整强度等级的信号。 测试夹具从硬盘接口获取信号，示波器测量信号的一个或多个测试参数。 该方法分析测试参数的值，找到最佳信号，确定最佳信号的强度等级作为硬盘接口的驱动参数，并生成硬盘接口的测试报告。

公开(公告)号：US08320137B2

公开(公告)日：2012-11-27

申请号：US12978527

申请日：2010-12-24

Applicant: Cheng-Hsien Lee ,  Yung-Chieh Chen ,  Shou-Kuo Hsu ,  Shin-Ting Yen

Inventor： Cheng-Hsien Lee ,  Yung-Chieh Chen ,  Shou-Kuo Hsu ,  Shin-Ting Yen

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K1/0295 ,  H05K1/0239 ,  H05K1/0245 ,  H05K1/113 ,  H05K2201/10015

Abstract: A printed circuit board includes a high-speed differential signal control chip, first to eighth coupling capacitor pads, first to fourth connector pads, a first transmission line, a second transmission line, a third transmission line, a fourth transmission line, first to eighth transmission lines, two ninth transmission lines, first and second vias, and first to fourth sharing pads. The printed circuit board is operable to selectively support multiple connectors.

Abstract translation: 印刷电路板包括高速差分信号控制芯片，第一至第八耦合电容器焊盘，第一至第四连接器焊盘，第一传输线，第二传输线，第三传输线，第四传输线，第一至第八 传输线，两个第九传输线，第一和第二通孔以及第一至第四共享焊盘。 印刷电路板可操作以选择性地支撑多个连接器。

公开(公告)号：US20120297356A1

公开(公告)日：2012-11-22

申请号：US13213072

申请日：2011-08-18

Applicant: DAN-CHEN WU ,  SHOU-KUO HSU ,  CHENG-HSIEN LEE ,  CHUN-JEN CHEN

Inventor： DAN-CHEN WU ,  SHOU-KUO HSU ,  CHENG-HSIEN LEE ,  CHUN-JEN CHEN

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: In a method for inspecting the layout of a printed circuit board (PCB), a component to be checked is determined from an electronic layout diagram of the PCB, and a power transmission line which may be serving that component is selected. The layout diagram is checked to determine whether the component is connected to the power transmission line, and further checked to determine whether more than one ground pins of the component is connected to the power transmission line. Vias that are shared by two or more ground pins of the component are determined if more than one ground pin is connected to the power transmission line. Shared vias are marked on the layout diagram.

Abstract translation: 在用于检查印刷电路板（PCB）的布局的方法中，从PCB的电子布局图确定要检查的部件，并且可以选择可用于该部件的输电线。 检查布局图以确定组件是否连接到电力传输线，并进一步检查以确定组件的多个接地引脚是否连接到电力传输线。 如果多个接地引脚连接到电力传输线，则确定由组件的两个或更多个接地引脚共享的通孔。 共享通孔在布局图上标出。

公开(公告)号：US20120245900A1

公开(公告)日：2012-09-27

申请号：US13335958

申请日：2011-12-23

Applicant: CHENG-HSIEN LEE ,  HSIAO-YUN SU ,  SHOU-KUO HSU

Inventor： CHENG-HSIEN LEE ,  HSIAO-YUN SU ,  SHOU-KUO HSU

IPC: G06F17/50

CPC classification number: G06F17/5036 ,  G06F17/5077

Abstract: A design method generates a plurality of groups of experimental conditions, each of the groups of experimental conditions includes performance variables for an electronic product with nonlinear performance. The method simulates values to the groups of experimental conditions, computes an average value, and divides the groups of experimental conditions into a first part and a second part. The values in the first part is greater than the average value and the values in the second part is less than the average value. The method computes nonlinear boundary values of a refining mechanism based on the values, and determines a threshold value of the refiner. After refining the groups of experimental conditions, the method calculates the deviation of each value from the threshold value, and determines the groups of experimental conditions with the greatest deviations as optimal groups of experimental conditions.

Abstract translation: 设计方法产生多组实验条件，实验条件组中的每一组包括具有非线性性能的电子产品的性能变量。 该方法模拟实验条件组的值，计算平均值，并将实验条件组划分为第一部分和第二部分。 第一部分中的值大于平均值，第二部分中的值小于平均值。 该方法基于该值计算精炼机构的非线性边界值，并确定精磨机的阈值。 在完成实验条件组之后，该方法计算每个值与阈值的偏差，并将具有最大偏差的实验条件组确定为最佳实验条件组。

公开(公告)号：US08255866B2

公开(公告)日：2012-08-28

申请号：US13085432

申请日：2011-04-12

Applicant: Han-Long Chen ,  Shi-Piao Luo ,  Cheng-Hsien Lee ,  Chia-Nan Pai ,  Shou-Kuo Hsu

Inventor： Han-Long Chen ,  Shi-Piao Luo ,  Cheng-Hsien Lee ,  Chia-Nan Pai ,  Shou-Kuo Hsu

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: A computing device and a method involves selection of one or more transmission lines from a printed circuit board (PCB) layout file, reading a transmission line from the one or more selected transmission lines, and determining neighboring anti-pads of the read transmission line in the PCB layout file. The computing device and method further determine an actual distance between the read transmission line and a neighboring anti-pad. If the actual distance is less than a preset standard distance, the computing device and method determine that the read transmission line and the neighboring anti-pad do not satisfy design requirements, and highlight the read transmission line and the neighboring anti-pad, to prompt a user to amend design of the read transmission line and the neighboring anti-pad.

Abstract translation: 计算装置和方法包括从印刷电路板（PCB）布局文件中选择一条或多条传输线，从一条或多条所选传输线读取传输线，以及确定读传输线的相邻抗焊盘 PCB布局文件。 计算设备和方法进一步确定读取传输线与相邻反焊盘之间的实际距离。 如果实际距离小于预设的标准距离，则计算设备和方法确定读取传输线路和相邻的反焊盘不满足设计要求，并突出显示读取传输线路和相邻的反焊盘，以提示 用户修改读取传输线的设计和相邻的反焊盘。

公开(公告)号：US08238115B2

公开(公告)日：2012-08-07

申请号：US12824850

申请日：2010-06-28

Applicant: Yung-Chieh Chen ,  Cheng-Hsien Lee ,  Shou-Kuo Hsu ,  Shen-Chun Li ,  Hsien-Chuan Liang ,  Shin-Ting Yen

Inventor： Yung-Chieh Chen ,  Cheng-Hsien Lee ,  Shou-Kuo Hsu ,  Shen-Chun Li ,  Hsien-Chuan Liang ,  Shin-Ting Yen

IPC: H05K1/11 ,  H05K1/14 ,  G06F13/00

CPC classification number: H05K1/113 ,  G06F1/185 ,  H05K1/0251 ,  H05K2201/09409 ,  H05K2201/09727 ,  H05K2201/10159

Abstract: A computer motherboard includes a printed circuit board which includes a central processing unit (CPU) socket and a group of memory slots. The group of memory slots includes an in-line type memory slot and a surface mounted device (SMD) type memory slot. The in-line type memory slot includes a number of plated through holes. The SMD type memory slot is set between the in-line type memory slot and the CPU socket. The through holes of the in-line type memory slot are connected to the CPU socket through traces, pads of the SMD type memory slot are connected to corresponding through holes of the in-line type memory slot having the same pin definition.

Abstract translation: 计算机主板包括印刷电路板，其包括中央处理单元（CPU）插座和一组存储器插槽。 该组存储器插槽包括一个在线型存储器插槽和一个表面安装器件（SMD）型存储器插槽。 在线型存储槽包括多个电镀通孔。 SMD型内存插槽设置在串行型内存插槽和CPU插槽之间。 在线式存储插槽的通孔通过走线连接到CPU插座，SMD型存储插槽的焊盘连接到具有相同引脚定义的在线型存储器插槽的相应通孔。

公开(公告)号：US20120147579A1

公开(公告)日：2012-06-14

申请号：US12978527

申请日：2010-12-24

Applicant: CHENG-HSIEN LEE ,  YUNG-CHIEH CHEN ,  SHOU-KUO HSU ,  SHIN-TING YEN

Inventor： CHENG-HSIEN LEE ,  YUNG-CHIEH CHEN ,  SHOU-KUO HSU ,  SHIN-TING YEN

IPC: H05K7/00

CPC classification number: H05K1/0295 ,  H05K1/0239 ,  H05K1/0245 ,  H05K1/113 ,  H05K2201/10015

Abstract: A printed circuit board includes a high-speed differential signal control chip, first to eighth coupling capacitor pads, first to fourth connector pads, a first transmission line, a second transmission line, a third transmission line, a fourth transmission line, first to eighth transmission lines, two ninth transmission lines, first and second vias, and first to fourth sharing pads. The printed circuit board is operable to selectively support multiple connectors.

Abstract translation: 印刷电路板包括高速差分信号控制芯片，第一至第八耦合电容器焊盘，第一至第四连接器焊盘，第一传输线，第二传输线，第三传输线，第四传输线，第一至第八 传输线，两个第九传输线，第一和第二通孔以及第一至第四共享焊盘。 印刷电路板可操作以选择性地支撑多个连接器。

公开(公告)号：US20110114379A1

公开(公告)日：2011-05-19

申请号：US12633653

申请日：2009-12-08

Applicant: YUNG-CHIEH CHEN ,  CHENG-HSIEN LEE ,  SHOU-KUO HSU ,  SHEN-CHUN LI ,  HSIEN-CHUAN LIANG ,  SHIN-TING YEN

Inventor： YUNG-CHIEH CHEN ,  CHENG-HSIEN LEE ,  SHOU-KUO HSU ,  SHEN-CHUN LI ,  HSIEN-CHUAN LIANG ,  SHIN-TING YEN

IPC: H01R12/00

CPC classification number: H05K1/0295 ,  H05K1/0239 ,  H05K1/0245 ,  H05K1/029 ,  H05K3/222 ,  H05K2201/09481 ,  H05K2201/09636 ,  H05K2201/10015 ,  H05K2201/10189 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A printed circuit board can support different connectors by selectively setting connection components on the printed circuit board without changing wiring of transmission lines or making new vias in the printed circuit board.

Abstract translation: 印刷电路板可以通过选择性地设置印刷电路板上的连接部件来支持不同的连接器，而不改变传输线的接线或在印刷电路板中形成新的通孔。

公开(公告)号：US08571846B2

公开(公告)日：2013-10-29

申请号：US12978417

申请日：2010-12-24

Applicant: Cheng-Hsien Lee ,  Shou-Kuo Hsu

Inventor： Cheng-Hsien Lee ,  Shou-Kuo Hsu

IPC: G06F17/50

CPC classification number: G06F17/5036

Abstract: In an electronic device and a method of generating composite electrical signals, a plurality of post-processing software is installed. An output file, which comprises times and voltages of data points that represent an electrical signal, of an electronic circuit simulation software is loaded, and is read using the installed post-processing software. A time interval of outputs of the electrical signal is obtained by selecting an output type of the electrical signal. The worst bit combination of outputs of the electrical signal is analyzed according to the times, the voltage, and the time interval, and a composite electrical signal is generated according to the worst bit combination.

Abstract translation: 在电子设备和产生复合电信号的方法中，安装了多个后处理软件。 加载电子电路仿真软件的包括代表电信号的数据点的时间和电压的输出文件，并使用安装的后处理软件进行读取。 通过选择电信号的输出类型来获得电信号的输出的时间间隔。 根据时间，电压和时间间隔分析电信号输出的最差位组合，并根据最差位组合生成复合电信号。

公开(公告)号：US08489379B2

公开(公告)日：2013-07-16

申请号：US12962838

申请日：2010-12-08

Applicant: Wen-Laing Tseng ,  Cheng-Hsien Lee ,  Shen-Chun Li ,  Yu-Chang Pai ,  Shou-Kuo Hsu

Inventor： Wen-Laing Tseng ,  Cheng-Hsien Lee ,  Shen-Chun Li ,  Yu-Chang Pai ,  Shou-Kuo Hsu

IPC: G06F17/50 ,  G06F7/60 ,  G06F17/10

CPC classification number: G06F17/5036 ,  G06F17/509

Abstract: A simulation system and method for generating equivalent circuits compatible with HSPICE reads data corresponding to N-port network system format in a storage device, and obtains S-parameter matrixes from the N-port network system. S-parameters in the S-parameter matrix that satisfy passivity are checked, and an interpolation algorithm to supplement S-parameters with passivity when some S-parameters not satisfy passivity is performed. Numbers of pole-residue, times for recursion and a tolerant system error of a rational function are generated for determining S-parameters. A rational function matrix composed of S-parameters is generated by performing a vector fitting algorithm, and an equivalent circuit is generated compatible with HSPICE format based on the generated rational function matrix.

Abstract translation: 用于产生与HSPICE兼容的等效电路的仿真系统和方法在存储设备中读取对应于N端口网络系统格式的数据，并且从N端口网络系统获得S参数矩阵。 检查满足被动性的S参数矩阵中的S参数，并且执行当某些S参数不满足被动时的用于补充具有被动性的S参数的插值算法。 产生极点残差数，递归次数和合理函数的容错系统误差，用于确定S参数。 通过执行向量拟合算法生成由S参数组成的合理函数矩阵，并且基于生成的有理函数矩阵生成与HSPICE格式兼容的等效电路。