公开(公告)号：US08987092B2

公开(公告)日：2015-03-24

申请号：US12110974

申请日：2008-04-28

Applicant: Inkuk Kang ,  Gang Xue ,  Shenqing Fang ,  Rinji Sugino ,  Yi Ma

Inventor： Inkuk Kang ,  Gang Xue ,  Shenqing Fang ,  Rinji Sugino ,  Yi Ma

IPC: H01L21/336 ,  H01L27/115 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/11568 ,  H01L29/66795 ,  H01L29/7854

Abstract: Methods for fabricating a FIN structure with a semicircular top surface and rounded top surface corners and edges are disclosed. As a part of a disclosed method, a FIN structure is formed in a semiconductor substrate. The FIN structure includes a top surface having corners and edges. The FIN structure is annealed where the annealing causes the top surface to have a semicircular shape and the top surface corners and edges to be rounded.

Abstract translation: 公开了制造具有半圆顶表面和圆顶顶表面拐角和边缘的FIN结构的方法。 作为所公开的方法的一部分，在半导体衬底中形成FIN结构。 FIN结构包括具有拐角和边缘的顶表面。 FIN结构退火，其中退火导致顶表面具有半圆形形状，并且顶表面拐角和边缘被倒圆。

公开(公告)号：US08790530B2

公开(公告)日：2014-07-29

申请号：US12703586

申请日：2010-02-10

Applicant: Angela T. Hui ,  Gang Xue

Inventor： Angela T. Hui ,  Gang Xue

IPC: G01L21/30 ,  H01L21/302

CPC classification number: H01L27/11568 ,  H01L27/11565

Abstract: A method and manufacture for charge storage layer separation is provided. A layer, such as a polymer layer, is deposited on top of an ONO layer so that the polymer layer is planarized, or approximately planarized. The ONO includes at least a first region and a second region, where the first region is higher than the second region. For example, the first region may be the portion of the ONO that is over the source/drain region, and the second region may be the portion of the ONO that is over the shallow trench. Etching is performed on the polymer layer to expose the first region of the ONO layer, leaving the second region of the ONO unexposed. The etching continues to occur to etch the exposed ONO at the first region so that the ONO layer is etched away in the first region and the second region remains unexposed.

Abstract translation: 提供了一种电荷存储层分离的方法和制造方法。 诸如聚合物层的层沉积在ONO层的顶部上，使得聚合物层被平坦化或近似平坦化。 ONO包括至少第一区域和第二区域，其中第一区域高于第二区域。 例如，第一区域可以是在源极/漏极区域上的ONO的部分，并且第二区域可以是在浅沟槽上的ONO的部分。 在聚合物层上进行蚀刻以暴露ONO层的第一区域，留下ONO的第二区域未曝光。 蚀刻继续发生以蚀刻在第一区域处的暴露的ONO，使得ONO层在第一区域被蚀刻掉，并且第二区域保持未曝光。

公开(公告)号：US08692900B2

公开(公告)日：2014-04-08

申请号：US13092646

申请日：2011-04-22

Applicant: Dmitry Denisenkov ,  Gang Xue ,  Sung Ho Hong ,  Qian Wang

Inventor： Dmitry Denisenkov ,  Gang Xue ,  Sung Ho Hong ,  Qian Wang

IPC: H04N5/235 ,  H04N5/228 ,  H04N5/222

CPC classification number: H04N5/23245 ,  H04N5/772 ,  H04N9/8042

Abstract: An apparatus, and an associated method, facilitates capturing an image in an electronic camera without having to wait for an image to settle or the camera to stabilize. Image frames are captured continuously. Data representing captured images is compressed. The compressed files are stored continuously, such that even before a shutter button is actuated, one or compressed image frames have already been recorded. When the shutter button is actuated, the largest of the compressed data files is selected for use, such as display, printing or transmission. Selection is made based on the size of the compressed image file.

Abstract translation: 一种装置和相关联的方法有助于在电子照相机中捕获图像，而不必等待图像稳定或相机稳定。 图像帧被连续捕获。 表示拍摄图像的数据被压缩。 压缩文件被连续存储，使得即使在快门按钮被致动之前，也已经记录了一个或压缩的图像帧。 当快门按钮被启动时，最大的压缩数据文件被选择用于使用，例如显示，打印或传输。 基于压缩图像文件的大小进行选择。

公开(公告)号：US08551858B2

公开(公告)日：2013-10-08

申请号：US12699635

申请日：2010-02-03

Applicant: Shenqing Fang ,  Angela Hui ,  Shao-Yu Ting ,  Inkuk Kang ,  Gang Xue

Inventor： Shenqing Fang ,  Angela Hui ,  Shao-Yu Ting ,  Inkuk Kang ,  Gang Xue

IPC: H01L21/76

CPC classification number: H01L29/792 ,  H01L21/28282 ,  H01L21/76224 ,  H01L27/11568

Abstract: A method for fabricating a memory device with U-shaped trap layers over rounded active region corners is disclosed. In the present invention, an STI process is performed before the charge-trapping layer is formed. Immediately after the STI process, the sharp corners of the active regions are exposed, making them available for rounding. Rounding the corners improves the performance characteristics of the memory device. Subsequent to the rounding process, a bottom oxide layer, nitride layer, and sacrificial top oxide layer are formed. An organic bottom antireflective coating applied to the charge trapping layer is planarized. Now the organic bottom antireflective coating, sacrificial top oxide layer, and nitride layer are etched, without etching the sacrificial top oxide layer and nitride layer over the active regions. After the etching the charge trapping layer has a cross-sectional U-shape appearance. U-shaped trap layer edges allow for increased packing density and integration while maintaining isolation between trap layers.

Abstract translation: 公开了一种在圆形有源区域角上制造具有U形陷阱层的存储器件的方法。 在本发明中，在形成电荷俘获层之前进行STI工艺。 在STI处理之后，活动区域的尖角暴露，使其可用于四舍五入。 四舍五入改善了存储设备的性能特征。 在舍入处理之后，形成底部氧化物层，氮化物层和牺牲顶部氧化物层。 施加到电荷捕获层的有机底部抗反射涂层被平坦化。 现在蚀刻有机底部抗反射涂层，牺牲顶部氧化物层和氮化物层，而不在有源区域上蚀刻牺牲顶部氧化物层和氮化物层。 在蚀刻之后，电荷捕获层具有横截面的U形外观。 U形陷阱层边缘允许增加堆积密度和集成度，同时保持捕集层之间的隔离。

公开(公告)号：US20130059612A1

公开(公告)日：2013-03-07

申请号：US13520804

申请日：2010-09-25

Applicant: Yi Zhang ,  Gang Xue

Inventor： Yi Zhang ,  Gang Xue

IPC: H04W4/14

CPC classification number: H04W8/183 ,  H04W4/14 ,  H04W60/00 ,  H04W92/08

Abstract: The disclosure discloses a method for shielding a short message receiving function. The method includes the following steps of: storing parameters related to short-message-receiving-function-shielding in an Element File (EF) in a Subscriber Identity Model (SIM) card; performing inter-verification by utilizing the EF in the SIM-card and a Non Volatile (NV) random access memory in a data card to determine whether the SIM-card is applied to the data card; and when the SIM-card is determined to be applied to the data card, reporting the parameters related to short-message-receiving-function-shielding to a network during the process of attaching mobile terminal to the network. Compared with the conventional art, the technical solution of the disclosure can shield the short message receiving function without generating short message fee, so as to enhance the stability of the data service to a large extent and increase the flexibility for a subscriber in selecting the service type at the terminal.

Abstract translation: 本公开公开了一种用于屏蔽短消息接收功能的方法。 该方法包括以下步骤：在用户识别模型（SIM）卡中的元素文件（EF）中存储与短消息接收功能屏蔽有关的参数; 通过利用SIM卡中的EF和数据卡中的非易失性（NV）随机存取存储器来执行相互验证，以确定SIM卡是否被应用于数据卡; 并且当SIM卡被确定为应用于数据卡时，在将移动终端附着到网络的过程中向网络报告与短消息接收功能屏蔽有关的参数。 与传统技术相比，本发明的技术方案可以屏蔽短消息接收功能而不产生短消息费用，从而在很大程度上提高数据业务的稳定性，增加用户在选择业务时的灵活性 在终端上键入。

公开(公告)号：US08384146B2

公开(公告)日：2013-02-26

申请号：US13428848

申请日：2012-03-23

Applicant: Shenqing Fang ,  Angela Hui ,  Gang Xue ,  Alexander Nickel ,  Kashmir Sahota ,  Scott Bell ,  Chun Chen ,  Wai Lo

Inventor： Shenqing Fang ,  Angela Hui ,  Gang Xue ,  Alexander Nickel ,  Kashmir Sahota ,  Scott Bell ,  Chun Chen ,  Wai Lo

IPC: H01L29/76

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L29/792

Abstract: Methods for fabricating a semiconductor memory cell that has a spacer layer are disclosed. A method includes forming a plurality of source/drain regions in a substrate where the plurality of source/drain regions are formed between trenches, forming a first oxide layer above the plurality of source/drain regions and in the trenches, forming a charge storage layer above the oxide layer and separating the charge storage layer in the trenches where a space is formed between separated portions of the charge storage layer. The method further includes forming a spacer layer to fill the space between the separated portions of the charge storage layer and to rise a predetermined distance above the space. A second oxide layer is formed above the charge storage layer and the spacer layer and a polysilicon layer is formed above the second oxide layer.

Abstract translation: 公开了制造具有间隔层的半导体存储单元的方法。 一种方法包括在衬底中形成多个源极/漏极区域，其中多个源极/漏极区域形成在沟槽之间，在多个源极/漏极区域上方和沟槽中形成第一氧化物层，形成电荷存储层 在电荷存储层的分离部分之间，在形成空间的沟槽中分离电荷存储层。 该方法还包括形成间隔层以填充电荷存储层的分离部分之间的空间并在空间上方上升预定距离。 在电荷存储层和间隔层上方形成第二氧化物层，并且在第二氧化物层上方形成多晶硅层。

公开(公告)号：US20120056260A1

公开(公告)日：2012-03-08

申请号：US13294098

申请日：2011-11-10

Applicant: Shenqing Fang ,  Chun Chen ,  Wenmei Li ,  Inkuk Kang ,  Gang Xue ,  Hyesook Hong

Inventor： Shenqing Fang ,  Chun Chen ,  Wenmei Li ,  Inkuk Kang ,  Gang Xue ,  Hyesook Hong

IPC: H01L29/792

CPC classification number: H01L27/11573 ,  H01L21/28282 ,  H01L27/105 ,  H01L27/11565 ,  H01L29/6659 ,  H01L29/66833 ,  H01L29/792

Abstract: A memory and method of manufacture employing word line scaling. A layered stack, including a charge trapping component and a core polysilicon layer, is formed on a core section and a peripheral section of a substrate. A portion of the layered stack, including the core polysilicon layer is then removed from the peripheral section. A peripheral polysilicon layer, which is thicker than the core polysilicon layer of the layered stack, is next formed on the layered stack and the peripheral section. The layered stack is then isolated from the peripheral polysilicon layer by removing a portion of the peripheral polysilicon layer from the core section, and polysilicon lines are patterned in the isolated layered stack.

Abstract translation: 使用字线缩放的存储器和制造方法。 在基板的芯部分和周边部分上形成包括电荷俘获部件和芯多晶硅层的分层堆叠。 然后从周边部分去除包括核心多晶硅层的层叠堆叠的一部分。 在分层堆叠和外围部分上形成比叠层堆叠的核心多晶硅层厚的外围多晶硅层。 然后通过从核心部分去除外围多晶硅层的一部分，并且在分离的层叠堆叠中对多晶硅线进行图案化，从而从外围多晶硅层隔离层叠堆叠。

公开(公告)号：US20100276746A1

公开(公告)日：2010-11-04

申请号：US12432441

申请日：2009-04-29

Applicant: Shenqing FANG ,  Gang XUE ,  Wenmei LI ,  Inkuk KANG

Inventor： Shenqing FANG ,  Gang XUE ,  Wenmei LI ,  Inkuk KANG

IPC: H01L29/792 ,  H01L21/336

CPC classification number: H01L29/792 ,  H01L27/11568 ,  H01L29/42352

Abstract: Methods for forming a memory cell are disclosed. A method includes forming a source-drain structure in a semiconductor substrate where the source-drain structure includes a rounded top surface and sidewall surfaces. An oxide layer is formed on the top and sidewall surfaces of the source-drain structure. The thickness of the portion of the oxide layer that is formed on the top surface of the source-drain structure is greater than the thickness of the portion of the oxide layer that is formed on the sidewall surfaces of the source-drain structure.

Abstract translation: 公开了形成存储单元的方法。 一种方法包括在半导体衬底中形成源极 - 漏极结构，其中源极 - 漏极结构包括圆顶顶表面和侧壁表面。 在源极 - 漏极结构的顶壁和侧壁表面上形成氧化物层。 形成在源极 - 漏极结构的顶表面上的氧化物层的部分的厚度大于在源极 - 漏极结构的侧壁表面上形成的氧化物层的部分的厚度。

公开(公告)号：US07136306B2

公开(公告)日：2006-11-14

申请号：US10680878

申请日：2003-10-07

Applicant: Gang Xue ,  Jan Van Houdt

Inventor： Gang Xue ,  Jan Van Houdt

IPC: G11C16/04 ,  G11C5/06

CPC classification number: G11C16/0466 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26

Abstract: A method for programming a single bit nonvolatile memory cell integrated on a metal-dielectric-semiconductor technology chip. The memory cell comprises a semiconductor substrate including a source, a drain, and a channel in-between the source and the drain. The memory cell further comprises a control gate that comprises a gate electrode and a dielectric stack. The gate electrode is separated from the channel by the dielectric stack. Further, the dielectric stack comprises at least one charge storage dielectric layer. The method for programming the memory cell comprises applying electrical ground to the source, applying a first voltage having a first polarity to the drain, applying a second voltage of the first polarity to the control gate; and applying a third voltage having a second polarity opposite to the first polarity to the semiconductor substrate.

Abstract translation: 一种用于编程集成在金属 - 电介质 - 半导体技术芯片上的单个位非易失性存储单元的方法。 存储单元包括在源极和漏极之间包括源极，漏极和沟道的半导体衬底。 该存储单元还包括一个包括栅电极和电介质叠层的控制栅极。 栅极通过电介质堆叠与沟道分离。 此外，电介质叠层包括至少一个电荷存储电介质层。 用于对存储单元进行编程的方法包括将电接地施加到源极，向漏极施加具有第一极性的第一电压，将第一极性的第二电压施加到控制栅极; 以及将具有与所述第一极性相反的第二极性的第三电压施加到所述半导体衬底。

公开(公告)号：US06653682B1

公开(公告)日：2003-11-25

申请号：US09696616

申请日：2000-10-25

Applicant: Jan Van Houdt ,  Gang Xue

Inventor： Jan Van Houdt ,  Gang Xue

IPC: H01L29788

CPC classification number: H01L29/66825 ,  G11C16/0425 ,  H01L21/28273 ,  H01L29/42324 ,  H01L29/7886

Abstract: Apparatus for an electrically programmable and erasable memory device and methods for programming, erasing and reading the device. The device has a single transistor including a source, a drain, a control gate and a floating gate positioned between the control gate, the source and the drain, where the floating gate is capacitively coupled to the drain. At least one part of the floating gate is partly positioned between the control gate, the drain and the source, and the other part of the floating gate overlaps with the drain. Further, the single transistor of the device includes means for injecting hot electrons generated by the drain induced secondary impact ionization onto the floating gate. Additionally, the means are arranged to induce Fowler-Nordheim tunnelling of charges from the floating gate to the drain.

Abstract translation: 用于电可编程和可擦除存储器件的装置以及用于编程，擦除和读取器件的方法。 器件具有单个晶体管，其包括位于控制栅极，源极和漏极之间的源极，漏极，控制栅极和浮置栅极，其中浮动栅极电容耦合到漏极。 浮栅的至少一部分部分地位于控制栅极，漏极和源极之间，并且浮栅的另一部分与漏极重叠。 此外，器件的单个晶体管包括用于将由漏极引起的次级冲击电离产生的热电子注入到浮动栅极上的装置。 另外，这些装置被设置成将Fowler-Nordheim隧道从浮动栅极引导到漏极。