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公开(公告)号：US20070238281A1
公开(公告)日：2007-10-11
申请号：US11391510
申请日：2006-03-28
申请人： Mantu Hudait , Mohamad Shaheen , Loren Chow , Peter Tolchinsky , Joel Fastenau , Dmitri Loubychev , Amy Liu , Suman Datta , Jack Kavalieros , Robert Chau
发明人： Mantu Hudait , Mohamad Shaheen , Loren Chow , Peter Tolchinsky , Joel Fastenau , Dmitri Loubychev , Amy Liu , Suman Datta , Jack Kavalieros , Robert Chau
IPC分类号： H01L21/28
CPC分类号： H01L21/02381 , H01L21/02433 , H01L21/02447 , H01L21/0245 , H01L21/02466 , H01L21/02505 , H01L21/0251 , H01L21/02549
摘要： Lattice mismatch and polar to non-polar issues may lead to dislocations and other defects between silicon or germanium substrates and group III-V materials such as indium antimonide. The provision of lattice matching layers and buffer layers may enable these defects to be reduced.
摘要翻译： 晶格错配和极性到非极性问题可能导致硅或锗衬底和III-V族III族材料如铟锑离子之间的位错和其他缺陷。 提供晶格匹配层和缓冲层可以使得能够减少这些缺陷。
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12.发明授权Carrier mobility in surface-channel transistors, apparatus made therewith, and system containing same 有权表面沟道晶体管中的载流子迁移率，由其制成的装置，以及包含其的系统公开(公告)号：US08846480B2
公开(公告)日：2014-09-30
申请号：US13773558
申请日：2013-02-21
IPC分类号： H01L29/66 , H01L29/10 , H01L29/205
CPC分类号： H01L29/66522 , H01L29/1054 , H01L29/122 , H01L29/205 , H01L29/66477
摘要： A surface channel transistor is provided in a semiconductive device. The surface channel transistor is either a PMOS or an NMOS device. Epitaxial layers are disposed above the surface channel transistor to cause an increased bandgap phenomenon nearer the surface of the device. A process of forming the surface channel transistor includes grading the epitaxial layers.
摘要翻译： 表面沟道晶体管设置在半导体器件中。 表面沟道晶体管是PMOS或NMOS器件。 外延层设置在表面沟道晶体管的上方，导致更接近器件表面的带隙现象增加。 形成表面沟道晶体管的工艺包括对外延层进行分级。
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13.发明申请CARRIER MOBILITY IN SURFACE-CHANNEL TRANSISTORS, APPARATUS MADE THEREWITH, AND SYSTEM CONTAINING SAME 有权表面通道晶体管中的载体移动，其中的装置和包含其的系统公开(公告)号：US20130164898A1
公开(公告)日：2013-06-27
申请号：US13773558
申请日：2013-02-21
IPC分类号： H01L29/66
CPC分类号： H01L29/66522 , H01L29/1054 , H01L29/122 , H01L29/205 , H01L29/66477
摘要： A surface channel transistor is provided in a semiconductive device. The surface channel transistor is either a PMOS or an NMOS device. Epitaxial layers are disposed above the surface channel transistor to cause an increased bandgap phenomenon nearer the surface of the device. A process of forming the surface channel transistor includes grading the epitaxial layers.
摘要翻译： 表面沟道晶体管设置在半导体器件中。 表面沟道晶体管是PMOS或NMOS器件。 外延层设置在表面沟道晶体管的上方，导致更接近器件表面的带隙现象增加。 形成表面沟道晶体管的工艺包括对外延层进行分级。
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14.发明授权Apparatus and methods for improving parallel conduction in a quantum well device 有权用于改善量子阱器件中的并联传导的装置和方法公开(公告)号：US08242001B2
公开(公告)日：2012-08-14
申请号：US13274468
申请日：2011-10-17
IPC分类号： H01L21/20
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 本文通常描述了提供用于改进的并联传导的量子阱装置的装置和方法的实施例。 可以描述和要求保护其他实施例。
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15.发明申请公开(公告)号：US20110140171A1
公开(公告)日：2011-06-16
申请号：US13032777
申请日：2011-02-23
申请人： Ravi Pillarisetty , Mantu Hudait , Marko Radosavljevic , Willy Rachmady , Gilbert Dewey , Jack Kavalieros
发明人： Ravi Pillarisetty , Mantu Hudait , Marko Radosavljevic , Willy Rachmady , Gilbert Dewey , Jack Kavalieros
IPC分类号： H01L29/06
CPC分类号： H01L29/155 , H01L21/823807 , H01L21/823892 , H01L29/0653 , H01L29/205 , H01L29/207 , H01L29/66431 , H01L29/66462 , H01L29/66795 , H01L29/7831
摘要： Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 本文通常描述用于提供包括调制掺杂晶体管的三维互补金属氧化物半导体器件的装置和方法的实施例。 可以描述和要求保护其他实施例。
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16.发明申请公开(公告)号：US20070155063A1
公开(公告)日：2007-07-05
申请号：US11323688
申请日：2005-12-29
申请人： Suman Datta , Justin Brask , Been-Yih Jin , Jack Kavalieros , Mantu Hudait
发明人： Suman Datta , Justin Brask , Been-Yih Jin , Jack Kavalieros , Mantu Hudait
IPC分类号： H01L21/8232 , H01L21/335
CPC分类号： H01L29/66636 , H01L21/823807 , H01L21/823814 , H01L29/165 , H01L29/517 , H01L29/66628 , H01L29/7848 , Y10S438/933 , Y10S438/938
摘要： Enhancement mode transistors are described where a Group III-N compound is used in the source and drain regions to place tensile strain on the channel. The source and drain regions may be raised or embedded, and fabricated in conjunction with recessed or raised compression regions for p channel transistors.
摘要翻译： 描述了增强模式晶体管，其中在源极和漏极区域中使用III-N族化合物以在通道上施加拉伸应变。 源极和漏极区域可以被凸起或嵌入，并且与用于p沟道晶体管的凹陷或凸起的压缩区域一起制造。
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公开(公告)号：US20070138565A1
公开(公告)日：2007-06-21
申请号：US11305452
申请日：2005-12-15
申请人： Suman Datta , Mantu Hudait , Mark Doczy , Jack Kavalleros , Majumdar Amlan , Justin Brask , Been-Yih Jin , Matthew Metz , Robert Chau
发明人： Suman Datta , Mantu Hudait , Mark Doczy , Jack Kavalleros , Majumdar Amlan , Justin Brask , Been-Yih Jin , Matthew Metz , Robert Chau
IPC分类号： H01L29/94
CPC分类号： H01L29/7784 , H01L21/02178 , H01L21/02381 , H01L21/02546 , H01L21/823807 , H01L21/823885 , H01L21/8252 , H01L27/0605 , H01L27/092 , H01L29/1054 , H01L29/122 , H01L29/15 , H01L29/157 , H01L29/205 , H01L29/41783 , H01L29/42364 , H01L29/42376 , H01L29/517 , H01L29/66462 , H01L29/66522 , H01L29/7783
摘要： A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.
摘要翻译： CMOS器件包括具有第一量子阱结构的PMOS晶体管和具有第二量子阱结构的NMOS器件。 PMOS和NMOS晶体管形成在衬底上。
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18.发明申请公开(公告)号：US20140099759A1
公开(公告)日：2014-04-10
申请号：US14104096
申请日：2013-12-12
申请人： Ravi Pillarisetty , Mantu Hudait , Marko Radosavljevic , Willy Rachmady , Gilbert Dewey , Jack Kavalieros
发明人： Ravi Pillarisetty , Mantu Hudait , Marko Radosavljevic , Willy Rachmady , Gilbert Dewey , Jack Kavalieros
IPC分类号： H01L21/8238
CPC分类号： H01L29/155 , H01L21/823807 , H01L21/823892 , H01L29/0653 , H01L29/205 , H01L29/207 , H01L29/66431 , H01L29/66462 , H01L29/66795 , H01L29/7831
摘要： Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 本文通常描述用于提供包括调制掺杂晶体管的三维互补金属氧化物半导体器件的装置和方法的实施例。 可以描述和要求保护其他实施例。
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公开(公告)号：US08525151B2
公开(公告)日：2013-09-03
申请号：US13545358
申请日：2012-07-10
IPC分类号： H01L29/06
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
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公开(公告)号：US20120032146A1
公开(公告)日：2012-02-09
申请号：US13274468
申请日：2011-10-17
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
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