公开(公告)号：US08119488B2

公开(公告)日：2012-02-21

申请号：US13034592

申请日：2011-02-24

Applicant: Geert Hellings ,  Geert Eneman ,  Marc Meuris

Inventor： Geert Hellings ,  Geert Eneman ,  Marc Meuris

IPC: H01L29/778

CPC classification number: H01L29/7783 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

Abstract: A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.

Abstract translation: 公开了一种量子阱器件及其制造方法。 一方面，该器件包括覆盖衬底的量子阱区域，覆盖量子阱区域的一部分的栅极区域，与栅极区域相邻的源极和漏极区域。 量子阱区域包括覆盖在衬底上并包括具有第一带隙的半导体材料的缓冲结构，覆盖缓冲结构的沟道结构，包括具有第二带隙的半导体材料，以及覆盖沟道结构的阻挡层， 具有第三带隙的掺杂半导体材料。 第一和第三带隙比第二带隙宽。 源区和漏区中的每一个与栅极区自对准，并且包括具有比第二带隙宽的掺杂区和第四带隙的半导体材料。

公开(公告)号：US06851435B2

公开(公告)日：2005-02-08

申请号：US10074706

申请日：2002-02-13

Applicant: Paul Mertens ,  Marc Meuris ,  Marc Heyns

Inventor： Paul Mertens ,  Marc Meuris ,  Marc Heyns

IPC: H01L21/00 ,  B08B3/00

CPC classification number: H01L21/67051 ,  H01L21/67028 ,  H01L21/67034 ,  Y10S134/902

Abstract: A method and apparatus for dispensing a liquid on the surface of a localized zone of a substrate, for example for cleaning of etching purposes. Along with the liquid, a gaseous tensio-active substance is supplied, which is miscible with said liquid and when mixed with the liquid, reduces the surface tension of said liquid, thus containing the liquid in a local zone of the substrate surface.

Abstract translation: 一种用于在基板的局部区域的表面上分配液体的方法和装置，例如用于清洁蚀刻目的。 与液体一起供应气态张力活性物质，其与所述液体混溶，并且当与液体混合时，降低所述液体的表面张力，从而将液体包含在基底表面的局部区域中。

公开(公告)号：US06821349B2

公开(公告)日：2004-11-23

申请号：US09998889

申请日：2001-11-01

Applicant: Paul Mertens ,  Marc Meuris ,  Marc Heyns

Inventor： Paul Mertens ,  Marc Meuris ,  Marc Heyns

IPC: B08B300

CPC classification number: H01L21/67034 ,  H01L21/67028 ,  Y10S134/902

Abstract: A method and an apparatus for removing a liquid, i.e. a wet processing liquid, from at least one surface of at least one substrate is disclosed. A liquid is supplied on a surface of substrate. Simultaneously or thereafter the liquid or the substrate is locally heated to thereby reduce the surface tension of said liquid. By doing so, at least locally a sharply defined liquid-ambient boundary is created. According to the invention, the substrate is subjected to a rotary movement at a speed to guide said liquid-ambient boundary over the surface of the substrate thereby removing said liquid from said surface.

Abstract translation: 公开了一种用于从至少一个基底的至少一个表面去除液体即湿处理液体的方法和装置。 在基板的表面上供给液体。 同时或此后液体或基底局部加热，从而降低所述液体的表面张力。 通过这样做，至少在本地创建一个清晰定义的液体 - 环境边界。 根据本发明，基板以一定的速度进行旋转运动，以将所述液体 - 环境边界引导到基板的表面上，从而从所述表面移除所述液体。

公开(公告)号：US06322598B1

公开(公告)日：2001-11-27

申请号：US09363975

申请日：1999-07-29

Applicant: Marc Meuris ,  Paul Mertens ,  Marc Heyns

Inventor： Marc Meuris ,  Paul Mertens ,  Marc Heyns

IPC: H01L2100

CPC classification number: H01L21/6835 ,  H01L21/67011 ,  H01L29/0657 ,  H01L2221/68313 ,  H01L2221/68318 ,  H01L2924/10158 ,  Y10T29/41

Abstract: A semiconductor processing system for the production of semiconductor electronic devices is described, which includes a sequence of semiconductor processing steps carried out on a plurality of semiconductor processing machines, whereby the processing is carried out on discrete pieces of substrate which are smaller than conventional semiconductor wafers but may be made therefrom, or from larger diameter semiconducting wafers or from materials onto which semiconductor layers may be formed, and the discrete substrate pieces are selectably processable into the electronic devices either individually or as a plurality removably fixed to a support.

Abstract translation: 描述了用于生产半导体电子器件的半导体处理系统，其包括在多个半导体加工机器上执行的一系列半导体处理步骤，由此在比常规半导体晶片小的分立的基片上进行处理 但是可以由其形成，或者可以从较大直径的半导体晶片或从其上可以形成半导体层的材料制成，并且分立的衬底片可以可选择地可加工到电子器件中，或者可拆卸地固定到支撑件上。

公开(公告)号：US06247481B1

公开(公告)日：2001-06-19

申请号：US08881680

申请日：1997-06-24

Applicant: Marc Meuris ,  Paul Mertens ,  Marc Heyns

Inventor： Marc Meuris ,  Paul Mertens ,  Marc Heyns

IPC: B08B304

CPC classification number: H01L21/67057 ,  H01L21/67086 ,  Y10S134/902

Abstract: An apparatus for wet cleaning or etching of flat substrates comprising a tank with an inlet opening and outlet opening for said substrates. Said tank contains a cleaning liquid and is installed in a gaseous environment. At least one of the openings is a slice in a sidewall of the tank and is present below the liquid-surface. In the tank there may be a portion above the liquid filled with a gas with a pressure being lower than the pressure within said environment. The method comprises the step of transferring a substrate through the cleaning or etching liquid at a level underneath the surface of said liquid making use of said apparatus.

公开(公告)号：US5954068A

公开(公告)日：1999-09-21

申请号：US862890

申请日：1997-05-23

Applicant: Martin Weber ,  Marc Meuris ,  Ingrid Cornelissen

Inventor： Martin Weber ,  Marc Meuris ,  Ingrid Cornelissen

IPC: H01L21/00 ,  B08B3/02

CPC classification number: H01L21/67057

Abstract: A device for treatment of substrates in a fluid container includes a container containing a treatment fluid and a substrate transport device moveable into a position above the container. The substrate transport device has at least one substrate holding device for securing the substrates in a first position and releasing the substrates in a second position. A third position may be provided in which a first set of substrates is secured and a second set of substrates is released. The substrate holding device is preferably at least one rotatable securing rod.

Abstract translation: 用于处理流体容器中的基板的装置包括容纳处理流体的容器和可移动到容器上方位置的基板输送装置。 基板输送装置具有至少一个基板保持装置，用于将基板固定在第一位置，并将基板释放在第二位置。 可以提供第三位置，其中固定第一组基板并释放第二组基板。 基板保持装置优选为至少一个可旋转的固定杆。

公开(公告)号：US08524562B2

公开(公告)日：2013-09-03

申请号：US12560282

申请日：2009-09-15

Applicant: Wei-E Wang ,  Han Chung Lin ,  Marc Meuris

Inventor： Wei-E Wang ,  Han Chung Lin ,  Marc Meuris

IPC: H01L21/336

CPC classification number: H01L21/3003 ,  H01L21/28176 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28255 ,  H01L21/28264 ,  H01L21/3006 ,  H01L21/324 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/78

Abstract: A method to reduce (avoid) Fermi Level Pinning (FLP) in high mobility semiconductor compound channel such as Ge and III-V compounds (e.g. GaAs or InGaAs) in a Metal Oxide Semiconductor (MOS) device. The method is using atomic hydrogen which passivates the interface of the high mobility semiconductor compound with the gate dielectric and further repairs defects. The methods further improve the MOS device characteristics such that a MOS device with a quantum well is created.

Abstract translation: 在金属氧化物半导体（MOS）器件中的诸如Ge和III-V化合物（例如GaAs或InGaAs）的高迁移率半导体化合物通道中减少（避免）费米能级固定（FLP）的方法。 该方法使用原子氢，其使高迁移率半导体化合物的界面与栅极电介质钝化，并进一步修复缺陷。 该方法进一步改善了MOS器件特性，使得产生具有量子阱的MOS器件。

公开(公告)号：US07915608B2

公开(公告)日：2011-03-29

申请号：US12463338

申请日：2009-05-08

Applicant: Geert Hellings ,  Geert Eneman ,  Marc Meuris

Inventor： Geert Hellings ,  Geert Eneman ,  Marc Meuris

IPC: H01L29/06

CPC classification number: H01L29/7783 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

Abstract: A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.

Abstract translation: 公开了一种量子阱器件及其制造方法。 一方面，该器件包括覆盖衬底的量子阱区域，覆盖量子阱区域的一部分的栅极区域，与栅极区域相邻的源极和漏极区域。 量子阱区域包括覆盖在衬底上并包括具有第一带隙的半导体材料的缓冲结构，覆盖缓冲结构的沟道结构，包括具有第二带隙的半导体材料，以及覆盖沟道结构的阻挡层， 具有第三带隙的掺杂半导体材料。 第一和第三带隙比第二带隙宽。 源区和漏区中的每一个与栅极区自对准，并且包括具有比第二带隙宽的掺杂区和第四带隙的半导体材料。

公开(公告)号：US20100065824A1

公开(公告)日：2010-03-18

申请号：US12560282

申请日：2009-09-15

Applicant: Wei-E Wang ,  Han Chung Lin ,  Marc Meuris

Inventor： Wei-E Wang ,  Han Chung Lin ,  Marc Meuris

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L21/3003 ,  H01L21/28176 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28255 ,  H01L21/28264 ,  H01L21/3006 ,  H01L21/324 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/78

Abstract: A method to reduce (avoid) Fermi Level Pinning (FLP) in high mobility semiconductor compound channel such as Ge and III-V compounds (e.g. GaAs or InGaAs) in a Metal Oxide Semiconductor (MOS) device. The method is using atomic hydrogen which passivates the interface of the high mobility semiconductor compound with the gate dielectric and further repairs defects. The methods further improve the MOS device characteristics such that a MOS device with a quantum well is created.

Abstract translation: 在金属氧化物半导体（MOS）器件中的诸如Ge和III-V化合物（例如GaAs或InGaAs）的高迁移率半导体化合物通道中减少（避免）费米能级固定（FLP）的方法。 该方法使用原子氢，其使高迁移率半导体化合物的界面与栅极电介质钝化，并进一步修复缺陷。 该方法进一步改善了MOS器件特性，使得产生具有量子阱的MOS器件。

公开(公告)号：US20090085167A1

公开(公告)日：2009-04-02

申请号：US12201948

申请日：2008-08-29

Applicant: David Brunco ,  Marc Meuris

Inventor： David Brunco ,  Marc Meuris

IPC: H01L21/321 ,  H01L29/12

CPC classification number: H01L21/28518

Abstract: The present invention is related to the field of semiconductor processing and, more particularly, to the formation of low resistance layers on germanium substrates. One aspect of the present invention is a method comprising: providing a substrate on which at least one area of a germanium layer is exposed; depositing over the substrate and said germanium area a metal, e.g., Co or Ni; forming over said metal, a capping layer consisting of a silicon oxide containing layer, of a silicon nitride layer, or of a tungsten layer, preferably of a SiO2 layer; then annealing for metal-germanide formation; then removing selectively said capping layer and any unreacted metal, wherein the temperature used for forming said capping layer formation is lower than the annealing temperature.

Abstract translation: 本发明涉及半导体处理领域，更具体地说，涉及在锗基片上形成低电阻层。 本发明的一个方面是一种方法，包括：提供其上暴露锗层的至少一个区域的基底; 在衬底和所述锗区域上沉积金属，例如Co或Ni; 在所述金属上形成由氧化硅含有层，氮化硅层或钨层构成的覆盖层，优选为SiO 2层; 然后退火金属锗化物形成; 然后选择性地去除所述覆盖层和任何未反应的金属，其中用于形成所述覆盖层形成的温度低于退火温度。