公开(公告)号：US20110025537A1

公开(公告)日：2011-02-03

申请号：US12843591

申请日：2010-07-26

申请人： Yi Gyeong KIM ,  Min Hyung CHO ,  Jong Kee KWON

发明人： Yi Gyeong KIM ,  Min Hyung CHO ,  Jong Kee KWON

IPC分类号： H03M3/00 ,  G06G7/18

CPC分类号： G06G7/186 ,  H03M3/43 ,  H03M3/454 ,  H03M3/486

摘要： Provided are an active resistance-capacitance (RC) integrator and a continuous-time sigma-delta modulator, which have a gain control function. The active RC integrator includes an amplifier, a first base resistor connected between a first input node and a positive input port of the amplifier, a second base resistor connected between a second input node and a negative input port of the amplifier, a first resistor unit connected between the second input node and the positive input port of the amplifier, and a second resistor unit connected between the first input node and the negative input port of the amplifier. A resistor network including resistors and switches is configured to vary an input resistance, so that an active RC integrator may have a gain control function.

摘要翻译： 提供了具有增益控制功能的有源电阻 - 电容（RC）积分器和连续时间Σ-Δ调制器。 有源RC积分器包括放大器，连接在放大器的第一输入节点和正输入端口之间的第一基极电阻器，连接在放大器的第二输入节点和负输入端口之间的第二基极电阻器，第一电阻器单元 连接在放大器的第二输入节点和正输入端口之间，以及连接在放大器的第一输入节点和负输入端口之间的第二电阻器单元。 包括电阻器和开关的电阻器网络被配置为改变输入电阻，使得有源RC积分器可以具有增益控制功能。

公开(公告)号：US20100156534A1

公开(公告)日：2010-06-24

申请号：US12507701

申请日：2009-07-22

申请人： Yi Gyeong KIM ,  Min Hyung CHO ,  Jong Kee KWON

发明人： Yi Gyeong KIM ,  Min Hyung CHO ,  Jong Kee KWON

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F2203/45528 ,  H03F2203/45591

摘要： Provided are a gain control device and an amplifier using the gain control device. The gain control device includes a first input resistance unit having a first variable resistor whose resistance is linearly variable and a first fixed resistor respectively receiving a first input signal and a second input signal having a sign different from the first input signal and outputting current through a first output terminal, and a second input resistance unit having a second fixed resistor and a second variable resistor whose resistance is linearly variable respectively receiving the first input signal and the second input signal and outputting current through a second output terminal.Since the gain control device can separately perform dB-linear gain control, it is easily combined with a circuit, such as a continuous-time sigma-delta modulator (SDM), a continuous-time filter, and a continuous-time analog-to-digital converter (ADC), and enables miniaturization and low power consumption.

摘要翻译： 提供了增益控制装置和使用增益控制装置的放大器。 所述增益控制装置包括具有电阻为线性变化的第一可变电阻器和分别接收第一输入信号的第一固定电阻器和具有与第一输入信号不同的符号的第二输入信号的第一输入电阻单元， 第一输出端子和具有第二固定电阻器和第二可变电阻器的第二输入电阻单元，其电阻为线性变化，分别接收第一输入信号和第二输入信号，并通过第二输出端子输出电流。 由于增益控制装置可以单独执行dB线性增益控制，所以可以容易地与诸如连续时间Σ-Δ调制器（SDM），连续时间滤波器以及连续时间模拟到 数字转换器（ADC），并实现小型化和低功耗。

公开(公告)号：US07719455B2

公开(公告)日：2010-05-18

申请号：US12195232

申请日：2008-08-20

申请人： Yi Gyeong Kim ,  Min Hyung Cho ,  Chong Ki Kwon

发明人： Yi Gyeong Kim ,  Min Hyung Cho ,  Chong Ki Kwon

IPC分类号： H03M1/66

CPC分类号： H03M1/0665 ,  H03M1/74 ,  H03M3/464 ,  H03M3/502

摘要： Provided are a dynamic element-matching method, a multi-bit Digital-to-Analog Converter (DAC), and a delta-sigma modulator with the multi-bit DAC and delta-sigma DAC with the multi-bit DAC. The dynamic element-matching method relates to preventing periodic signal components (in-band tones) from being generated from a delta-sigma modulator of a delta-sigma Analog-to-Digital Converter (ADC) and a multi-bit DAC used in a delta-sigma DAC. Unit elements are selected in a new sequence according to a simple algorithm every time that each of unit elements is selected once, and thus the unit elements are not periodically used. Consequently, it is possible to prevent in-band tones caused by a conventional Data Weighted Averaging (DWA) algorithm.

摘要翻译： 提供了动态元件匹配方法，多位数模转换器（DAC）和具有多位DAC的多位DAC和Δ-ΣDAC的Δ-Σ调制器。 动态元件匹配方法涉及防止从Δ-Σ模数转换器（ADC）的delta-sigma调制器和用于在A-Sigma模数转换器（ADC）中使用的多位DAC的周期性信号分量（带内音调） Δ-ΣDAC。 每次选择一个单位元素一次时，根据简单算法以新的顺序选择单位元素，因此单位元素不被周期性地使用。 因此，可以防止由传统的数据加权平均（DWA）算法引起的带内音调。

公开(公告)号：US20080093534A1

公开(公告)日：2008-04-24

申请号：US11866698

申请日：2007-10-03

申请人： Bong Ki Mheen ,  Min Hyung Cho ,  Mi Jin Kim ,  Young Joo Song

发明人： Bong Ki Mheen ,  Min Hyung Cho ,  Mi Jin Kim ,  Young Joo Song

IPC分类号： G01J1/44

CPC分类号： H04N5/3745 ,  H01L27/14603 ,  H01L27/14609 ,  H04N5/361

摘要： Provided are an image sensor and a driving circuit of a transfer transistor for charge transfer in a light receiving unit realized in the image sensor, in which a pixel is insufficiently reset to be always operated in a pseudo pinch-off condition, unlike a conventional reset method in which a pixel structure of a 4-transistor CMOS image sensor or its analogue has to be depleted, thereby reducing a reset voltage of a photodiode and reducing a dark current and fixed pattern noise generated due to discordance of characteristics between pixels.The image sensor includes a conversion module for lowering a turn-on voltage of a signal or changing its waveform, a module for providing a negative voltage if necessary, and at least one module for limiting the slope of an output signal, and the characteristics of the image sensor are improved by operating the transfer transistor in the pseudo pinch-off mode.

摘要翻译： 提供了一种在图像传感器中实现的光接收单元中的用于电荷转移的转移晶体管的图像传感器和驱动电路，其中像素不充分复位以始终以伪夹断状态操作，与常规复位不同 必须耗尽4晶体管CMOS图像传感器或其类似物的像素结构的方法，从而减少光电二极管的复位电压并减少由于像素之间的特性不一致而产生的暗电流和固定图案噪声。 图像传感器包括用于降低信号的导通电压或改变其波形的转换模块，如果需要的用于提供负电压的模块，以及用于限制输出信号的斜率的至少一个模块，以及 通过在伪夹断模式中操作传输晶体管来改善图像传感器。

公开(公告)号：US20070126616A1

公开(公告)日：2007-06-07

申请号：US11591740

申请日：2006-11-02

申请人： Min Hyung Cho ,  Chong Ki Kwon ,  Jong Dae Kim ,  Kwi Dong Kim

发明人： Min Hyung Cho ,  Chong Ki Kwon ,  Jong Dae Kim ,  Kwi Dong Kim

IPC分类号： H03M1/66

CPC分类号： H03M1/0673 ,  H03M1/742

摘要： Provided is a digital-to-analog converter converting a digital signal into an analog signal. The digital-to-analog converter includes a decoder for selecting a current source from digital inputs, a current switch driver for driving a current switch of the current source, and a random selection switch disposed between the decoder and the current switch driver, and randomly resetting a connection relationship between outputs of the decoder and inputs of the current switch driver every clock. According to the present invention, the linearity of the digital-to-analog converter may be enhanced by changing the current source selected every clock signal to compensate for non-linearity of the digital-to-analog converter according to the spatial arrangement of the current sources.

摘要翻译： 提供了将数字信号转换为模拟信号的数模转换器。 数模转换器包括用于从数字输入端选择电流源的解码器，用于驱动电流源的电流开关的电流开关驱动器，以及设置在解码器和电流开关驱动器之间的随机选择开关，以及随机 在每个时钟复位解码器的输出和当前开关驱动器的输入之间的连接关系。 根据本发明，可以通过改变每个时钟信号选择的电流源来增强数模转换器的线性度，以根据电流的空间布置补偿数模转换器的非线性 来源。

公开(公告)号：US07212585B2

公开(公告)日：2007-05-01

申请号：US10734574

申请日：2003-12-12

申请人： Min-Hyung Cho ,  Seung-Chul Lee ,  Mun-Yang Park

发明人： Min-Hyung Cho ,  Seung-Chul Lee ,  Mun-Yang Park

IPC分类号： H04L27/04 ,  H04L27/20 ,  H04B17/00

CPC分类号： H04L27/365 ,  H03C3/40

摘要： There is provided a quadrature modulation transmitter which is capable of solving several problems of the conventional transmitter while performing the same function as the heterodyne transmitter or the digital IF transmitter, in which a circuit structure is simplified and a power consumption is reduced compared with the conventional transmitter. The quadrature modulation transmitter includes: a digital processing block for receiving an I-channel data, a Q-channel data and a clock signal, modulating the I-channel data or an inverted I-channel data into a first analog signal by means of an I-channel DAC according to a switching of an I-clock signal identical to the clock signal, and modulating the Q-channel data and an inverted Q-channel data into a second analog signal by means of a Q-channel DAC according to a switching of a Q-clock signal, the Q-clock signal being an inverted clock signal; and an analog processing block for receiving the first and second analog signals from the digital processing block, adding the first and second analog signals, converting the added signal into an RF domain signal through a mixing operation, and amplifying and transmitting the RF domain signal.

摘要翻译： 提供了一种正交调制发射机，其能够解决传统发射机的几个问题，同时执行与外差发射机或数字IF发射机相同的功能，其中电路结构被简化并且功耗相比于常规发射机 发射机。 正交调制发射机包括：数字处理块，用于接收I信道数据，Q信道数据和时钟信号，通过以下方式将I信道数据或反相I信道数据调制成第一模拟信号 I沟道DAC根据与时钟信号相同的I时钟信号的切换，并且通过根据下述的Q信道DAC将Q通道数据和反相Q通道数据调制成第二模拟信号 Q时钟信号的切换，Q时钟信号是反相时钟信号; 以及模拟处理块，用于从数字处理块接收第一和第二模拟信号，添加第一和第二模拟信号，通过混合操作将相加的信号转换成RF域信号，以及放大和发射RF域信号。

公开(公告)号：US20130148456A1

公开(公告)日：2013-06-13

申请号：US13545877

申请日：2012-07-10

申请人： Min-Hyung CHO ,  Yi-Gyeong KIM ,  Tae Moon ROH ,  Woo Seok YANG ,  Jong-Kee KWON ,  Jongdae KIM

发明人： Min-Hyung CHO ,  Yi-Gyeong KIM ,  Tae Moon ROH ,  Woo Seok YANG ,  Jong-Kee KWON ,  Jongdae KIM

IPC分类号： G05F1/10 ,  G11C5/14

CPC分类号： G11C5/145 ,  H02M3/073 ,  H02M2001/0045

摘要： Provided is a voltage supply circuit using a charge pump. The voltage supply circuit enhances charge pump output voltage fluctuation characteristics depending on load variation of a charge pump voltage generator (load regulation characteristics) when receiving an operation power supply voltage of the charge pump through a regulator. The voltage supply circuit is configured to feed back fluctuation of a charge pump output voltage to a charge pump voltage regulator. The fluctuation of the charge pump output voltage is compensated through fluctuation of an output voltage of the charge pump to active enhance the load regulation characteristics.

摘要翻译： 提供了使用电荷泵的电压供给电路。 当通过调节器接收电荷泵的操作电源电压时，电压供应电路根据电荷泵电压发生器的负载变化（负载调节特性）来增强电荷泵输出电压波动特性。 电压供给电路被配置为将电荷泵输出电压的波动反馈到电荷泵电压调节器。 通过电荷泵的输出电压的波动补偿电荷泵输出电压的波动，从而有效提高负载调节特性。

公开(公告)号：US20120154189A1

公开(公告)日：2012-06-21

申请号：US13310606

申请日：2011-12-02

申请人： Min-Hyung CHO ,  Yi-Gyeong Kim ,  Jong-Kee Kwon

发明人： Min-Hyung CHO ,  Yi-Gyeong Kim ,  Jong-Kee Kwon

IPC分类号： H03M1/66 ,  H03B1/00

CPC分类号： H03K17/04106 ,  H03M1/06 ,  H03M1/66

摘要： Provided are a current switch driving circuit generating a signal for driving a current switch, and a digital-to-analog converter using the same. The current switch driving circuit includes a first PMOS transistor in which a source terminal is connected to a power supply terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal, an NMOS transistor in which a drain terminal is connected to the drain terminal of the first PMOS transistor, and a gate terminal receives the input signal, a second PMOS transistor in which a source terminal is connected to a source terminal of the NMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a ground terminal, and a control current source allowing the second PMOS transistor to be maintained constantly in an ON state.

摘要翻译： 提供了产生用于驱动电流开关的信号的电流开关驱动电路和使用该电流开关的数模转换器。 电流开关驱动电路包括：第一PMOS晶体管，源极端子连接到电源端子，栅极端子接收输入信号，漏极端子输出驱动信号;漏极端子连接的NMOS晶体管 到第一PMOS晶体管的漏极端子，并且栅极端子接收输入信号;第二PMOS晶体管，其源极端子连接到NMOS晶体管的源极端子，栅极端子连接到偏置电压端子， 并且漏极端子连接到接地端子，并且使得允许第二PMOS晶体管恒定地处于导通状态的控制电流源。

公开(公告)号：US08199038B2

公开(公告)日：2012-06-12

申请号：US12843591

申请日：2010-07-26

申请人： Yi Gyeong Kim ,  Min Hyung Cho ,  Jong Kee Kwon

发明人： Yi Gyeong Kim ,  Min Hyung Cho ,  Jong Kee Kwon

IPC分类号： H03M3/00

CPC分类号： G06G7/186 ,  H03M3/43 ,  H03M3/454 ,  H03M3/486

摘要： Provided are an active resistance-capacitance (RC) integrator and a continuous-time sigma-delta modulator, which have a gain control function. The active RC integrator includes an amplifier, a first base resistor connected between a first input node and a positive input port of the amplifier, a second base resistor connected between a second input node and a negative input port of the amplifier, a first resistor unit connected between the second input node and the positive input port of the amplifier, and a second resistor unit connected between the first input node and the negative input port of the amplifier. A resistor network including resistors and switches is configured to vary an input resistance, so that an active RC integrator may have a gain control function.

摘要翻译： 提供了具有增益控制功能的有源电阻 - 电容（RC）积分器和连续时间Σ-Δ调制器。 有源RC积分器包括放大器，连接在放大器的第一输入节点和正输入端口之间的第一基极电阻器，连接在放大器的第二输入节点和负输入端口之间的第二基极电阻器，第一电阻器单元 连接在放大器的第二输入节点和正输入端口之间，以及连接在放大器的第一输入节点和负输入端口之间的第二电阻器单元。 包括电阻器和开关的电阻器网络被配置为改变输入电阻，使得有源RC积分器可以具有增益控制功能。

公开(公告)号：US20120098688A1

公开(公告)日：2012-04-26

申请号：US13184182

申请日：2011-07-15

申请人： Yi-Gyeong KIM ,  Bong Chan KIM ,  Min-Hyung CHO ,  Jong-Kee KWON

发明人： Yi-Gyeong KIM ,  Bong Chan KIM ,  Min-Hyung CHO ,  Jong-Kee KWON

IPC分类号： H03M3/02 ,  H03H11/26

CPC分类号： H03M3/372 ,  H03M3/458

摘要： Provided is a clock timing adjustment device for adjusting a time difference of clocks and a delta-sigma modulator. The clock timing adjustment device includes a power detection unit and a timing adjustment unit. The power detection unit receives input signals which are generated using pairs of first and second clocks having a plurality of clock time differences and respectively correspond to the clock time differences, detects powers of the input signals, and outputs a control signal corresponding to a clock time difference where the power is minimized. The timing adjustment unit receives a reference clock and the control signal and outputs the first and second clocks having the clock time difference where the power is minimized from the reference clock according to the control signal.

摘要翻译： 提供了一种用于调整时钟的时间差和Δ-Σ调制器的时钟定时调整装置。 时钟定时调整装置包括功率检测单元和定时调整单元。 功率检测单元接收使用具有多个时钟时间差的第一和第二时钟对生成的输入信号，并分别对应于时钟时间差，检测输入信号的功率，并输出对应于时钟时间的控制信号 功率最小化的差异。 定时调整单元接收参考时钟和控制信号，并根据控制信号从参考时钟输出具有最小功率的时钟时间差的第一和第二时钟。