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    Computer module device and method
    12.
    发明授权
    Computer module device and method 失效
    计算机模块设备及方法

    公开(公告)号：US06452790B1

    公开(公告)日：2002-09-17

    申请号：US09610581

    申请日：2000-07-05

    Applicant: William W. Y. Chu ,  Tony Man ,  Peng Cheng Lin

    Inventor： William W. Y. Chu ,  Tony Man ,  Peng Cheng Lin

    IPC: H05K720

    CPC classification number: G06F1/20 ,  G06F1/18 ,  G06F1/181

    Abstract: A method for installing memory into a computer module. The method includes providing a used computer module, which comprises a housing to enclose a hard disk drive, a memory module for random access memory devices and a central processing unit coupled to the hard disk drive and coupled to the random access memory. The method also includes removing a top cover from a base of the housing to expose the hard disk drive and the memory module. Thereafter, the hard disk drive is removed from the base of the housing and a second hard disk drive is inserted onto the base. The top cover is reattached to the base of the housing to complete the installation process.

    Abstract translation: 一种将内存安装到计算机模块中的方法。 该方法包括提供使用的计算机模块，其包括用于封装硬盘驱动器的外壳，用于随机存取存储器设备的存储器模块和耦合到硬盘驱动器并耦合到随机存取存储器的中央处理单元。 该方法还包括从壳体的底部移除顶盖以暴露硬盘驱动器和存储器模块。 此后，将硬盘驱动器从壳体的基座移除，并且将第二硬盘驱动器插入到基座上。 顶盖重新连接到外壳的底部，以完成安装过程。

    Electronic package for isolated circuits
    15.
    发明授权
    Electronic package for isolated circuits 失效
    隔离电路用电子封装

    公开(公告)号：US5491360A

    公开(公告)日：1996-02-13

    申请号：US364700

    申请日：1994-12-28

    Applicant: Peng-Cheng Lin

    Inventor： Peng-Cheng Lin

    IPC: H01L23/495 ,  H01L23/48 ,  H01L29/44 ,  H01L29/52 ,  H01L29/60

    CPC classification number: H01L23/49541 ,  H01L23/49575 ,  H01L24/49 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/14

    Abstract: An electric packaging arrangement for isolated circuits is described. A lead frame is formed with at least one off-centered tie bar connected between one of the circuits on the lead frame's internal lead and an external handling side rail. The tie bar is off-centered by a specified distance from the longitudinal center line of the package. The external side rail is used to support and align the lead frame during manufacturing. To meet safety requirements, such as the UL-1950 requirements, electrical components in a primary circuit and a secondary circuit are attached and electrically coupled to the lead frame in a manner such that the smallest internal distance between internal circuits is at least a predefined distance. The external distance between the tie bar, connected to the secondary circuit, and the closest primary circuit pin is set to meet external circuit component spacing requirements for isolated circuits. The described arrangement has a number of applications including packaging isolated circuits using small form factor packages such as dual-in-line (DIP) and small outline (SO) packages.

    Abstract translation: 描述了用于隔离电路的电气封装装置。 引线框架形成有连接在引线框架的内部引线上的一个电路和外部处理侧导轨之间的至少一个偏心连接杆。 拉杆从包装的纵向中心线偏离指定距离。 外部侧轨用于在制造过程中支撑和对齐引线框架。 为了满足诸如UL-1950要求的安全要求，初级电路和次级电路中的电气部件被附接并电连接到引线框架，使得内部电路之间的最小内部距离至少为预定距离 。 连接到次级电路的连接杆与最接近的初级电路引脚之间的外部距离设置为满足隔离电路的外部电路部件间隔要求。 所描述的布置具有许多应用，包括使用诸如双列直插（DIP）和小外形（SO）封装的小尺寸封装的封装隔离电路。

    Method of placing a semiconductor with die collet having cavity wall recess
    16.
    发明授权
    Method of placing a semiconductor with die collet having cavity wall recess 失效
    放置半导体的方法，其具有具有腔壁凹陷的管芯夹头

    公开(公告)号：US5415331A

    公开(公告)日：1995-05-16

    申请号：US272713

    申请日：1994-07-08

    Applicant: Peng-Cheng Lin

    Inventor： Peng-Cheng Lin

    IPC: H01L21/683 ,  H05K13/04 ,  H01L21/52 ,  H01L21/68

    CPC classification number: H01L21/6838 ,  H01L24/75 ,  H05K13/0408 ,  H01L2221/68322 ,  Y10T279/11

    Abstract: The invention provides a method and apparatus for picking a separated semiconductor die 128 from a wafer and placing it on a die attach pad 144 for bonding thereto. In a preferred embodiment, the apparatus comprises a die collet having a body 124 with a proximal end 123 and a distal end 125; at least one pair of spaced-apart walls 136 extending distally from the distal end of the body and having opposing faces 181 defining an aperture 126, the faces of the walls being sloped such that a distal portion of the aperture is wider than the die and a proximal portion of the aperture is narrower than the die; a recess 152 on the faces of the walls extending substantially the length of the die, the recess having a distally-facing surface 154 for contacting at least a portion of the top side 138 of the die; and means for holding the die in the aperture, usually including a vacuum port 128. The method comprises providing a collet like the aforementioned; positioning the aperture 126 over a die 120; exerting a vacuum pressure through the vacuum port 128 to retain the die in the aperture such that a portion of the top side contacts the distally-facing surface 154 of the recess 152; positioning the die over the pad 144 such that the bottom side of the die is parallel to the pad; and discontinuing the vacuum pressure to release the die from the aperture.

    Abstract translation: 本发明提供了一种用于从晶片拾取分离的半导体管芯128并将其放置在管芯附接垫144上用于与其结合的方法和装置。 在优选实施例中，该装置包括具有主体124的模具夹头，其具有近端123和远端125; 至少一对隔开的壁136从主体的远端向远侧延伸并且具有限定孔126的相对面181，壁的表面倾斜，使得孔的远端部分比模具更宽， 孔的近端部分比模具更窄; 在壁的表面上的凹部152基本上延伸到模具的长度，凹部具有用于接触模具的顶侧138的至少一部分的朝向远端的表面154; 以及用于将模具保持在孔中的装置，通常包括真空端口128.该方法包括提供如上所述的夹头; 将孔126定位在模具120上; 通过真空端口128施加真空压力以将模具保持在孔中，使得顶侧的一部分接触凹部152的面向远端的表面154; 将管芯定位在焊盘144上，使得管芯的底侧平行于焊盘; 并停止真空压力以从孔中释放模具。

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