公开(公告)号：US20100014264A1

公开(公告)日：2010-01-21

申请号：US12348175

申请日：2009-01-02

申请人： Won-Chul LIM

发明人： Won-Chul LIM

IPC分类号： H05K7/00 ,  H05K1/02

CPC分类号： H05K3/242 ,  H01L21/4846 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/117 ,  H05K3/0052 ,  H05K2203/049 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A PCB (printed circuit board) for manufacturing a semiconductor package. The PCB includes a plurality of semiconductor package unit frames; a scribe lane dividing the plurality of semiconductor package unit frames; and a printed circuit pattern for plating directly connected to a plurality of bond fingers on the semiconductor package unit frames and disposed to cross the scribe lane between adjacent semiconductor package unit frames.

摘要翻译： 一种用于制造半导体封装的PCB（印刷电路板）。 PCB包括多个半导体封装单元框架; 划分所述多个半导体封装单元框架的划线; 以及用于电镀的印刷电路图案，其直接连接到半导体封装单元框架上的多个键合指状物并且设置成跨越相邻半导体封装单元框架之间的划线。

公开(公告)号：US07425466B2

公开(公告)日：2008-09-16

申请号：US11679730

申请日：2007-02-27

申请人： Won-Chul Lim

发明人： Won-Chul Lim

IPC分类号： H01L21/44

CPC分类号： H01L24/85 ,  H01L24/48 ,  H01L24/78 ,  H01L25/0657 ,  H01L2224/48463 ,  H01L2224/78301 ,  H01L2224/85 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.

摘要翻译： 提供半导体封装引线接合系统和使用方法。 引线接合系统包括加热并支撑其上安装有具有突出端的多层半导体芯片结构的印刷电路板的加热块。 通过支撑半导体芯片结构的突出部分的印刷电路板中的开口插入的支撑件安装在加热块的预定区域中。 加热块上的多个支撑件可以支撑多个半导体芯片结构上的过分部分。

公开(公告)号：US08431442B2

公开(公告)日：2013-04-30

申请号：US13253425

申请日：2011-10-05

申请人： Sang Wook Park ,  Tae Gyeong Chung ,  Ho Geon Song ,  Won Chul Lim

发明人： Sang Wook Park ,  Tae Gyeong Chung ,  Ho Geon Song ,  Won Chul Lim

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method of manufacturing semiconductor chips includes providing a semiconductor substrate including circuit regions, irradiating the semiconductor substrate with a laser beam onto to form a frangible layer, and polishing the semiconductor substrate to separate the circuit regions of the semiconductor substrate from one another into semiconductor chips. The frangible layer may be removed completely during the polishing of the semiconductor substrate.

摘要翻译： 制造半导体芯片的方法包括提供包括电路区域的半导体衬底，用激光束照射半导体衬底以形成易碎层，以及抛光半导体衬底以将半导体衬底的电路区域彼此分离为半导体芯片 。 在半导体衬底的抛光期间可以完全去除易碎层。

公开(公告)号：US20070029650A1

公开(公告)日：2007-02-08

申请号：US11361729

申请日：2006-02-23

申请人： Won-Chul Lim ,  Sang-Yeop Lee

发明人： Won-Chul Lim ,  Sang-Yeop Lee

IPC分类号： H01L23/495

CPC分类号： H01L23/49555 ,  H01L25/105 ,  H01L25/50 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor package presents Z-shaped outer leads. The outer leads have a first portion located near an upper surface of a package body, a second portion, and a third portion located near a lower surface of a package body. A second similar semiconductor package may be stacked on the first semiconductor package with the third portion of the second semiconductor package located on and electrically connected to the first portion of the first semiconductor package. In each of the first and second semiconductor packages, a distance between the bottom surface of the third portion of the outer lead and the lower surface of a package body may be greater than a distance between the top surface of the first portion of the outer lead and the upper surface of the package body.

摘要翻译： 半导体封装呈现Z形外引线。 外引线具有位于封装主体的上表面附近的第一部分，第二部分和位于封装主体的下表面附近的第三部分。 第二类似的半导体封装可以堆叠在第一半导体封装上，其中第二半导体封装的第三部分位于第一半导体封装的第一部分上，并且与第一半导体封装的第一部分电连接。 在第一和第二半导体封装的每一个中，外部引线的第三部分的底表面和封装主体的下表面之间的距离可以大于外引线的第一部分的顶表面之间的距离 和包装体的上表面。