公开(公告)号：US20130099279A1

公开(公告)日：2013-04-25

申请号：US13716803

申请日：2012-12-17

Applicant: ABB Technology AG

Inventor： Liutauras Storasta ,  Arnost Kopta ,  Munaf Rahimo

IPC: H01L27/088

CPC classification number: H01L27/088 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7395 ,  H01L29/7396

Abstract: An exemplary power semiconductor device with a wafer having an emitter electrode on an emitter side and a collector electrode on a collector side, an (n-) doped drift layer, an n-doped first region, a p-doped base layer, an n-doped source region, and a gate electrode, all of which being formed between the emitter and collector electrodes. The emitter electrode contacts the base layer and the source region within a contact area. An active semiconductor cell is formed within the wafer, and includes layers that lie in orthogonal projection with respect to the emitter side of the contact area of the emitter electrode. The device also includes a p-doped well, which is arranged in the same plane as the base layer, but outside the active cell. The well is electrically connected to the emitter electrode at least one of directly or via the base layer.

Abstract translation: 具有在发射极侧具有发射极的晶片和集电极侧的集电极，第（n-）掺杂漂移层，n掺杂的第一区，p掺杂的基极层，n 掺杂的源极区和栅电极，所有这些都形成在发射极和集电极之间。 发射极电极在接触区域内接触基极层和源极区域。 有源半导体单元形成在晶片内，并且包括相对于发射极电极的接触区域的发射极侧处于正交投影的层。 该器件还包括一个p掺杂的阱，它被布置在与基极层相同的平面中，但是在活性电池的外部。 阱直接或经由基底层至少一个电连接到发射极电极。

公开(公告)号：US20160300904A1

公开(公告)日：2016-10-13

申请号：US15184261

申请日：2016-06-16

Applicant: ABB Technology AG

Inventor： Marina Antoniou ,  Florin Udrea ,  Iulian Nistor ,  Munaf Rahimo ,  Chiara Corvasce

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/66 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/0619 ,  H01L29/0623 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/404 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813

Abstract: A termination region of an IGBT is described, in which surface p-rings are combined with oxide/polysilicon-filled trenches, buried p-rings and surface field plates, so as to obtain an improved distribution of potential field lines in the termination region. The combination of surface ring termination and deep ring termination offers a significant reduction in the amount silicon area which is required for the termination region.

Abstract translation: 描述了IGBT的终端区域，其中表面p环与氧化物/多晶硅填充的沟槽，埋入的p环和表面场板组合，以便获得终止区域中的电位场线的改进的分布。 表面环终止和深环终止的组合提供了终端区域所需的硅面积的显着减少。

公开(公告)号：US09385223B2

公开(公告)日：2016-07-05

申请号：US14748774

申请日：2015-06-24

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Martin Arnold ,  Jan Vobecky ,  Umamaheswara Vemulapati

IPC: H01L29/74 ,  H01L27/06 ,  H01L29/744

CPC classification number: H01L29/7416 ,  H01L27/0664 ,  H01L29/744

Abstract: A reverse-conducting power semiconductor device with a wafer has first and second main sides which are arranged opposite and parallel to each other. The device includes a plurality of diode cells and a plurality of gate commutated thyristors (GCT) cells. Each GCT cell includes layers of a first conductivity type (e.g., n-type) and a second conductivity type (e.g., p-type) between the first and second main sides. The device includes at least one mixed part in which diode anode layers of the diode cells alternate with first cathode layers of the GCT cells. In each diode cell, a diode buffer layer of the first conductivity type is arranged between the diode anode layer and a drift layer such that the diode buffer layer covers lateral sides of the diode anode layer from the first main side to a depth of approximately 90% of the thickness of the diode anode layer.

Abstract translation: 具有晶片的反向导电功率半导体器件具有彼此相对并平行布置的第一和第二主侧面。 该器件包括多个二极管单元和多个栅极换向晶闸管（GCT）单元。 每个GCT单元包括在第一和第二主侧之间的第一导电类型（例如，n型）和第二导电类型（例如，p型）的层。 该器件包括至少一个混合部分，其中二极管单元的二极管阳极层与GCT单元的第一阴极层交替。 在每个二极管单元中，第二导电类型的二极管缓冲层布置在二极管阳极层和漂移层之间，使得二极管缓冲层覆盖二极管阳极层的从第一主侧到大约90度的深度的侧面 二极管阳极层的厚度的百分比。

公开(公告)号：US20160020298A1

公开(公告)日：2016-01-21

申请号：US14867327

申请日：2015-09-28

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Maxi Andenna

IPC: H01L29/66

CPC classification number: H01L29/66325 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/0834 ,  H01L29/36 ,  H01L29/66333 ,  H01L29/7395

Abstract: Method for manufacturing an insulated gate bipolar transistor, which includes a drift layer of a first conductivity type between an emitter side, at which a gate and emitter electrode are arranged, and a collector side, at which a collector electrode is arranged including steps: providing a substrate of a second conductivity type, applying a dopant of the first conductivity type on the first side, creating a drift layer of the first conductivity type on the first layer, diffusing the ions such that a buffer layer is created, having a higher doping concentration than the drift layer, creating a base layer of the second conductivity type on the drift layer, creating an emitter layer of the first conductivity type on the base layer, thinning the substrate on the second side such that the remaining part of the substrate forms a collector layer.

Abstract translation: 一种用于制造绝缘栅双极晶体管的方法，其包括布置有栅极和发射极之间的发射极侧之间的第一导电类型的漂移层和布置集电极的集电极侧，其中包括以下步骤：提供 第二导电类型的衬底，在第一侧上施加第一导电类型的掺杂剂，在第一层上产生第一导电类型的漂移层，扩散离子，使得形成缓冲层，具有较高的掺杂 在漂移层上产生第二导电类型的基底层，在基底层上形成第一导电类型的发射极层，使第二面上的衬底变薄，使得衬底的剩余部分形成 集电极层。

公开(公告)号：US09153676B2

公开(公告)日：2015-10-06

申请号：US14154736

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Maxi Andenna ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L29/732 ,  H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L29/08

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides, including a drift layer, a base layer electrically contacting an emitter electrode and completely separated from the drift layer, first and second source regions arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and first and second trench gate electrodes. The first trench gate electrodes are separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel is formable between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrodes. An enhancement layer separates the base layer from the drift layer. The second trench gate electrode is separated from the base layer, the enhancement layer and the drift layer by a third insulating layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层，包括漂移层，与发射极电气接触并与漂移层完全分离的基极层，布置在基极层上的发射极侧的第一和第二源极区域，并且电接触发射极 电极，以及第一和第二沟槽栅电极。 第一沟槽栅极电极通过第一绝缘层与基极层，第一源极区域和漂移层分离。 在发射电极，第一源极区域，基极层和漂移层之间形成通道。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层将基底层与漂移层分开。 第二沟槽栅电极通过第三绝缘层与基极层，增强层和漂移层分离。

公开(公告)号：US09099520B2

公开(公告)日：2015-08-04

申请号：US14154790

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Maxi Andenna ,  Chiara Corvasce ,  Arnost Kopta

IPC: H01L21/33 ,  H01L29/732 ,  H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L29/08

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides. The layers include a drift layer, a base layer electrically contacting an emitter electrode and separated from the drift layer, a first source region arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and a first trench gate electrode arranged lateral to the base layer and separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel exits between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrode. An enhancement layer separates the base layer from the drift layer in a plane parallel to the emitter side. A grounded gate electrode includes a second, grounded trench gate electrode and an electrically conducting layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括漂移层，与发射电极电接触并与漂移层分离的基极层，布置在基底层上朝向发射极侧并电接触发射极的第一源极区域和布置在侧面上的第一沟槽栅电极 并且通过第一绝缘层与基底层，第一源极区域和漂移层分离。 一个通道在发射电极，第一源极区域，基极层和漂移层之间离开。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层在与发射极侧平行的平面中分离基底层与漂移层。 接地栅电极包括第二接地沟槽栅电极和导电层。

公开(公告)号：US09006041B2

公开(公告)日：2015-04-14

申请号：US14046156

申请日：2013-10-04

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Arnost Kopta ,  Thomas Clausen ,  Maxi Andenna

IPC: H01L21/332 ,  H01L21/8224 ,  H01L29/76 ,  H01L29/00 ,  H01L27/082 ,  H01L29/66 ,  H01L29/08 ,  H01L29/36 ,  H01L29/739 ,  H01L29/861

CPC classification number: H01L29/66325 ,  H01L29/0834 ,  H01L29/36 ,  H01L29/6609 ,  H01L29/66136 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/861

Abstract: A method for manufacturing a bipolar punch-through semiconductor device is disclosed, which includes providing a wafer having a first and a second side, wherein on the first side a high-doped layer of the first conductivity type having constant high doping concentration is arranged; epitaxially growing a low-doped layer of the first conductivity type on the first side; performing a diffusion step by which a diffused inter-space region is created at the inter-space of the layers; creating at least one layer of the second conductivity type on the first side; and reducing the wafer thickness within the high-doped layer on the second side so that a buffer layer is created, which can include the inter-space region and the remaining part of the high-doped layer, wherein the doping profile of the buffer layer decreases steadily from the doping concentration of the high-doped region to the doping concentration of the drift layer.

Abstract translation: 公开了一种制造双极穿通半导体器件的方法，其包括提供具有第一和第二侧的晶片，其中在第一侧上布置具有恒定的高掺杂浓度的第一导电类型的高掺杂层; 在第一侧上外延生长第一导电类型的低掺杂层; 执行扩散步骤，通过该扩散步骤在层的间隔处产生扩散的空间间区域; 在第一侧产生至少一层第二导电类型; 并且减小第二侧上的高掺杂层内的晶片厚度，从而形成缓冲层，其可以包括空间间区域和高掺杂层的剩余部分，其中缓冲层的掺杂分布 从高掺杂区域的掺杂浓度稳定地降低到漂移层的掺杂浓度。

公开(公告)号：US08847277B2

公开(公告)日：2014-09-30

申请号：US13852366

申请日：2013-03-28

Applicant: ABB Technology AG

Inventor： Munaf Rahimo ,  Martin Arnold ,  Thomas Stiasny

IPC: H01L29/66 ,  H01L21/332

CPC classification number: H01L29/747 ,  H01L29/0692 ,  H01L29/0834 ,  H01L29/7416 ,  H01L29/7428 ,  H01L29/744

Abstract: An exemplary reverse-conducting power semiconductor device with a wafer having a first main side and a second main side parallel to the first main side. The device includes a plurality of diode cells and a plurality of IGCT cells, each IGCT cell including between the first and second main side: a first anode electrode, a first anode layer of a first conductivity type on the first anode electrode, a buffer layer of a second conductivity type on the first anode layer, a drift layer of the second conductivity type on the buffer layer, a base layer of the first conductivity type on the drift layer, a first cathode layer of a second conductivity type on the base layer, and a cathode electrode on the first cathode layer. A mixed part includes the second anode layers of the diode cells alternating with the first cathode layers of the IGCT cells.

Abstract translation: 一种示例性的反向导电功率半导体器件，其具有与第一主侧平行的第一主侧和第二主侧的晶片。 该装置包括多个二极管单元和多个IGCT单元，每个IGCT单元包括在第一和第二主侧之间：第一阳极电极，第一阳极电极上的第一导电类型的第一阳极层，缓​​冲层 在第一阳极层上具有第二导电类型的漂移层，缓冲层上的第二导电类型的漂移层，漂移层上的第一导电类型的基极层，基底层上的第二导电类型的第一阴极层 和第一阴极层上的阴极电极。 混合部分包括与IGCT电池的第一阴极层交替的二极管单元的第二阳极层。

公开(公告)号：US08803192B2

公开(公告)日：2014-08-12

申请号：US13850732

申请日：2013-03-26

Applicant: ABB Technology AG

Inventor： Jan Vobecky ,  Munaf Rahimo

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/74

CPC classification number: H01L29/74 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/102 ,  H01L29/66136 ,  H01L29/66363 ,  H01L29/8613

Abstract: An exemplary bipolar non-punch-through power semiconductor device includes a semiconductor wafer and a first electrical contact on a first main side and a second electrical contact on a second main side. The wafer has an inner region with a wafer thickness and a termination region that surrounds the inner region, such that the wafer thickness is reduced at least on the first main side with a negative bevel. The semiconductor wafer has at least a two-layer structure with layers of different conductivity types, which can include a drift layer of a first conductivity type, a first layer of a second conductivity type at a first layer depth and directly connected to the drift layer on the first main side and contacting the first electrical contact, and a second layer of the second conductivity type arranged in the termination region on the first main side up to a second layer depth.

Abstract translation: 示例性的双极非穿通功率半导体器件包括半导体晶片和第一主侧上的第一电触点和第二主侧上的第二电触点。 晶片具有晶片厚度的内部区域和围绕内部区域的终止区域，使得晶片厚度至少在第一主侧面上以负斜面减小。 半导体晶片具有至少具有不同导电类型的层的两层结构，其可以包括第一导电类型的漂移层，第一层深度处的第二导电类型的第一层并且直接连接到漂移层 在第一主侧并且接触第一电接触，以及布置在第一主侧上的端接区域中的第二导电类型的第二层直到第二层深度。

公开(公告)号：US20130207159A1

公开(公告)日：2013-08-15

申请号：US13850732

申请日：2013-03-26

Applicant: ABB TECHNOLOGY AG

Inventor： Jan Vobecky ,  Munaf Rahimo

IPC: H01L29/74 ,  H01L29/66

CPC classification number: H01L29/74 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/102 ,  H01L29/66136 ,  H01L29/66363 ,  H01L29/8613

Abstract: An exemplary bipolar non-punch-through power semiconductor device includes a semiconductor wafer and a first electrical contact on a first main side and a second electrical contact on a second main side. The wafer has an inner region with a wafer thickness and a termination region that surrounds the inner region, such that the wafer thickness is reduced at least on the first main side with a negative bevel. The semiconductor wafer has at least a two-layer structure with layers of different conductivity types, which can include a drift layer of a first conductivity type, a first layer of a second conductivity type at a first layer depth and directly connected to the drift layer on the first main side and contacting the first electrical contact, and a second layer of the second conductivity type arranged in the termination region on the first main side up to a second layer depth.

Abstract translation: 示例性的双极非穿通功率半导体器件包括半导体晶片和第一主侧上的第一电触点和第二主侧上的第二电触点。 晶片具有晶片厚度的内部区域和围绕内部区域的终止区域，使得晶片厚度至少在第一主侧面上以负斜面减小。 半导体晶片具有至少具有不同导电类型的层的两层结构，其可以包括第一导电类型的漂移层，第一层深度处的第二导电类型的第一层并且直接连接到漂移层 在第一主侧并且接触第一电接触，以及布置在第一主侧上的端接区域中的第二导电类型的第二层直到第二层深度。