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    Memory Device and Method Providing Logic Connections for Data Transfer
    11.
    发明申请
    Memory Device and Method Providing Logic Connections for Data Transfer 有权
    为数据传输提供逻辑连接的存储器件和方法

    公开(公告)号：US20090244949A1

    公开(公告)日：2009-10-01

    申请号：US12058191

    申请日：2008-03-28

    申请人： Roberto Ravasio ,  Andreas Kux ,  Detlev Richter ,  Girolamo Gallo ,  Josef Willer ,  Ramirez Xavier Veredas

    发明人： Roberto Ravasio ,  Andreas Kux ,  Detlev Richter ,  Girolamo Gallo ,  Josef Willer ,  Ramirez Xavier Veredas

    IPC分类号： G11C5/06

    CPC分类号： G06F13/385 ,  Y02D10/14 ,  Y02D10/151

    摘要： In an embodiment, a method for transferring data in a memory device is provided. The method may include transferring data from a first memory cell arrangement including a plurality of memory cells to a second memory cell arrangement including a plurality of memory cells via a connecting circuit arrangement coupled to the plurality of memory cell arrangements and providing a plurality of controllable connections via a plurality of connecting circuit terminals, the memory cell arrangements being connected with at least one connecting circuit terminal of the plurality of connecting circuit terminals, wherein the connecting circuit is configured to provide arbitrarily controllable signal flow connections between the plurality of connecting circuit terminals. The data are transferred via a logic connection using the controllable connections. Simultaneously, a further logic connection may be provided to a memory cell arrangement of the memory cell arrangements using the controllable connections.

    摘要翻译： 在一个实施例中，提供了一种用于在存储器件中传送数据的方法。 该方法可以包括经由耦合到多个存储器单元布置的连接电路装置将数据从包括多个存储单元的第一存储单元布置传送到包括多个存储单元的第二存储单元布置，并提供多个可控制的连接 通过多个连接电路端子，所述存储单元布置与所述多个连接电路端子中的至少一个连接电路端子连接，其中所述连接电路被配置为在所述多个连接电路端子之间提供任意可控的信号流连接。 数据通过使用可控连接的逻辑连接进行传输。 同时，可以使用可控制连接将另外的逻辑连接提供给存储器单元布置。

    Method of Operating an Integrated Circuit Having at Least One Memory Cell
    13.
    发明申请
    Method of Operating an Integrated Circuit Having at Least One Memory Cell 失效
    操作具有至少一个存储单元的集成电路的方法

    公开(公告)号：US20090040841A1

    公开(公告)日：2009-02-12

    申请号：US11834612

    申请日：2007-08-06

    申请人： Detlev Richter ,  Andreas Kux

    发明人： Detlev Richter ,  Andreas Kux

    IPC分类号： G11C7/00 ,  G11C7/06

    CPC分类号： G11C16/10 ,  G11C16/28

    摘要： Embodiments of the invention relate generally to a method for writing at least one memory cell of an integrated circuit; a method for writing at least two memory cells of an integrated circuit; and to integrated circuits. In an embodiment of the invention, a method for writing at least one memory cell of an integrated circuit is provided. The method includes determining a writing state of at least one reference memory cell, depending on the writing state of the at least one reference memory cell, writing the at least one memory cell, and writing the at least one reference memory cell to a given writing state.

    摘要翻译： 本发明的实施例一般涉及一种用于写入集成电路的至少一个存储单元的方法; 一种用于写入集成电路的至少两个存储单元的方法; 和集成电路。 在本发明的实施例中，提供了一种用于写入集成电路的至少一个存储单元的方法。 该方法包括根据至少一个参考存储器单元的写入状态确定至少一个参考存储器单元的写入状态，写入至少一个存储单元，以及将至少一个参考存储器单元写入给定的写入 州。

    Integrated Circuit Having NAND Memory Cell Strings
    17.
    发明申请
    Integrated Circuit Having NAND Memory Cell Strings 有权
    具有NAND存储器单元串的集成电路

    公开(公告)号：US20090097317A1

    公开(公告)日：2009-04-16

    申请号：US11872655

    申请日：2007-10-15

    申请人： Josef Willer ,  Franz Hofmann ,  Detlev Richter ,  Nicolas Nagel

    发明人： Josef Willer ,  Franz Hofmann ,  Detlev Richter ,  Nicolas Nagel

    IPC分类号： G11C16/00 ,  H01L21/336 ,  H01L29/788

    CPC分类号： G11C16/0483 ,  G11C16/0475 ,  H01L27/115 ,  H01L27/11565 ,  H01L27/11568

    摘要： Embodiments of the present invention relate generally to integrated circuits and methods for manufacturing an integrated circuit. In an embodiment of the invention, an integrated circuit having a memory cell is provided. The memory cell may include a trench in a carrier, a charge trapping layer structure in the trench, the charge trapping layer structure comprising at least two separate charge trapping regions, electrically conductive material at least partially filled in the trench, and source/drain regions next to the trench.

    摘要翻译： 本发明的实施例一般涉及用于制造集成电路的集成电路和方法。 在本发明的实施例中，提供了具有存储单元的集成电路。 存储单元可以包括载体中的沟槽，沟槽中的电荷俘获层结构，电荷俘获层结构包括至少两个分离的电荷俘获区，至少部分填充在沟槽中的导电材料以及源/漏区 旁边的沟槽。

    Automatic exposure control device for an X-ray generator
    18.
    发明授权
    Automatic exposure control device for an X-ray generator 失效
    用于X射线发生器的自动曝光控制装置

    公开(公告)号：US4313055A

    公开(公告)日：1982-01-26

    申请号：US47559

    申请日：1979-06-08

    申请人： Detlev Richter ,  Robert Zimmermann

    发明人： Detlev Richter ,  Robert Zimmermann

    IPC分类号： H05G1/44 ,  H05G1/42

    CPC分类号： H05G1/44

    摘要： The automatic exposure control devices of contemporary X-ray generators have a constant lead time which accurately takes into account the actual ratios or delays only for a given setting of current and voltage. Particularly in the case of high voltages and small currents, the lead times are too short, thus giving rise to overexposures. The invention provides an automatic exposure control device in which the lead time is calculated from the exposure data by an arithmetic unit. The lead time is adjusted on a correspondingly constructed adjustable lead time network. An arithmetic unit of this kind is not required for the programmed exposure technique. The correct lead times can then be programmed and stored together with the other exposure parameters.

    摘要翻译： 现代X射线发生器的自动曝光控制装置具有恒定的提前时间，仅在给定的电流和电压设置下才能精确地考虑实际比例或延迟。 特别是在高电压和小电流的情况下，导通时间太短，从而导致过度曝光。 本发明提供了一种自动曝光控制装置，其中通过运算单元根据曝光数据计算提前时间。 在相应构建的可调节前置时间网络上调整前置时间。 编程曝光技术不需要这种算术单元。 然后可以将正确的交货时间与其他曝光参数一起编程和存储。