公开(公告)号：US11450759B2

公开(公告)日：2022-09-20

申请号：US17037941

申请日：2020-09-30

Applicant: Applied Materials, Inc.

Inventor： Steven C. H. Hung ,  Benjamin Colombeau ,  Andy Lo ,  Byeong Chan Lee ,  Johanes F. Swenberg ,  Theresa Kramer Guarini ,  Malcolm J. Bevan

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/423 ,  C30B29/06 ,  C30B29/52 ,  C23C8/02 ,  C23C8/16 ,  C23C8/80 ,  C23C16/56 ,  C23C16/455

Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-κ layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-κ layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.

公开(公告)号：US20180211833A1

公开(公告)日：2018-07-26

申请号：US15879008

申请日：2018-01-24

Applicant: Applied Materials, Inc.

Inventor： Ning Li ,  Mihaela Balseanu ,  Li-Qun Xia ,  Dongqing Yang ,  Lala Zhu ,  Malcolm J. Bevan ,  Theresa Kramer Guarini ,  Wenbo Yan

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/458 ,  H01L21/3105

CPC classification number: H01L21/02271 ,  C23C16/0245 ,  C23C16/04 ,  C23C16/45551 ,  C23C16/458 ,  C23C16/4583 ,  C23C16/56 ,  H01L21/0228 ,  H01L21/02299 ,  H01L21/02312 ,  H01L21/3105 ,  H01L21/32

Abstract: Processing platforms having a central transfer station with a robot and an environment having greater than or equal to about 0.1% by weight water vapor, a pre-clean chamber connected to a side of the transfer station and a batch processing chamber connected to a side of the transfer station. The processing platform configured to pre-clean a substrate to remove native oxides from a first surface, form a blocking layer using a alkylsilane and selectively deposit a film. Methods of using the processing platforms and processing a plurality of wafers are also described.

公开(公告)号：US12266560B2

公开(公告)日：2025-04-01

申请号：US17832775

申请日：2022-06-06

Applicant: Applied Materials, Inc.

Inventor： Kin Pong Lo ,  Vladimir Nagorny ,  Wei Liu ,  Theresa Kramer Guarini ,  Bernard L. Hwang ,  Malcolm J. Bevan ,  Jacob Abraham ,  Swayambhu Prasad Behera

IPC: H01L21/687 ,  C23C16/455 ,  C23C16/458 ,  H01J37/32 ,  H01L21/67

Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.

公开(公告)号：US11380575B2

公开(公告)日：2022-07-05

申请号：US16939898

申请日：2020-07-27

Applicant: Applied Materials, Inc.

Inventor： Kin Pong Lo ,  Vladimir Nagorny ,  Wei Liu ,  Theresa Kramer Guarini ,  Bernard L. Hwang ,  Malcolm J. Bevan ,  Jacob Abraham ,  Swayambhu Prasad Behera

IPC: H01L21/687 ,  H01J37/32 ,  C23C16/458 ,  C23C16/455 ,  H01L21/67

Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.

公开(公告)号：US20210104617A1

公开(公告)日：2021-04-08

申请号：US17037941

申请日：2020-09-30

Applicant: Applied Materials, Inc.

Inventor： Steven C.H. Hung ,  Benjamin Colombeau ,  Andy Lo ,  Byeong Chan Lee ,  Johanes F. Swenberg ,  Theresa Kramer Guarini ,  Malcolm J. Bevan

IPC: H01L29/66 ,  C30B29/06 ,  C30B29/52 ,  C23C8/02 ,  C23C8/16 ,  C23C8/80 ,  C23C16/455 ,  C23C16/56

Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-κ layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-κ layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.

公开(公告)号：US10971357B2

公开(公告)日：2021-04-06

申请号：US16152395

申请日：2018-10-04

Applicant: Applied Materials, Inc.

Inventor： Wei Liu ,  Theresa Kramer Guarini ,  Linlin Wang ,  Malcolm Bevan ,  Johanes S. Swenberg ,  Vladimir Nagorny ,  Bernard L. Hwang ,  Kin Pong Lo ,  Lara Hawrylchak ,  Rene George

IPC: H01L21/02

Abstract: A method of modifying a layer in a semiconductor device is provided. The method includes depositing a low quality film on a semiconductor substrate, and exposing a surface of the low quality film to a first process gas comprising helium while the substrate is heated to a first temperature, and exposing a surface of the low quality film to a second process gas comprising oxygen gas while the substrate is heated to a second temperature that is different than the first temperature. The electrical properties of the film are improved by undergoing the aforementioned processes.

公开(公告)号：US10573719B2

公开(公告)日：2020-02-25

申请号：US15279257

申请日：2016-09-28

Applicant: Applied Materials, Inc.

Inventor： Shiyu Sun ,  Naomi Yoshida ,  Theresa Kramer Guarini ,  Sung Won Jun ,  Benjamin Colombeau ,  Michael Chudzik

IPC: H01L21/76 ,  H01L29/423 ,  H01L21/02 ,  H01L21/306 ,  H01L21/762 ,  H01L29/66 ,  H01L29/786 ,  H01L29/15

Abstract: Embodiments described herein generally relate to methods and apparatus for horizontal gate all around (hGAA) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. The different materials may be silicon containing materials and one or more III/V materials. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.

公开(公告)号：US10290504B2

公开(公告)日：2019-05-14

申请号：US15822435

申请日：2017-11-27

Applicant: Applied Materials, Inc.

Inventor： Wei Liu ,  Theresa Kramer Guarini ,  Huy Q. Nguyen ,  Malcolm Bevan ,  Houda Graoui ,  Philip A. Bottini ,  Bernard L. Hwang ,  Lara Hawrylchak ,  Rene George

IPC: H01L21/28 ,  H01L21/3105 ,  H01J37/32 ,  H01L29/51

Abstract: Embodiments described herein generally relate to a method and apparatus for plasma treating a process chamber. A substrate having a gate stack formed thereon may be placed in a process chamber, and hydrogen containing plasma may be used to treat the gate stack in order to cure the defects in the gate stack. As the result of hydrogen containing plasma treatment, the gate stack has lower leakage and improved reliability. To protect the process chamber from Hx+ ions and H* radicals generated by the hydrogen containing plasma, the process chamber may be treated with a plasma without the substrate placed therein and prior to the hydrogen containing plasma treatment. In addition, components of the process chamber that are made of a dielectric material may be coated with a ceramic coating including an yttrium containing oxide in order to protect the components from the plasma.

公开(公告)号：US09460920B1

公开(公告)日：2016-10-04

申请号：US14755099

申请日：2015-06-30

Applicant: Applied Materials, Inc.

Inventor： Shiyu Sun ,  Naomi Yoshida ,  Theresa Kramer Guarini ,  Sung Won Jun ,  Benjamin Colombeau ,  Michael Chudzik

IPC: H01L21/76 ,  H01L21/02 ,  H01L21/762 ,  H01L29/66

CPC classification number: H01L29/66795 ,  H01L29/42392 ,  H01L29/66742

Abstract: Embodiments described herein generally relate to methods and apparatus for horizontal gate all around (hGAA) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. The different materials may be silicon containing materials and one or more III/V materials. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.

Abstract translation: 本文描述的实施例通常涉及用于水平门全周（hGAA）隔离的方法和装置。 可以在衬底上形成包括布置在交替堆叠的层中的不同材料的超晶格结构。 不同的材料可以是含硅材料和一种或多种III / V材料。 在一个实施例中，超晶格结构的至少一个层可以被氧化以形成邻近衬底的掩埋氧化物层。