公开(公告)号：US07367345B1

公开(公告)日：2008-05-06

申请号：US10834548

申请日：2004-04-28

申请人： David Hemker ,  Fred C. Redeker ,  John Boyd ,  John M. de Larios ,  Michael Ravkin ,  Mikhail Korolik

发明人： David Hemker ,  Fred C. Redeker ,  John Boyd ,  John M. de Larios ,  Michael Ravkin ,  Mikhail Korolik

IPC分类号： B08B3/10 ,  B08B7/04 ,  G03C5/00

CPC分类号： G03F7/70341 ,  Y10S134/902

摘要： A method for processing a substrate is provided which includes generating a meniscus on the surface of the substrate and applying photolithography light through the meniscus to enable photolithography processing of a surface of the substrate.

摘要翻译： 提供了一种用于处理衬底的方法，其包括在衬底的表面上产生弯月面并且通过弯月面施加光刻光以实现衬底表面的光刻处理。

公开(公告)号：US20080057182A1

公开(公告)日：2008-03-06

申请号：US11611758

申请日：2006-12-15

申请人： John Boyd ,  Yezdi Dordi ,  Tiruchirapalli Arunagiri ,  Benjamin Mooring ,  John Parks ,  William Thie ,  Fritz Redeker ,  Arthur Howald ,  Alan Schoepp ,  David Hemker

发明人： John Boyd ,  Yezdi Dordi ,  Tiruchirapalli Arunagiri ,  Benjamin Mooring ,  John Parks ,  William Thie ,  Fritz Redeker ,  Arthur Howald ,  Alan Schoepp ,  David Hemker

IPC分类号： B05D5/12 ,  B05D1/36

CPC分类号： H01L21/67207 ,  H01L21/76843 ,  H01L21/76877

摘要： A method for filling a trench of a substrate in a controlled environment is provided. The method initiates with etching a trench in the substrate in a first chamber of a cluster tool. A barrier layer configured to prevent electromigration is deposited over an exposed surface of the trench in a second chamber of the cluster tool and the trench is filled with a gap fill material deposited directly onto the barrier layer in the cluster tool. A semiconductor device fabricated by the method is also provided.

摘要翻译： 提供了一种用于在受控环境中填充衬底的沟槽的方法。 该方法通过在簇工具的第一室中蚀刻衬底中的沟槽来启动。 构造成防止电迁移的阻挡层沉积在簇工具的第二腔中的沟槽的暴露表面上，并且沟槽填充有直接沉积在簇工具中的阻挡层上的间隙填充材料。 还提供了通过该方法制造的半导体器件。

公开(公告)号：US07309618B2

公开(公告)日：2007-12-18

申请号：US10463525

申请日：2003-06-18

申请人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas J. Bright

发明人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas J. Bright

IPC分类号： H01L21/00

CPC分类号： B24B37/013 ,  B24B1/005 ,  B24B49/105 ,  B24B57/02 ,  H01L21/67253

摘要： A semiconductor processing system is provided. The semiconductor processing system includes a first sensor configured to isolate and measure a film thickness signal portion for a wafer having a film disposed over a substrate. A second sensor is configured to detect a film thickness dependent signal in situ during processing, i.e. under real process conditions and in real time. A controller configured to receive a signal from the first sensor and a signal from the second sensor. The controller is capable of determining a calibration coefficient from data represented by the signal from the first sensor. The controller is capable of applying the calibration coefficient to the data associated with the second sensor, wherein the calibration coefficient substantially eliminates inaccuracies introduced to the film thickness dependent signal from the substrate. A method for calibrating an eddy current sensor is also provided.

摘要翻译： 提供半导体处理系统。 半导体处理系统包括：第一传感器，被配置为隔离和测量具有设置在基板上的膜的晶片的膜厚度信号部分。 第二传感器被配置为在处理期间，即在实际工艺条件下和实时地在原位检测膜厚依赖信号。 控制器，被配置为从第一传感器接收信号和来自第二传感器的信号。 控制器能够根据来自第一传感器的信号表示的数据确定校准系数。 控制器能够将校准系数应用于与第二传感器相关联的数据，其中校准系数基本上消除了从衬底引入与膜厚度相关的信号的不准确性。 还提供了用于校准涡流传感器的方法。

公开(公告)号：US20050066739A1

公开(公告)日：2005-03-31

申请号：US10671978

申请日：2003-09-26

申请人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

发明人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

IPC分类号： B24B37/04 ,  B24B49/14 ,  B24B49/16 ,  G01L1/00

CPC分类号： B24B37/015 ,  B24B49/16

摘要： A chemical mechanical planarization (CMP) system is provided. The CMP system includes a wafer carrier configured to support a wafer during a planarization process, the wafer carrier including a sensor configured to detect a signal indicating a stress being experienced by the wafer during planarization. A computing device in communication with the sensor is included. The computing device is configured to translate the signal to generate a stress map for analysis. A stress relief device responsive to a signal received from the computing device is included. The stress relief device is configured to relieve the stress being experienced by the wafer.

摘要翻译： 提供化学机械平面化（CMP）系统。 CMP系统包括被配置为在平坦化处理期间支撑晶片的晶片载体，晶片载体包括被配置成在平坦化期间检测指示由晶片经历的应力的信号的传感器。 包括与传感器通信的计算设备。 计算设备被配置为平移信号以产生用于分析的应力图。 包括响应于从计算设备接收的信号的应力消除装置。 应力释放装置被构造成减轻晶片经历的应力。

公开(公告)号：US20050007107A1

公开(公告)日：2005-01-13

申请号：US10914017

申请日：2004-08-05

申请人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

发明人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

IPC分类号： H01L21/66 ,  G01B7/06

CPC分类号： H01L22/26

摘要： A method for detecting a thickness of a layer of a wafer to be processed is provided. The method includes defining a plurality of sensors configured to create a set of complementary sensors proximate the wafer. Further included in the method is distributing the plurality of sensors along a particular radius of the wafer such that each sensor of the plurality of sensors is out of phase with an adjacent sensor by a same angle. The method also includes measuring signals generated by the plurality of sensors. Further included is averaging the signals generated by the plurality of sensors so as to generate a combination signal. The averaging is configured to remove noise from the combination signal such that the combination signal is capable of being correlated to identify the thickness of the layer.

摘要翻译： 提供了一种用于检测待处理晶片层的厚度的方法。 该方法包括限定配置成在晶片附近产生一组互补传感器的多个传感器。 该方法中还包括沿着晶片的特定半径分布多个传感器，使得多个传感器中的每个传感器与相邻的传感器相异相同角度。 该方法还包括测量由多个传感器产生的信号。 还包括对由多个传感器产生的信号进行平均以产生组合信号。 平均化被配置为从组合信号去除噪声，使得组合信号能够被相关联以识别层的厚度。

公开(公告)号：US06821899B2

公开(公告)日：2004-11-23

申请号：US10390520

申请日：2003-03-14

申请人： Shrikant P. Lohokare ,  Andrew D. Bailey, III ,  David Hemker ,  Joel M. Cook

发明人： Shrikant P. Lohokare ,  Andrew D. Bailey, III ,  David Hemker ,  Joel M. Cook

IPC分类号： H01L21311

CPC分类号： H01L21/32135 ,  H01L21/32115 ,  H01L21/32136 ,  H01L21/7684

摘要： A system and method for planarizing a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple of features in the pattern. The conductive interconnect material having an overburden portion. The overburden portion includes a localized non-uniformity. An additional layer is formed on the overburden portion. The additional layer and the overburden portion are planarized. The planarizing process substantially entirely removes the additional layer.

摘要翻译： 用于平坦化图案化半导体衬底的系统和方法包括接收图案化的半导体衬底。 图案化半导体衬底具有填充图案中的多个特征的导电互连材料。 导电互连材料具有覆盖层部分。 覆盖层部分包括局部不均匀性。 在覆盖层部分上形成附加层。 附加层和覆盖层部分被平坦化。 平坦化工艺基本上完全除去附加层。

公开(公告)号：US20090134520A1

公开(公告)日：2009-05-28

申请号：US12366235

申请日：2009-02-05

申请人： Nicolas Bright ,  David Hemker ,  Fritz C. Redeker ,  Yezdi Dordi

发明人： Nicolas Bright ,  David Hemker ,  Fritz C. Redeker ,  Yezdi Dordi

IPC分类号： H01L23/52

CPC分类号： H01L21/76822 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L2924/0002 ,  H01L2924/00

摘要： Back-End of Line (BEoL) interconnect structures, and methods for their manufacture, are provided. The structures are characterized by narrower conductive lines and reduced overall dielectric constant values. Conformal diffusion barrier layers, and selectively formed capping layers, are used to isolate the conductive lines and vias from surrounding dielectric layers in the interconnect structures. The methods of the invention employ techniques to narrow the openings in photoresist masks in order to define narrower vias. More narrow vias increase the amount of misalignment that can be tolerated between the vias and the conductive lines.

摘要翻译： 提供了后端（BEoL）互连结构及其制造方法。 这些结构的特征在于导线越窄，总体介电常数值越小。 保形扩散阻挡层和选择性形成的覆盖层用于将导线和通孔与互连结构中的周围电介质层隔离。 本发明的方法采用技术来缩小光致抗蚀剂掩模中的开口，以便限定更窄的通孔。 更窄的通孔增加了通孔和导电线之间可以容许的不对准量。

公开(公告)号：US07084621B2

公开(公告)日：2006-08-01

申请号：US10256055

申请日：2002-09-25

申请人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas J. Bright

发明人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas J. Bright

IPC分类号： G01B7/06

CPC分类号： G01B7/105 ,  G01N27/023

摘要： A method and an apparatus for enhancement of the for measuring resistance-based features of a substrate is provided. The apparatus includes a sensor configured to detect a signal produced by a eddy current generated electromagnetic field. The magnetic field enhancing source is positioned to the alternative side of the object under measurement relative to the sensor to enable the sensitivity enhancing action. The sensitivity enhancing source increases the intensity of the eddy current generated in the object under measurement, and as a result the sensitivity of the sensor. A system enabled to determine a thickness of a layer and a method for determining a resistance-based feature characteristic are also provided.

摘要翻译： 提供了用于增强基板的基于电阻的特征的方法和装置。 该装置包括被配置为检测由涡流产生的电磁场产生的信号的传感器。 磁场增强源相对于传感器定位在测量对象的替代侧，以实现灵敏度增强作用。 灵敏度增强源增加了测量对象中产生的涡流的强度，从而提高了传感器的灵敏度。 还提供了能够确定层的厚度的系统和用于确定基于电阻的特征特征的方法。

公开(公告)号：US06951624B2

公开(公告)日：2005-10-04

申请号：US10881094

申请日：2004-06-29

申请人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas J. Bright

发明人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas J. Bright

IPC分类号： C23F1/00 ,  G01B7/06 ,  G01R27/00 ,  H01L21/302

CPC分类号： G01B7/105 ,  G01B7/107 ,  G01B2210/44

摘要： A system for processing a wafer is provided. The system includes a chemical mechanical planarization (CMP) tool. The CMP tool includes a wafer carrier defined within a housing. A carrier film is affixed to the bottom surface and supports a wafer. A sensor embedded in the wafer carrier. The sensor is configured to induce an eddy current in the wafer to determine a proximity and a thickness of the wafer. A sensor array external to the CMP tool is included. The sensor array is in communication with the sensor embedded in the wafer carrier and substantially eliminates a distance sensitivity. The sensor array provides an initial thickness of the wafer to allow for a calibration to be performed on the sensor embedded in the wafer carrier. The calibration offsets variables causing inaccuracies in the determination of the thickness of the wafer during CMP operation. A method and an apparatus are also provided.

摘要翻译： 提供了一种用于处理晶片的系统。 该系统包括化学机械平面化（CMP）工具。 CMP工具包括限定在壳体内的晶片载体。 载体膜固定到底表面并支撑晶片。 嵌入晶片载体的传感器。 传感器被配置为在晶片中感应涡流以确定晶片的接近度和厚度。 包括CMP工具外部的传感器阵列。 传感器阵列与嵌入在晶片载体中的传感器连通，并且基本上消除了距离灵敏度。 传感器阵列提供晶片的初始厚度，以允许对嵌入在晶片载体中的传感器进行校准。 校准偏移了在CMP操作期间确定晶片厚度的不准确性的变量。 还提供了一种方法和装置。

公开(公告)号：US07749689B2

公开(公告)日：2010-07-06

申请号：US12055219

申请日：2008-03-25

申请人： David Hemker ,  Fred C. Redeker ,  John Boyd ,  John M. de Larios ,  Michael Ravkin ,  Mikhail Korolik

发明人： David Hemker ,  Fred C. Redeker ,  John Boyd ,  John M. de Larios ,  Michael Ravkin ,  Mikhail Korolik

IPC分类号： G03F7/26

CPC分类号： G03F7/70341 ,  Y10S134/902

摘要： A method for processing a substrate is provided which includes generating a meniscus on the surface of the substrate and applying photolithography light through the meniscus to enable photolithography processing of a surface of the substrate.

摘要翻译： 提供了一种用于处理衬底的方法，其包括在衬底的表面上产生弯月面并且通过弯月面施加光刻光以使得能够对衬底的表面进行光刻处理。