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    PROCESS INTEGRATION SCHEME TO LOWER OVERALL DIELECTRIC CONSTANT IN BEOL INTERCONNECT STRUCTURES
    1.
    发明申请
    PROCESS INTEGRATION SCHEME TO LOWER OVERALL DIELECTRIC CONSTANT IN BEOL INTERCONNECT STRUCTURES 审中-公开
    过程集成方案降低BEOL互连结构中的总体电介质常数

    公开(公告)号：US20090134520A1

    公开(公告)日：2009-05-28

    申请号：US12366235

    申请日：2009-02-05

    申请人： Nicolas Bright ,  David Hemker ,  Fritz C. Redeker ,  Yezdi Dordi

    发明人： Nicolas Bright ,  David Hemker ,  Fritz C. Redeker ,  Yezdi Dordi

    IPC分类号： H01L23/52

    CPC分类号： H01L21/76822 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Back-End of Line (BEoL) interconnect structures, and methods for their manufacture, are provided. The structures are characterized by narrower conductive lines and reduced overall dielectric constant values. Conformal diffusion barrier layers, and selectively formed capping layers, are used to isolate the conductive lines and vias from surrounding dielectric layers in the interconnect structures. The methods of the invention employ techniques to narrow the openings in photoresist masks in order to define narrower vias. More narrow vias increase the amount of misalignment that can be tolerated between the vias and the conductive lines.

    摘要翻译： 提供了后端（BEoL）互连结构及其制造方法。 这些结构的特征在于导线越窄，总体介电常数值越小。 保形扩散阻挡层和选择性形成的覆盖层用于将导线和通孔与互连结构中的周围电介质层隔离。 本发明的方法采用技术来缩小光致抗蚀剂掩模中的开口，以便限定更窄的通孔。 更窄的通孔增加了通孔和导电线之间可以容许的不对准量。

    Controlled ambient system for interface engineering
    6.
    发明申请
    Controlled ambient system for interface engineering 有权
    接口工程控制环境系统

    公开(公告)号：US20080057221A1

    公开(公告)日：2008-03-06

    申请号：US11639752

    申请日：2006-12-15

    申请人： John Boyd ,  Yezdi Dordi ,  Tiruchirapalli Arunagiri ,  Benjamin Mooring ,  John Parks ,  William Thie ,  Fritz Redeker ,  Arthur Howald ,  Alan Schoepp ,  David Hemker

    发明人： John Boyd ,  Yezdi Dordi ,  Tiruchirapalli Arunagiri ,  Benjamin Mooring ,  John Parks ,  William Thie ,  Fritz Redeker ,  Arthur Howald ,  Alan Schoepp ,  David Hemker

    IPC分类号： H05H1/24 ,  C23C16/00

    CPC分类号： H01L21/67225 ,  H01L21/288 ,  H01L21/6704 ,  H01L21/67167 ,  H01L21/67184 ,  H01L21/6723 ,  H01L21/76849

    摘要： A cluster architecture and methods for processing a substrate are disclosed. The cluster architecture includes a lab-ambient controlled transfer module that is coupled to one or more wet substrate processing modules. The lab-ambient controlled transfer module and the one or more wet substrate processing modules are configured to manage a first ambient environment. A vacuum transfer module that is coupled to the lab-ambient controlled transfer module and one or more plasma processing modules is also provided. The vacuum transfer module and the one or more plasma processing modules are configured to manage a second ambient environment. And, a controlled ambient transfer module that is coupled to the vacuum transfer module and one or more ambient processing modules is also included. The controlled ambient transfer module and the one or more ambient processing modules are configured to manage a third ambient environment. The cluster architecture therefore enables controlled processing of the substrate in either the first, second or third ambient environments, as well as during associated transitions.

    摘要翻译： 公开了用于处理衬底的簇结构和方法。 集群架构包括耦合到一个或多个湿式衬底处理模块的实验室环境受控传输模块。 实验室环境控制传递模块和一个或多个湿式衬底处理模块被配置为管理第一环境环境。 还提供耦合到实验室环境受控传输模块和一个或多个等离子体处理模块的真空传输模块。 真空转移模块和一个或多个等离子体处理模块被配置成管理第二周边环境。 并且，还包括耦合到真空传输模块和一个或多个环境处理模块的受控环境转移模块。 受控环境传输模块和一个或多个环境处理模块被配置为管理第三环境环境。 因此，集群架构使得能够在第一，第二或第三环境环境中以及在相关联的转换期间对衬底进行受控处理。

    Method and apparatus for slope to threshold conversion for process state monitoring and endpoint detection
    8.
    发明申请
    Method and apparatus for slope to threshold conversion for process state monitoring and endpoint detection 有权
    用于过程状态监测和端点检测的斜率到阈值转换的方法和装置

    公开(公告)号：US20050125202A1

    公开(公告)日：2005-06-09

    申请号：US11030374

    申请日：2005-01-05

    申请人： Yehiel Gotkis ,  Vladimir Katz ,  David Hemker ,  Rodney Kistler ,  Nicolas Bright

    发明人： Yehiel Gotkis ,  Vladimir Katz ,  David Hemker ,  Rodney Kistler ,  Nicolas Bright

    IPC分类号： G05B23/02 ,  H01L21/66 ,  H03F1/26 ,  G06F15/00 ,  H04B15/00

    CPC分类号： G05B23/0254 ,  H01L22/26

    摘要： A method for converting a slope based detection task to a threshold based detection task is provided. The method initiates with defining an approximation equation for a set of points corresponding to values of a process being monitored. Then, an expected value at a current point of the process being monitored is predicted. Next, a difference between a measured value at the current point of the process being monitored and the corresponding expected value is calculated. Then, the difference is monitored for successive points to detect a deviation value between the measured value and the expected value. Next, a transition point for the process being monitored is identified based on the detection of the deviation value. A processing system configured to provide real time data for a slope based transition and a computer readable media are also provided.

    摘要翻译： 提供了一种将基于斜率的检测任务转换为基于阈值的检测任务的方法。 该方法通过为对应于被监视的进程的值的一组点定义近似方程来启动。 然后，预测在被监视的处理的当前点的期望值。 接下来，计算被监视处理当前点的测量值与对应的期望值之间的差值。 然后，对连续点监测差异，以检测测量值和预期值之间的偏差值。 接下来，基于偏差值的检测来识别被监视处理的转变点。 还提供了一种处理系统，其被配置为提供用于基于斜率的转换的实时数据和计算机可读介质。

    Method and apparatus for wafer mechanical stress monitoring and wafer thermal stress monitoring
    10.
    发明申请
    Method and apparatus for wafer mechanical stress monitoring and wafer thermal stress monitoring 审中-公开
    用于晶片机械应力监测和晶片热应力监测的方法和装置

    公开(公告)号：US20050066739A1

    公开(公告)日：2005-03-31

    申请号：US10671978

    申请日：2003-09-26

    申请人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

    发明人： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

    IPC分类号： B24B37/04 ,  B24B49/14 ,  B24B49/16 ,  G01L1/00

    CPC分类号： B24B37/015 ,  B24B49/16

    摘要： A chemical mechanical planarization (CMP) system is provided. The CMP system includes a wafer carrier configured to support a wafer during a planarization process, the wafer carrier including a sensor configured to detect a signal indicating a stress being experienced by the wafer during planarization. A computing device in communication with the sensor is included. The computing device is configured to translate the signal to generate a stress map for analysis. A stress relief device responsive to a signal received from the computing device is included. The stress relief device is configured to relieve the stress being experienced by the wafer.

    摘要翻译： 提供化学机械平面化（CMP）系统。 CMP系统包括被配置为在平坦化处理期间支撑晶片的晶片载体，晶片载体包括被配置成在平坦化期间检测指示由晶片经历的应力的信号的传感器。 包括与传感器通信的计算设备。 计算设备被配置为平移信号以产生用于分析的应力图。 包括响应于从计算设备接收的信号的应力消除装置。 应力释放装置被构造成减轻晶片经历的应力。