PELLICLE STRESS RELIEF
    11.
    发明申请

    公开(公告)号:US20090029268A1

    公开(公告)日:2009-01-29

    申请号:US12029275

    申请日:2008-02-11

    CPC classification number: G03F1/64

    Abstract: The present disclosure provides a mask-pellicle system for lithography patterning. The mask-pellicle system includes a mask substrate; a predefined pattern formed on the transparent pattern; a pellicle configured approximate the transparent substrate; a pellicle frame designed to secure the pellicle; and a stress-absorbing feature configured between the pellicle frame and the mask substrate, to reduce stress of the mask substrate.

    Abstract translation: 本公开提供了一种用于光刻图案化的掩模防护薄膜系统。 掩模防护薄膜系统包括掩模基板; 形成在透明图案上的预定图案; 近似透明基板的防护薄膜组件; 设计用于固定防护薄膜的防护薄膜框架; 以及构造在防护薄膜框架和掩模基板之间的应力吸收特征,以减小掩模基板的应力。

    Method and System For a Pattern Layout Split
    12.
    发明申请
    Method and System For a Pattern Layout Split 有权
    图案布局拆分的方法和系统

    公开(公告)号:US20080189672A1

    公开(公告)日:2008-08-07

    申请号:US11671866

    申请日:2007-02-06

    CPC classification number: G06F17/5068 G03F1/36 G03F1/70 G03F7/70466

    Abstract: A method for splitting a pattern layout including providing the pattern layout having features, checking the pattern layout to determine the features that require splitting, coloring the features that require splitting with a first and second color, resolving coloring conflicts by decomposing the feature with the coloring conflict and coloring the decomposed feature with the first and second color, and generating a first mask with features of the first color and a second mask with features of the second color.

    Abstract translation: 一种用于分割图案布局的方法,包括提供具有特征的图案布局,检查图案布局以确定需要分割的特征,着色需要用第一和第二颜色分割的特征,通过用着色分解特征来解决着色冲突 冲突和着色具有第一和第二颜色的分解特征,以及生成具有第一颜色特征的第一掩模和具有第二颜色特征的第二掩模。

    System and method for processing masks with oblique features
    13.
    发明授权
    System and method for processing masks with oblique features 有权
    用倾斜特征处理掩模的系统和方法

    公开(公告)号:US07314689B2

    公开(公告)日:2008-01-01

    申请号:US10765531

    申请日:2004-01-27

    Abstract: A method and system is disclosed for processing one or more oblique features on a mask or reticle substrate. After aligning the mask or reticle substrate with a predetermined reference system, an offset angle of a feature to be processed on the mask or reticle substrate with regard to either the horizontal or vertical reference direction of the predetermined reference system is determined. The mask or reticle substrate is rotated in a predetermined direction by the offset angle; and the feature on the mask or reticle substrate is processed using the predetermined reference system wherein the feature is processed in either the horizontal or vertical reference direction thereof.

    Abstract translation: 公开了一种用于处理掩模或掩模版基板上的一个或多个倾斜特征的方法和系统。 在掩模或掩模版基板与预定的参考系统对准之后,确定相对于预定参考系的水平或垂直参考方向在掩模或掩模版基板上要处理的特征的偏移角。 掩模或掩模版基板沿预定方向旋转偏移角; 并且使用预定的参考系统处理掩模或掩模版基板上的特征,其中特征在水平或垂直参考方向上被处理。

    Wafer repair method using direct-writing
    14.
    发明授权
    Wafer repair method using direct-writing 有权
    晶圆修复方法采用直写

    公开(公告)号:US07307001B2

    公开(公告)日:2007-12-11

    申请号:US11029992

    申请日:2005-01-05

    Abstract: A method of wafer repairing comprises identifying locations and patterns of defective regions in a semiconductor wafer; communicating the locations and patterns of defective regions to a direct-writing tool; forming a photoresist layer on the semiconductor wafer; locally exposing the photoresist layer within the defective regions using an energy beam; developing the photoresist layer on the semiconductor wafer; and wafer-processing the semiconductor wafer under the photoresist layer after exposing and developing.

    Abstract translation: 晶片修复的方法包括识别半导体晶片中的缺陷区域的位置和图案; 将缺陷区域的位置和图案传送到直写工具; 在半导体晶片上形成光致抗蚀剂层; 使用能量束将缺陷区域内的光致抗蚀剂层局部曝光; 在半导体晶片上显影光致抗蚀剂层; 并在曝光和显影之后将光致抗蚀剂层下方的半导体晶片进行晶片处理。

    Layout generation and optimization to improve photolithographic performance
    15.
    发明授权
    Layout generation and optimization to improve photolithographic performance 有权
    布局生成和优化,以提高光刻性能

    公开(公告)号:US07266803B2

    公开(公告)日:2007-09-04

    申请号:US11193133

    申请日:2005-07-29

    CPC classification number: G03F1/36

    Abstract: Disclosed are a system and method for designing a mask layout. In one example, the method includes representing the mask layout using a plurality of pixels, each having a mask transmittance coefficient. A control parameter is initialized and a representative of the mask layout is generated. The method determines acceptance of the representative of the mask layout by a cost function and a Boltzmann factor, where the cost function is related to the mask layout and a target substrate pattern, and the Boltzmann factor is related to the cost function and the control parameter. The methods repeats the steps of generating the representative and determining acceptance until the mask layout is stabilized. The control parameter is decreased according to an annealing schedule. The generating, determining, repeating, and decreasing steps are reiterated until the mask layout is optimized.

    Abstract translation: 公开了一种用于设计掩模布局的系统和方法。 在一个示例中,该方法包括使用具有掩模透射系数的多个像素来表示掩模布局。 初始化控制参数,并生成掩码布局的代​​表。 该方法通过成本函数和玻尔兹曼因子确定掩模布局的代表的接受度,其中成本函数与掩模布局和目标衬底图案相关,并且玻尔兹曼因子与成本函数和控制参数相关 。 该方法重复产生代表的步骤并确定接受直到掩模布局稳定。 控制参数根据退火时间表减少。 重复生成,确定,重复和减少步骤,直到屏蔽布局被优化为止。

    Multiple-patterning overlay decoupling method
    17.
    发明授权
    Multiple-patterning overlay decoupling method 有权
    多图案叠加去耦方法

    公开(公告)号:US09134627B2

    公开(公告)日:2015-09-15

    申请号:US13328264

    申请日:2011-12-16

    Abstract: A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure.

    Abstract translation: 公开了一种制造半导体器件的方法。 一种示例性方法包括通过第一曝光在第一层中形成第一结构并确定第一结构的放置信息。 该方法还包括通过第二曝光在覆盖第一层的第二层中形成第二结构,并确定第二结构的放置信息。 该方法还包括在第三层中形成第三结构,该第三结构包括通过第三次曝光覆盖第二层的第三层中的第一和第二子结构。 形成第三结构包括将第一子结构独立地对准第一结构并且将第二子结构独立地对准到第二结构。

    Photoresist materials and photolithography processes
    18.
    发明授权
    Photoresist materials and photolithography processes 有权
    光刻胶材料和光刻工艺

    公开(公告)号:US08848163B2

    公开(公告)日:2014-09-30

    申请号:US13050251

    申请日:2011-03-17

    Abstract: A lithography apparatus generates a tunable magnetic field to facilitate processing of photoresist. The lithography apparatus includes a chamber and a substrate stage in the chamber operable to hold a substrate. A magnetic module provides a magnetic field to the substrate on the substrate stage. The magnetic module is configured to provide the magnetic field in a tunable and alternating configuration with respect to its magnitude and frequency. The magnetic field is provided to have a gradient in magnitude along a Z-axis that is perpendicular to the substrate stage to cause magnetically-charged particles disposed over the substrate stage to move up and down along the Z-axis. The lithography apparatus also includes a radiation energy source and an objective lens configured to receive radiation energy from the radiation energy source and direct the radiation energy toward the substrate positioned on the substrate stage.

    Abstract translation: 光刻设备产生可调磁场以便于光致抗蚀剂的加工。 光刻设备包括腔室和腔室中的衬底台,其可操作以保持衬底。 磁性模块为衬底台上的衬底提供磁场。 磁模块被配置为相对于其幅度和频率提供可调和交替配置的磁场。 磁场被提供为具有沿垂直于衬底台的Z轴的幅度梯度,以使得设置在衬底台上的带磁性颗粒沿Z轴上下移动。 光刻设备还包括辐射能量源和物镜,其被配置为从辐射能量源接收辐射能量并将辐射能量引向位于衬底台上的衬底。

    Immersion lithography system using direction-controlling fluid inlets
    19.
    发明授权
    Immersion lithography system using direction-controlling fluid inlets 有权
    浸入光刻系统采用方向控制流体入口

    公开(公告)号:US08767178B2

    公开(公告)日:2014-07-01

    申请号:US13482879

    申请日:2012-05-29

    CPC classification number: G03B27/52 G03F7/70341

    Abstract: Immersion lithography system and method using direction-controlling fluid inlets are described. According to one embodiment of the present disclosure, an immersion lithography apparatus includes a lens assembly having an imaging lens disposed therein and a wafer stage configured to retain a wafer beneath the lens assembly. The apparatus also includes a plurality of direction-controlling fluid inlets disposed adjacent to the lens assembly, each direction-controlling fluid inlet in the plurality of direction-controlling fluid inlets being configured to direct a flow of fluid beneath the lens assembly and being independently controllable with respect to the other fluid inlets in the plurality of direction-controlling fluid inlets.

    Abstract translation: 描述了使用方向控制流体入口的浸渍光刻系统和方法。 根据本公开的一个实施例,浸没式光刻设备包括具有设置在其中的成像透镜的透镜组件和被配置为将晶片保持在透镜组件下方的晶片台。 该装置还包括多个方向控制流体入口,其邻近透镜组件设置,多个方向控制流体入口中的每个方向控制流体入口构造成将透镜流体下方的流体引导到透镜组件的下方并且可独立控制 相对于多个方向控制流体入口中的其它流体入口。

    EFFICIENT SCAN FOR E-BEAM LITHOGRAPHY
    20.
    发明申请
    EFFICIENT SCAN FOR E-BEAM LITHOGRAPHY 有权
    E-BEAM LITHOGRAPHY的高效扫描

    公开(公告)号:US20130320243A1

    公开(公告)日:2013-12-05

    申请号:US13484524

    申请日:2012-05-31

    CPC classification number: H01J37/3174 B82Y10/00 B82Y40/00 H01J2237/31761

    Abstract: The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.

    Abstract translation: 本公开提供了一种通过电子束光刻系统增加晶片通过量的方法。 该方法包括使用电子束写入器的最大扫描狭缝宽度(MSSW)扫描晶片。 通过限制集成电路(IC)场尺寸以允许MSSW覆盖整个场,MSSW被应用于减小晶片的扫描通道,从而增加吞吐量。 当用MSSW扫描晶片时,下一个扫描通道数据可以重新排列并加载到存储器缓冲器中。 因此,一旦一个扫描通道完成,读取存储器缓冲器中的下一个扫描通道数据进行扫描。

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