System and method for combined intraoverlay metrology and defect inspection
    1.
    发明授权
    System and method for combined intraoverlay metrology and defect inspection 有权
    组合内部测量和缺陷检查的系统和方法

    公开(公告)号:US08656318B2

    公开(公告)日:2014-02-18

    申请号:US13464116

    申请日:2012-05-04

    IPC分类号: G06F17/50

    CPC分类号: G03F1/84 G03F1/72

    摘要: A method and system for measuring layer overlay and for inspecting a mask for defects unrelated to overlay utilizing a singe comprehensive tool is disclosed. An exemplary method includes receiving a mask design database that corresponds to a mask and has a die area with a mask database feature. A mask image of the mask is received, and a comprehensive inspection system compares the mask image to the mask design database in order to detect mask defects that are not related to layer alignment. The system produces mask defect information corresponding to the mask defects. The comprehensive inspection system also compares the mask image to the mask design database to determine a database-to-mask offset. From the database-to-mask offset, a mask overlay characteristic is determined.

    摘要翻译: 公开了一种用于测量层叠覆盖层的方法和系统,并且用于使用单个综合工具来检查与覆盖无关的缺陷的掩模。 一种示例性方法包括接收对应于掩模并且具有掩模数据库特征的管芯区域的掩模设计数据库。 接收掩模的掩模图像,并且综合检查系统将掩模图像与掩模设计数据库进行比较,以便检测与层对齐无关的掩模缺陷。 系统产生对应于掩模缺陷的掩模缺陷信息。 综合检查系统还将掩模图像与掩模设计数据库进行比较,以确定数据库对掩模偏移量。 从数据库到掩码偏移,确定掩模覆盖特性。

    Photomask and photomask substrate with reduced light scattering properties
    2.
    发明授权
    Photomask and photomask substrate with reduced light scattering properties 有权
    光掩模和光掩模底物,具有降低的光散射性能

    公开(公告)号:US08624345B2

    公开(公告)日:2014-01-07

    申请号:US13486995

    申请日:2012-06-01

    摘要: A mask substrate, photomask and method for forming the same are provided. The photomask includes a substantially light transparent substrate and a circuitry pattern disposed over the light transparent substrate. The circuitry pattern includes a phase shifting layer disposed over the substantially light transparent substrate. A substantially light shielding layer is disposed over the phase shifting layer. At least one barrier layer is disposed over the substantially light shielding layer. An uppermost portion of the substantially light shielding layer does not comprise anti-reflective properties and the at least one barrier layer comprises an uppermost hardmask layer and an underlying anti-reflective layer.

    摘要翻译: 提供了掩模基板,光掩模及其形成方法。 光掩模包括基本上透明的基板和设置在光透明基板上的电路图案。 电路图案包括设置在基本上光透明基底上的相移层。 基本上遮光层设置在相移层上。 至少一个阻挡层设置在基本上遮光层上。 基本上遮光层的最上部分不包括抗反射性质,并且至少一个阻挡层包括最上面的硬掩模层和下面的抗反射层。

    METHOD OF MAKING A LITHOGRAPHY MASK
    3.
    发明申请
    METHOD OF MAKING A LITHOGRAPHY MASK 审中-公开
    制作光刻面膜的方法

    公开(公告)号:US20130260289A1

    公开(公告)日:2013-10-03

    申请号:US13437565

    申请日:2012-04-02

    IPC分类号: G03F1/78 B82Y40/00

    摘要: A method of fabricating a lithography mask with carbon-based-charging-dissipation (CBCD) layer is disclosed. The method includes providing a substrate, depositing an opaque layer on the substrate, coating a photoresist and depositing a charging dissipation layer on the photoresist. The photoresist is patterned by an electron-beam writing. The CBCD layer is removed during developing the photoresist.

    摘要翻译: 公开了一种制造具有碳基带电耗散(CBCD)层的光刻掩模的方法。 该方法包括提供衬底,在衬底上沉积不透明层,涂覆光致抗蚀剂并在光致抗蚀剂上沉积充电耗散层。 光刻胶通过电子束写入进行图案化。 在显影光致抗蚀剂期间去除CBCD层。

    OPTICAL PROXIMITY CORRECTION CONVERGENCE CONTROL
    4.
    发明申请
    OPTICAL PROXIMITY CORRECTION CONVERGENCE CONTROL 有权
    光临近度校正综合控制

    公开(公告)号:US20130205265A1

    公开(公告)日:2013-08-08

    申请号:US13368919

    申请日:2012-02-08

    IPC分类号: G06F17/50

    CPC分类号: G03F7/70441 G03F7/70125

    摘要: A method of optical proximity correction (OPC) convergence control that includes providing a lithography system having a photomask and an illuminator. The method further includes performing an exposure by the illuminator on the photomask. Also, the method includes optimizing an optical illuminator setting for the lithography system with a defined gate pitch in a first direction in a first template. Additionally, the method includes determining OPC correctors to converge the OPC results with a target edge placement error (EPE) to produce a first OPC setting for the first template. The first OPC setting targets a relatively small EPE and mask error enhancement factor (MEEF)of the defined gate pitch in the first template. In addition, the method includes checking the first OPC setting for a relatively small EPE, MEEF and DOM consistency with the first template of the defined gate pitch in a second, adjacent template.

    摘要翻译: 一种光学邻近校正(OPC)会聚控制的方法,包括提供具有光掩模和照明器的光刻系统。 该方法还包括执行照明器在光掩模上的曝光。 此外,该方法包括在第一模板中以第一方向限定的门间距优化光刻系统的光照射器设置。 此外,该方法包括确定OPC校正器以使目标边缘放置误差(EPE)收敛OPC结果,以产生第一模板的第一OPC设置。 第一个OPC设置针对第一个模板中定义的门间距的相对较小的EPE和掩模误差增强因子(MEEF)。 此外,该方法包括在第二相邻模板中检查与相对小的EPE,MEEF和DOM一致性的第一OPC设置与限定的门间距的第一模板。

    Method for forming a robust mask with reduced light scattering
    5.
    发明授权
    Method for forming a robust mask with reduced light scattering 有权
    用于形成具有减少的光散射的鲁棒掩模的方法

    公开(公告)号:US08198118B2

    公开(公告)日:2012-06-12

    申请号:US11590257

    申请日:2006-10-31

    摘要: A mask and method for forming the same including carrying out a photolithographic patterning process the method including providing a substantially light transparent portion; forming a substantially light shielding layer disposed over the substantially light transparent portion; forming at least one barrier layer disposed over the substantially light shielding layer; forming a resist layer disposed over the at least one barrier layer; patterning the resist layer for producing a circuitry pattern; and, carrying out an etching process according to the circuitry pattern to expose a portion of the substantially light transparent portion to form a mask.

    摘要翻译: 一种掩模及其形成方法,包括进行光刻图案处理,该方法包括提供基本上透明的部分; 形成设置在所述基本上透明部分上的基本上遮光层; 形成设置在所述基本上遮光层上的至少一个势垒层; 形成设置在所述至少一个阻挡层上的抗蚀剂层; 图案化抗蚀剂层以产生电路图案; 并且根据电路图案进行蚀刻处理以暴露基本上光透明部分的一部分以形成掩模。

    PELLICLE STRESS RELIEF
    6.
    发明申请

    公开(公告)号:US20090029268A1

    公开(公告)日:2009-01-29

    申请号:US12029275

    申请日:2008-02-11

    IPC分类号: G03F9/00

    CPC分类号: G03F1/64

    摘要: The present disclosure provides a mask-pellicle system for lithography patterning. The mask-pellicle system includes a mask substrate; a predefined pattern formed on the transparent pattern; a pellicle configured approximate the transparent substrate; a pellicle frame designed to secure the pellicle; and a stress-absorbing feature configured between the pellicle frame and the mask substrate, to reduce stress of the mask substrate.

    摘要翻译: 本公开提供了一种用于光刻图案化的掩模防护薄膜系统。 掩模防护薄膜系统包括掩模基板; 形成在透明图案上的预定图案; 近似透明基板的防护薄膜组件; 设计用于固定防护薄膜的防护薄膜框架; 以及构造在防护薄膜框架和掩模基板之间的应力吸收特征,以减小掩模基板的应力。

    System and method for manufacturing a mask for semiconductor processing
    7.
    发明申请
    System and method for manufacturing a mask for semiconductor processing 有权
    用于制造半导体处理用掩模的系统和方法

    公开(公告)号:US20060246357A1

    公开(公告)日:2006-11-02

    申请号:US11115433

    申请日:2005-04-27

    IPC分类号: G03C5/00 G03F1/00

    CPC分类号: G03F7/38

    摘要: The present disclosure provides a system and method for manufacturing a mask for semiconductor processing. In one example, the system includes at least one exposure unit configured to select a recipe for a later baking process in a post treatment unit, a buffer unit coupled to the exposure unit and configured to move the mask substrate from the exposure unit to the post treatment unit without exposing the mask substrate to the environment; and the post treatment unit coupled to the buffer unit and the exposure unit and configured to perform a baking process on the mask substrate using baking parameters associated with the recipe selected by the exposure unit.

    摘要翻译: 本公开提供了一种用于制造用于半导体处理的掩模的系统和方法。 在一个示例中,系统包括至少一个曝光单元,其被配置为在后处理单元中选择用于稍后烘焙处理的配方,缓冲单元,其耦合到曝光单元并且被配置为将掩模基板从曝光单元移动到柱 处理单元,而不将掩模基板暴露于环境中; 以及所述后处理单元,其耦合到所述缓冲单元和所述曝光单元,并且被配置为使用与由所述曝光单元选择的所述配方相关联的烘焙参数对所述掩模基板进行烘烤处理。

    System and Method for Combined Intraoverlay and Defect Inspection
    9.
    发明申请
    System and Method for Combined Intraoverlay and Defect Inspection 有权
    组合内部和缺陷检查的系统和方法

    公开(公告)号:US20130298088A1

    公开(公告)日:2013-11-07

    申请号:US13464116

    申请日:2012-05-04

    IPC分类号: G06F17/50

    CPC分类号: G03F1/84 G03F1/72

    摘要: A method and system for measuring layer overlay and for inspecting a mask for defects unrelated to overlay utilizing a singe comprehensive tool is disclosed. An exemplary method includes receiving a mask design database that corresponds to a mask and has a die area with a mask database feature. A mask image of the mask is received, and a comprehensive inspection system compares the mask image to the mask design database in order to detect mask defects that are not related to layer alignment. The system produces mask defect information corresponding to the mask defects. The comprehensive inspection system also compares the mask image to the mask design database to determine a database-to-mask offset. From the database-to-mask offset, a mask overlay characteristic is determined.

    摘要翻译: 公开了一种用于测量层叠覆盖层的方法和系统,并且用于使用单个综合工具来检查与覆盖无关的缺陷的掩模。 一种示例性方法包括接收对应于掩模并且具有掩模数据库特征的管芯区域的掩模设计数据库。 接收掩模的掩模图像,并且综合检查系统将掩模图像与掩模设计数据库进行比较,以便检测与层对齐无关的掩模缺陷。 系统产生对应于掩模缺陷的掩模缺陷信息。 综合检查系统还将掩模图像与掩模设计数据库进行比较,以确定数据库对掩模偏移量。 从数据库到掩码偏移,确定掩模覆盖特性。

    REFLECTIVE MASK AND METHOD OF MAKING SAME
    10.
    发明申请
    REFLECTIVE MASK AND METHOD OF MAKING SAME 有权
    反射掩模及其制作方法

    公开(公告)号:US20130280643A1

    公开(公告)日:2013-10-24

    申请号:US13451705

    申请日:2012-04-20

    IPC分类号: G03F1/24

    CPC分类号: G03F1/24 G03F1/48 H01L21/0337

    摘要: A reflective mask is described. The mask includes a low thermal expansion material (LTEM) substrate, a conductive layer deposited on a first surface of the LTEM substrate, a stack of reflective multilayers (ML) deposited on a second surface of the LTEM substrate, a capping layer deposited on the stack of reflective ML, a first absorption layer deposited on the first capping layer, a main pattern, and a border ditch. The border ditch reaches to the capping layer, the second absorption layer deposited inside the border ditch, and the second absorption layer contacts the capping layer.

    摘要翻译: 描述了一种反光罩。 掩模包括低热膨胀材料(LTEM)衬底,沉积在LTEM衬底的第一表面上的导电层,沉积在LTEM衬底的第二表面上的反射多层堆叠(ML),沉积在 堆叠的反射ML,沉积在第一盖层上的第一吸收层,主图案和边界沟。 边界沟到达覆盖层,第二吸收层沉积在边界沟内,第二吸收层接触封盖层。