公开(公告)号：US07008881B2

公开(公告)日：2006-03-07

申请号：US10480789

申请日：2003-04-09

申请人： Akitake Tamura ,  Satoshi Oka

发明人： Akitake Tamura ,  Satoshi Oka

IPC分类号： H01L21/469

CPC分类号： C30B29/06 ,  C30B25/02

摘要： A silicon epitaxial layer is formed on the semiconductor underlayer of a target substrate (W) in the process chamber (2). This forming method includes a pressure reducing step of reducing the pressure inside the process chamber (2) accommodating the target substrate (W), a vapor phase growth step of introducing a film formation gas containing silane gas into the process chamber (2) to grow a silicon epitaxial layer on the semiconductor underlayer, and a hydrogen chloride treatment step and a hydrogen heat treatment step performed therebetween. The hydrogen chloride treatment step is arranged to introduce the first pre-treatment gas containing hydrogen chloride gas into the process chamber (2), thereby treating the atmosphere inside the process chamber (2). The hydrogen heat treatment step is arranged to introduce the second pre-treatment gas containing hydrogen gas into the process chamber (2), thereby treating the surface of the semiconductor underlayer.

摘要翻译： 在处理室（2）中的目标衬底（W）的半导体底层上形成硅外延层。 该成形方法包括：减压装置，用于减少容纳目标基板（W）的处理室（2）内部的压力的压力降低步骤;将含有硅烷气体的成膜气体引入处理室（2）的气相生长步骤 在半导体底层上形成硅外延层，在其间进行氯化氢处理工序和氢热处理工序。 排出氯化氢处理步骤，将含有氯化氢气体的第一预处理气体引入处理室（2），从而处理处理室（2）内的气氛。 氢处理工序用于将含有氢气的第二预处理气体引入处理室（2），对半导体底层的表面进行处理。

公开(公告)号：US06531416B1

公开(公告)日：2003-03-11

申请号：US09178179

申请日：1998-10-23

申请人： Norihiro Kobayashi ,  Toshihiko Miyano ,  Satoshi Oka

发明人： Norihiro Kobayashi ,  Toshihiko Miyano ,  Satoshi Oka

IPC分类号： H01L21324

CPC分类号： H01L21/3225 ,  Y10S438/974

摘要： A method for heat treatment of a silicon wafer in a reducing atmosphere through use of a rapid thermal annealer (RTA) is provided. In the method, the silicon wafer is heat-treated at a temperature of 1150° C. to 1300° C. for 1 sec to 60 sec in a mixture gas atmosphere of hydrogen and argon. Hydrogen is present in the mixture gas atmosphere in an amount of 10% to 80% by volume. Hydrogen is preferably present in the mixture gas atmosphere in an amount of 20% to 40% by volume. The method decreases COP density on the surface of the silicon wafer to thereby improve electrical characteristics, such as TZDB and TDDB, of the silicon wafer, suppresses the generation of slip dislocation to thereby prevent wafer breakage, and utilizes intrinsic advantages of the RTA, such as improvement in productivity and reduction in hydrogen gas usage.

摘要翻译： 提供了一种通过使用快速热退火炉（RTA）在还原气氛中对硅晶片进行热处理的方法。 在该方法中，在氢气和氩气的混合气体气氛中，将硅晶片在1150℃至1300℃的温度下热处理1秒至60秒。 氢气以10〜80体积％的量存在于混合气体气氛中。 氢气优选以混合气体气氛中的20〜40体积％的量存在。 该方法降低硅晶片表面的COP密度，从而提高硅晶片的TZDB，TDDB等电特性，抑制滑移位错的产生，防止晶片断裂，并利用RTA的固有优点， 作为生产率的提高和氢气使用量的减少。

公开(公告)号：USD318278S

公开(公告)日：1991-07-16

申请号：US390678

申请日：1989-08-07

申请人： Satoshi Oka

设计人： Satoshi Oka

公开(公告)号：US3930924A

公开(公告)日：1976-01-06

申请号：US337716

申请日：1973-02-28

申请人： Satoshi Oka ,  Tawara Junro ,  Akira Ohmameuda ,  Kazumasa Uda

发明人： Satoshi Oka ,  Tawara Junro ,  Akira Ohmameuda ,  Kazumasa Uda

IPC分类号： B42D15/10 ,  B44F1/12 ,  G06K19/08 ,  G07F7/08 ,  B32B31/18 ,  B32B31/20 ,  B44C1/22

CPC分类号： B42D25/425 ,  B42D25/00 ,  B42D25/405 ,  B42D25/43 ,  G06K19/083 ,  G07F7/086 ,  B42D2033/04 ,  B42D2033/08 ,  B42D2033/10 ,  B42D2033/20 ,  B42D2033/28 ,  B42D2033/30 ,  B42D2035/02 ,  B42D2035/06 ,  B42D2035/08 ,  B42D2035/14 ,  B42D2035/16 ,  B42D2035/24 ,  B42D2035/30 ,  B42D25/324 ,  B42D25/45 ,  B42D25/455 ,  B42D25/46 ,  Y10S283/904 ,  Y10T156/1082 ,  Y10T156/109

摘要： A method of making an identification card which comprises making any required characters, designs and/or embossings on the base material of the card, further providing a colored layer on the bass material of the card and then engraving the colored layer and base to varying depths in the form of fine lines and and points so that, by regulating the ratio of the surface areas of the engraved part and unengraved part, the differences in the color thickness and luster may be expressed to form an engraved image by which the user can be identified and which image has no projections thereon.

摘要翻译： 一种识别卡，其中在卡的基材上制作任何所需的字符，设计和/或压花以及可以识别使用者并且其上没有突起的雕刻图像在设置在其上的着色层的部分中 卡片的基材。

公开(公告)号：US08728912B2

公开(公告)日：2014-05-20

申请号：US13990883

申请日：2011-11-18

申请人： Hiroji Aga ,  Isao Yokokawa ,  Satoshi Oka

发明人： Hiroji Aga ,  Isao Yokokawa ,  Satoshi Oka

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/31111 ,  H01L21/76254

摘要： The present invention is directed to a method for manufacturing an SOI wafer, the method by which treatment that removes the outer periphery of a buried oxide film to obtain a structure in which a peripheral end of an SOI layer of an SOI wafer is located outside a peripheral end of the buried oxide film, and, after heat treatment is performed on the SOI wafer in a reducing atmosphere containing hydrogen or an atmosphere containing hydrogen chloride gas, an epitaxial layer is formed on a surface of the SOI layer. As a result, there is provided a method that can manufacture an SOI wafer having a desired SOI layer thickness by performing epitaxial growth without allowing a valley-shaped step to be generated in an SOI wafer with no silicon oxide film in a terrace portion, the SOI wafer fabricated by an ion implantation delamination method.

摘要翻译： 本发明涉及一种SOI晶片的制造方法，其中，除去掩埋氧化膜的外周，得到SOI晶片的SOI层的外周位于外侧的结构的方法 并且在包含氢或含有氯化氢气体的气氛的还原气氛中对SOI晶片进行热处理后，在SOI层的表面上形成外延层。 结果，提供了一种方法，其可以通过进行外延生长来制造具有期望的SOI层厚度的SOI晶片，而不会在在台面部分中没有氧化硅膜的SOI晶片中产生谷状步骤， 通过离子注入分层方法制造的SOI晶片。

公开(公告)号：US20120244679A1

公开(公告)日：2012-09-27

申请号：US13514414

申请日：2010-11-18

申请人： Satoshi Oka ,  Hiroji Aga ,  Masahiro Kato ,  Nobuhiko Noto

发明人： Satoshi Oka ,  Hiroji Aga ,  Masahiro Kato ,  Nobuhiko Noto

IPC分类号： H01L21/20

CPC分类号： H01L21/3247 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/76254

摘要： The present invention is directed to a method for producing a bonded wafer, the method in which heat treatment for flattening the surface of a thin film is performed on a bonded wafer made by the ion implantation delamination method in an atmosphere containing hydrogen or hydrogen chloride, wherein the surface of a susceptor on which the bonded wafer is to be placed, the susceptor used at the time of flattening heat treatment, is coated with a silicon film in advance. As a result, a method for producing a bonded wafer is provided, the method by which a bonded wafer having a thin film with good film thickness uniformity can be obtained even when heat treatment for flattening the surface of a thin film of a bonded wafer after delamination is performed in the ion implantation delamination method.

摘要翻译： 本发明涉及一种接合晶片的制造方法，其特征在于，在含有氢或氯化氢的气氛中，对由离子注入脱层法制成的接合晶片进行使薄膜表面平坦化的热处理， 其中预先在其上放置接合晶片的基座的表面，在平坦化热处理时使用的基座被涂覆有硅膜。 结果，提供了一种接合晶片的制造方法，即使在将粘合晶片的薄膜的表面平坦化的热处理后，也可以获得具有良好的膜厚均匀性的薄膜的接合晶片的方法 在离子注入分层方法中进行分层。

公开(公告)号：US08076223B2

公开(公告)日：2011-12-13

申请号：US12309527

申请日：2007-07-04

申请人： Satoshi Oka ,  Nobuhiko Noto

发明人： Satoshi Oka ,  Nobuhiko Noto

IPC分类号： H01L21/20 ,  H01L21/205

CPC分类号： H01L21/0251 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/02661

摘要： The present invention is a method for producing a semiconductor substrate, including steps of forming a SiGe gradient composition layer and a SiGe constant composition layer on a Si single crystal substrate, flattening a surface of the SiGe constant composition layer, removing a natural oxide film on the flattened surface of the SiGe constant composition layer, and forming a strained Si layer on the surface of the SiGe constant composition layer from which the natural oxide film has been removed, wherein the formation of the SiGe gradient composition layer and the formation of the SiGe constant composition layer are performed at a temperature T1 that is higher than 800° C., the removal of the natural oxide film from the surface of the SiGe constant composition layer is performed in a reducing atmosphere through a heat treatment at a temperature T2 that is equal to or higher than 800° C. and lower than the temperature T1, and the formation of the strained Si layer is performed at a temperature T3 that is lower than the temperature T1. This method enables epitaxial growth of the strained Si layer on the flattened SiGe layer without degrading surface flatness of the SiGe layer.

摘要翻译： 本发明是一种半导体衬底的制造方法，包括以下步骤：在Si单晶衬底上形成SiGe梯度组合物层和SiGe恒定组成层，使SiGe恒定组合物层的表面平坦化，除去天然氧化膜 SiGe恒定组成层的平坦化表面，并且在去除了天然氧化物膜的SiGe恒定组合物层的表面上形成应变Si层，其中形成SiGe梯度组合物层并形成SiGe 恒定组成层在高于800℃的温度T1下进行，通过在温度T2即热处理下在还原气氛中从SiGe恒定组成层的表面除去天然氧化膜 等于或高于800℃并低于温度T1，并且应变Si层的形成在te 温度T3低于温度T1。 该方法能够使平坦化的SiGe层上的应变Si层外延生长，而不降低SiGe层的表面平坦度。

公开(公告)号：US20110117727A1

公开(公告)日：2011-05-19

申请号：US13055829

申请日：2009-07-29

申请人： Satoshi Oka ,  Susumu Kuwabara

发明人： Satoshi Oka ,  Susumu Kuwabara

IPC分类号： H01L21/762

CPC分类号： H01L21/76254 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262

摘要： According to the present invention, there is provided a method for manufacturing an SOI wafer, the method configured to grow an epitaxial layer on an SOI layer of the SOI wafer having the SOI layer on a BOX layer to increase a thickness of the SOI layer, wherein epitaxial growth is carried out by using an SOI wafer whose infrared reflectance in an infrared wavelength range of 800 to 1300 nm falls within the range of 20% to 40% as the SOI wafer on which the epitaxial layer is grown. As a result, a high-quality SOI wafer with less slip dislocation and others can be provided with excellent productivity at a low cost as the SOI wafer including the SOI layer having a thickness increased by growing the epitaxial layer, and a manufacturing method thereof can be also provide.

摘要翻译： 根据本发明，提供一种制造SOI晶片的方法，该方法被配置为在BOX层上具有SOI层的SOI晶片的SOI层上生长外延层，以增加SOI层的厚度， 其中通过使用在800nm至1300nm的红外波长范围内的红外反射率在其外延层生长的SOI晶片的20％至40％的范围内的SOI晶片来进行外延生长。 结果，具有较小滑移位错的高品质SOI晶片等可以以低成本提供优异的生产率，因为包括通过生长外延层而增加厚度的SOI层的SOI晶片及其制造方法可以 也提供。

公开(公告)号：US20100003803A1

公开(公告)日：2010-01-07

申请号：US12312789

申请日：2007-11-29

申请人： Satoshi Oka ,  Nobuhiko Noto

发明人： Satoshi Oka ,  Nobuhiko Noto

IPC分类号： H01L21/762 ,  H01L21/20

CPC分类号： H01L21/02532 ,  C30B25/183 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/0262 ,  H01L21/02661

摘要： According to the present invention, there is provided a manufacturing method of a strained Si substrate including at least steps of: forming a lattice-relaxed SiGe layer on a silicon single crystal substrate; flattening a surface of the SiGe layer by CMP; and forming a strained Si layer on the surface of the flattened SiGe layer, wherein the method comprises steps of: subjecting the surface of the SiGe layer to SC1 cleaning, before forming the strained Si layer on the lattice-relaxed SiGe layer surface that is flattened; heat-treating the substrate having the SiGe layer after being subjected to SC1 cleaning in a hydrogen-containing atmosphere at 800° C. or higher; immediately forming a protective Si layer on the SiGe layer surface on the heat-treated substrate, without lowering the temperature below 800° C. after the heat treatment; and forming the strained Si layer on the surface of the protective Si layer at a temperature lower than the temperature of forming the protective Si layer. Thereby, a manufacturing method of a strained Si substrate having low surface roughness, threading dislocation density and low particle level can be provided.

摘要翻译： 根据本发明，提供一种应变Si衬底的制造方法，至少包括以下步骤：在硅单晶衬底上形成晶格弛豫的SiGe层; 通过CMP使SiGe层的表面平坦化; 并且在平坦化的SiGe层的表面上形成应变Si层，其中所述方法包括以下步骤：在平坦化的晶格弛豫的SiGe层表面上形成应变Si层之前，对SiGe层的表面进行SC1清洁 ; 在800℃以上的含氢气氛中进行SC1清洗后，对具有SiGe层的基板进行热处理; 在热处理基板上的SiGe层表面上立即形成保护性Si层，在热处理后不降低800℃以下的温度; 以及在比形成保护Si层的温度低的温度下在保护Si层的表面上形成应变Si层。 因此，可以提供具有低表面粗糙度，穿透位错密度和低颗粒水平的应变Si衬底的制造方法。

公开(公告)号：US5763838A

公开(公告)日：1998-06-09

申请号：US737412

申请日：1996-11-23

申请人： Toshiaki Morimura ,  Yoshitaka Noguchi ,  Satoshi Oka

发明人： Toshiaki Morimura ,  Yoshitaka Noguchi ,  Satoshi Oka

IPC分类号： C30B15/28 ,  G01G19/00 ,  G01N5/00 ,  H01L21/66 ,  C30B23/00

CPC分类号： G01G19/00 ,  C30B15/28 ,  Y10S367/908

摘要： The disclosed apparatus weighs a grown crystal that is being pulled from melt thereof. The lower end of a rope of known weight is connected to the crystal, while the upper end of the rope is connected to the drum of a rope-winding unit. The rope-winding unit includes a driver coupled to the drum so as to rotate the drum and wind the rope thereon, and the weight of the rope-winding unit including the drum and driver is known. At least one weight sensor is coupled to the rope-winding unit so as to measure the magnitude of gravity acting on the rope-winding unit. Whereby, the weight of the grown crystal is determined by subtracting the sum of the known weights of the rope and the rope-winding unit from the measured magnitude of the gravity acting on the rope-winding unit.

摘要翻译： PCT No.PCT / JP96 / 00632 Sec。 371日期：1996年10月23日 102（e）1996年10月23日PCT 1996年3月14日PCT公布。 出版物WO96 / 30729 PCT 日期1996年10月3日公开的装置称重从其熔融物中拉出的生长晶体。 已知重量的绳索的下端连接到晶体，而绳索的上端连接到绳索卷绕单元的滚筒。 绳索卷绕单元包括联接到滚筒以驱动滚筒并将绳索卷绕在其上的驱动器，并且包括滚筒和驱动器的绳索卷绕单元的重量是已知的。 至少一个重量传感器耦合到绳索卷绕单元，以便测量作用在绳索卷绕单元上的重力的大小。 由此，通过从测量的作用在绳索卷绕单元上的重量的大小减去绳索和绳索卷绕单元的已知重量的总和来确定生长的晶体的重量。