摘要:
Certain exemplary embodiments comprise a method comprising a plurality of activities, comprising: based on an analysis of historical information regarding packet traffic conveyed on a local area network associated with a customer, the packet traffic also conveyed on a wide area network managed by a service provider and coupled to the local area network: receiving information relating to a requested change in capacity provisioned for packet traffic conveyed on the wide area network; and automatically changing the capacity provisioned for packet traffic conveyed on the wide area network.
摘要:
A current controller for a multi-level current mode driver. The current controller includes a multi-level voltage reference and at least one source calibration signal. A comparator is coupled by a coupling network to the multi-level voltage reference and the at least one source calibration signal. A selected voltage is applied from the multi-level voltage reference and a selected source calibration signal is applied from the at least one source calibration signal to the comparator.
摘要:
A system and method are shown for generation of at least one reference voltage level in a bus system. A reference voltage generator on a current driver includes at least one reference voltage level, at least one control signal, and an active device. The active device is coupled to the at least one control signal, such as a current control signal, and a selected reference voltage of the at least one reference voltage level. The active device is arranged to shift the at least one reference voltage level based on the at least one current control signal such as an equalization signal, a crosstalk signal, or the combination thereof, employed on the current driver.
摘要:
Techniques for improved timing control of memory devices are disclosed. In one embodiment, the techniques may be realized as a memory controller to communicate with a memory device via a communications link. The memory controller may comprise a memory interface to exchange data with the memory device via a set of N conductors according to at least one clock, the data being encoded such that each M bits of data are represented by at least one symbol and each symbol is associated with a combination of signal levels on a group of n conductors, wherein M
摘要:
Techniques are used to store information in a medium such as the memory cells of an integrated circuit, and also retrieval of information from the medium. The integrated circuit includes nonvolatile memory cells (416) capable of multilevel or analog voltage level storage. The integrated circuit may store or record information in analog or digital form, or both. Information is stored in and retrieved from the integrated circuit using a user-selected sampling frequency. The user's selection of the sampling frequency is stored within the integrated circuit.
摘要:
A technique for utilizing spare bandwidth resulting from the use of a transition-limiting code in a multi-level signaling system is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for utilizing spare bandwidth resulting from the use of a transition-limiting code in a multi-level signaling system, wherein the transition-limiting code has a characteristic such that at least one signal level is periodically unused. The method comprises utilizing the at least one periodically unused signal level in a codeword that has been encoded using the transition-limiting code so as to represent additional information in the multi-level signaling system.
摘要:
A method for improving resolution of a current mode driver. The current mode driver is operable to provide an output that falls within a predetermined range. An embodiment of the method includes sensing a condition, such as a process condition, a voltage condition and a temperature condition. A full scale current of a digital-to-analog converter is adjusted in accordance with the condition. A current control signal is set based on an output of the digital-to-analog converter. The sensing step may include measuring a process, voltage or temperature sensitive DC parameter. Alternatively, the sensing step may include sensing a process, voltage or temperature sensitive AC parameter.
摘要:
A current controller for a multi-level current mode driver. The current controller includes a multi-level voltage reference and at least one source calibration signal. A comparator is coupled by a coupling network to the multi-level voltage reference and the at least one source calibration signal. A selected voltage is applied from the multi-level voltage reference and a selected source calibration signal is applied from the at least one source calibration signal to the comparator.
摘要:
A system and method are shown for generation of at least one reference voltage level in a bus system. A reference voltage generator on a current driver includes at least one reference voltage level, at least one control signal, and an active device. The active device is coupled to the at least one control signal, such as a current control signal, and a selected reference voltage of the at least one reference voltage level. The active device is arranged to shift the at least one reference voltage level based on the at least one current control signal such as an equalization signal, a crosstalk signal, or the combination thereof, employed on the current driver.
摘要:
A technique for receiving differential multi-PAM signals is disclosed. In one particular exemplary embodiment, the technique may be realized as a differential multi-PAM extractor circuit. In this particular exemplary embodiment, the differential multi-PAM extractor circuit comprises an upper LSB sampler circuit configured to receive a differential multi-PAM input signal and a first differential reference signal, and to generate a first differential sampled output signal. The differential multi-PAM extractor circuit also comprises a lower LSB sampler circuit configured to receive the differential multi-PAM input signal and a second differential reference signal, and to generate a second differential sampled output signal. The differential multi-PAM extractor circuit further comprises a combiner circuit configured to receive the first differential sampled output signal and the second differential sampled output signal, and to generate a differential LSB output signal indicating an LSB value of the differential multi-PAM input signal.