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    Address validation using signatures
    12.
    发明授权
    Address validation using signatures 有权

    公开(公告)号：US09749319B2

    公开(公告)日：2017-08-29

    申请号：US14867250

    申请日：2015-09-28

    Applicant: Google Inc.

    Inventor： Benjamin C. Serebrin

    IPC: H04L29/06 ,  G06F12/14 ,  H04L9/32 ,  G06F21/79

    CPC classification number: H04L63/0876 ,  G06F12/1081 ,  G06F12/1408 ,  G06F12/1475 ,  G06F21/79 ,  G06F2212/1052 ,  H04L9/3247 ,  H04L63/062 ,  H04L63/164

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating signed addresses. One of the methods includes receiving, by a component from a device, a plurality of first requests, each first request for a physical address and including a virtual address, determining, by the component, a first physical address using the virtual address, generating a first signature for the first physical address, and providing, to the device, a response that includes the first signature, receiving, from the device, a plurality of second requests, each second request for access to a second physical address and including a second signature, determining, by the component for each of the plurality of second requests, whether the second physical address is valid using the second signature, and for each second request for which the second physical address is determined to be valid, servicing the corresponding second request.

    DATA CACHING
    13.
    发明申请
    DATA CACHING 审中-公开

    公开(公告)号：US20170153977A1

    公开(公告)日：2017-06-01

    申请号：US15429579

    申请日：2017-02-10

    Applicant: Google Inc.

    Inventor： Richard Yoo ,  Liqun Cheng ,  Benjamin C. Serebrin ,  Parthasarathy Ranganathan ,  Rama Krishna Govindaraju

    IPC: G06F12/0811 ,  G06F1/32 ,  G06F9/44

    CPC classification number: G06F12/0811 ,  G06F1/3275 ,  G06F9/4401 ,  G06F12/0871 ,  G06F12/0897 ,  G06F2212/283

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for caching data not frequently accessed. One of the methods includes receiving a request for data from a component of a device, determining that the data satisfies an infrequency condition, in response to determining that the data satisfies the infrequency condition: determining a target cache level which defines a cache level within a cache level hierarchy of a particular cache at which to store infrequently accessed data, the target cache level being lower than a highest cache level in the cache level hierarchy, requesting and receiving the data from a memory that is not a cache of the device, and storing the data in a level of the particular cache that is at or below the target cache level in the cache level hierarchy, and providing the data to the component.

    Data caching
    14.
    发明授权
    Data caching 有权

    公开(公告)号：US09600417B2

    公开(公告)日：2017-03-21

    申请号：US14699014

    申请日：2015-04-29

    Applicant: Google Inc.

    Inventor： Richard Yoo ,  Liqun Cheng ,  Benjamin C. Serebrin ,  Parthasarathy Ranganathan ,  Rama Krishna Govindaraju

    IPC: G06F12/00 ,  G06F12/0811

    CPC classification number: G06F12/0811 ,  G06F1/3275 ,  G06F9/4401 ,  G06F12/0871 ,  G06F12/0897 ,  G06F2212/283

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for caching data not frequently accessed. One of the methods includes receiving a request for data from a component of a device, determining that the data satisfies an infrequency condition, in response to determining that the data satisfies the infrequency condition: determining a target cache level which defines a cache level within a cache level hierarchy of a particular cache at which to store infrequently accessed data, the target cache level being lower than a highest cache level in the cache level hierarchy, requesting and receiving the data from a memory that is not a cache of the device, and storing the data in a level of the particular cache that is at or below the target cache level in the cache level hierarchy, and providing the data to the component.

    ADDRESS CACHING IN SWITCHES
    15.
    发明申请
    ADDRESS CACHING IN SWITCHES 有权
    地址在开关中缓存

    公开(公告)号：US20170031835A1

    公开(公告)日：2017-02-02

    申请号：US14810062

    申请日：2015-07-27

    Applicant: Google Inc.

    Inventor： Benjamin C. Serebrin

    IPC: G06F12/10 ,  G06F3/06 ,  G06F12/08

    CPC classification number: G06F13/4022 ,  G06F3/0611 ,  G06F3/0656 ,  G06F3/067 ,  G06F12/0813 ,  G06F12/0882 ,  G06F12/10 ,  G06F12/1036 ,  G06F12/1045 ,  G06F12/1081 ,  G06F12/109 ,  G06F12/1425 ,  G06F2212/1016 ,  G06F2212/1024 ,  G06F2212/1044 ,  G06F2212/1048 ,  G06F2212/152 ,  G06F2212/154 ,  G06F2212/264 ,  G06F2212/604 ,  G06F2212/608 ,  G06F2212/65 ,  G06F2212/657 ,  G06F2212/68 ,  G06F2212/682 ,  G06F2212/683

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing an address in a memory of a switch. One of the systems includes a switch that receives packets from and delivers packets to devices connected to a bus without any components on the bus between the switch and each of the devices, a memory integrated into the switch to store a mapping of virtual addresses to physical addresses, and a storage medium integrated into the switch storing instructions executable by the switch to cause the switch to perform operations including receiving a response to an address translation request for a device connected to the switch by the bus, the response including a mapping of a virtual address to a physical address, and storing, in the memory, the mapping of the virtual address to the physical address in response to receiving the response.

    Abstract translation: 方法，系统和装置，包括在计算机存储介质上编码的计算机程序，用于将地址存储在交换机的存储器中。 系统之一包括从交换机和每个设备之间的总线上没有任何组件的数据包接收数据包并将数据包传送到连接到总线的设备的交换机，集成到交换机中的存储器，以将虚拟地址映射到物理 地址和集成到交换机中的存储介质，其存储可由交换机执行的指令，以使交换机执行操作，包括接收对由总线连接到交换机的设备的地址转换请求的响应，响应包括 虚拟地址到物理地址，并且响应于接收到响应而在存储器中存储虚拟地址到物理地址的映射。

    DATA CACHING
    16.
    发明申请
    DATA CACHING 有权
    数据缓存

    公开(公告)号：US20160321176A1

    公开(公告)日：2016-11-03

    申请号：US14699014

    申请日：2015-04-29

    Applicant: Google Inc.

    Inventor： Richard Yoo ,  Liqun Cheng ,  Benjamin C. Serebrin ,  Parthasarathy Ranganathan ,  Rama Krishna Govindaraju

    IPC: G06F12/08

    CPC classification number: G06F12/0811 ,  G06F1/3275 ,  G06F9/4401 ,  G06F12/0871 ,  G06F12/0897 ,  G06F2212/283

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for caching data not frequently accessed. One of the methods includes receiving a request for data from a component of a device, determining that the data satisfies an infrequency condition, in response to determining that the data satisfies the infrequency condition: determining a target cache level which defines a cache level within a cache level hierarchy of a particular cache at which to store infrequently accessed data, the target cache level being lower than a highest cache level in the cache level hierarchy, requesting and receiving the data from a memory that is not a cache of the device, and storing the data in a level of the particular cache that is at or below the target cache level in the cache level hierarchy, and providing the data to the component.

    Abstract translation: 方法，系统和装置，包括在计算机存储介质上编码的计算机程序，用于缓存不经常访问的数据。 所述方法之一包括响应于确定所述数据满足所述不频率条件，从设备的组件接收对数据的请求，确定所述数据满足不频率条件：确定定义所述高速缓存级别内的高速缓存级别的目标高速缓存级别 特定高速缓存的高速缓存级别级别，用于存储不经常访问的数据，目标高速缓存级别低于高速缓存级别层级中的最高高速缓存级别，从不是设备的高速缓存的存储器请求和接收数据;以及 将数据存储在高速缓存级别层级中处于或低于目标高速缓存级别的特定高速缓存的级别，并将数据提供给组件。

    VIRTUAL MACHINE SYSTEMS
    17.
    发明申请
    VIRTUAL MACHINE SYSTEMS 有权
    虚拟机系统

    公开(公告)号：US20160306645A1

    公开(公告)日：2016-10-20

    申请号：US14688258

    申请日：2015-04-16

    Applicant: Google Inc.

    Inventor： Benjamin C. Serebrin

    IPC: G06F9/455 ,  G06F9/54

    CPC classification number: G06F9/45558 ,  G06F9/546 ,  G06F2009/4557 ,  G06F2009/45583

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for memory requests by a virtual machine. One of the methods includes generating a plurality of doorbell pages for a plurality of virtual machines executing on a device, providing, to each of the plurality of virtual machines, access to a respective one of the plurality of doorbell pages that identifies a queue that stores requests from the respective virtual machine, receiving, from a particular one of the plurality of doorbell pages, a notification that the respective queue has a request from the respective virtual machine, and in response to receiving the notification that the respective queue has a request from the respective virtual machine, causing a processor to process the respective queue for the respective virtual machine.

    Abstract translation: 方法，系统和装置，包括在计算机存储介质上编码的计算机程序，用于虚拟机的存储器请求。 其中一种方法包括为在设备上执行的多个虚拟机生成多个门铃页面，向多个虚拟机中的每个虚拟机提供对多个门铃页面中相应的一个门铃页面的访问，该门户页面标识存储 来自相应虚拟机的请求，从多个门铃页面中的特定一个接收到相应队列具有来自相应虚拟机的请求的通知，以及响应于接收到相应队列具有来自 相应的虚拟机，使处理器处理相应虚拟机的相应队列。

    Instruction Cache Management Based on Temporal Locality
    18.
    发明申请
    Instruction Cache Management Based on Temporal Locality 审中-公开
    基于时域的指令缓存管理

    公开(公告)号：US20160034401A1

    公开(公告)日：2016-02-04

    申请号：US14450060

    申请日：2014-08-01

    Applicant: Google Inc.

    Inventor： Benjamin C. Serebrin ,  Kim Hazelwood

    IPC: G06F12/08

    CPC classification number: G06F12/0875 ,  G06F12/123 ,  G06F12/126 ,  G06F12/127

    Abstract: The present disclosure relates to managing an instruction cache based on temporal locality of cached instructions. One example method includes receiving a request for a first instruction included in a software application; storing the first instruction in a cache structure; receiving a request for a second instruction included in the software application; determining that a cache entry must be removed from the cache structure to create space to store the second instruction; determining that the first instruction should be removed from the cache structure based on temporal locality attributes associated with at least one of the first instruction or the second instruction, the temporal locality attributes representing a likelihood that additional requests will be received for an associated instruction while the instruction is stored in the cache structure; removing the first instruction from the cache structure; and storing the second instruction in the cache structure.

    Abstract translation: 本公开涉及基于高速缓存指令的时间局部性来管理指令高速缓存。 一种示例性方法包括接收对软件应用中包括的第一指令的请求; 将所述第一指令存储在高速缓存结构中; 接收对所述软件应用中包括的第二指令的请求; 确定高速缓存条目必须从高速缓存结构中移除以创建存储第二指令的空间; 基于与所述第一指令或所述第二指令中的至少一个相关联的时间局部属性，确定所述第一指令应该从所述高速缓存结构中移除，所述时间局部属性表示将针对相关联的指令接收附加请求的可能性， 指令存储在缓存结构中; 从缓存结构中移除第一条指令; 并将第二指令存储在高速缓存结构中。

    Counting events using hardware performance counters and annotated instructions
    19.
    发明授权
    Counting events using hardware performance counters and annotated instructions 有权
    使用硬件性能计数器和注释说明计数事件

    公开(公告)号：US09058415B1

    公开(公告)日：2015-06-16

    申请号：US13839272

    申请日：2013-03-15

    Applicant: Google Inc.

    Inventor： Benjamin C. Serebrin ,  Kim Hazelwood

    IPC: G06F9/44 ,  G06F11/34 ,  G06F11/36 ,  G06F11/30

    CPC classification number: G06F11/3409 ,  G06F8/70 ,  G06F11/30 ,  G06F11/3003 ,  G06F11/302 ,  G06F11/3093 ,  G06F11/3466 ,  G06F11/348 ,  G06F11/3636 ,  G06F2201/86 ,  G06F2201/865 ,  G06F2201/88 ,  G06F2201/885

    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for receiving a plurality of instructions, where the plurality of instructions comprise one or more first instructions from an application and one or more second instructions from a profiler that instruments the application with the one or more second instructions; identifying, for each of one or more instructions in the plurality of instructions, a respective prefix from one or more prefixes based on a category of the respective instruction; annotating each of the one or more instructions with the respective prefix; and for at least one of one or more hardware performance counters, configuring the respective hardware performance counter to count each instruction in the plurality of instructions that is annotated by one or more of the respective prefixes.

    Abstract translation: 方法，系统和装置，包括在计算机存储介质上编码的用于接收多个指令的计算机程序，其中所述多个指令包括来自应用的一个或多个第一指令和来自分析器的一个或多个第二指令， 具有一个或多个第二指令; 基于相应指令的类别，从多个指令中的一个或多个指令中的每一个识别来自一个或多个前缀的相应前缀; 用相应的前缀注释所述一个或多个指令中的每一个; 并且对于一个或多个硬件性能计数器中的至少一个，配置相应的硬件性能计数器来对由一个或多个相应前缀注释的多个指令中的每个指令进行计数。

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