摘要:
In one embodiment, a semiconductor device is formed to include a gate structure extending into a semiconductor material that is underlying a first region of semiconductor material. The gate structure includes a conductor and also a gate insulator that has a first portion positioned between the gate conductor and a first portion of the semiconductor material that underlies the gate conductor. The first portion of the semiconductor material is configured to form a channel region of the transistor which underlies the gate conductor. The gate structure may also include a shield conductor overlying the gate conductor and having a shield insulator between the shield conductor and the gate conductor. The shield insulator may also have a second portion positioned between the shield conductor and a second portion of the gate insulator and a third portion overlying the shield conductor.
摘要:
In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor.
摘要:
An electronic device can include a semiconductor layer overlying a substrate and having a primary surface and a thickness, wherein a trench extends through at least approximately 50% of the thickness of semiconductor layer to a depth. The electronic device can further include a conductive structure within the trench, wherein the conductive structure extends at least approximately 50% of the depth of the trench. The electronic device can still further include a vertically-oriented doped region within the semiconductor layer adjacent to and electrically insulated from the conductive structure; and an insulating layer disposed between the vertically-oriented doped region and the conductive structure. A process of forming an electronic device can include patterning a semiconductor layer to define a trench extending through at least approximately 50% of the thickness of the semiconductor layer and forming a vertically-oriented doped region after patterning the semiconductor layer to define the trench.
摘要:
In one embodiment, a contact structure for a semiconductor device having a trench shield electrode includes a gate electrode contact portion and a shield electrode contact portion within a trench structure. Contact is made to the gate electrode and the shield electrode within or inside of the trench structure. A thick passivating layer surrounds the shield electrode in the contact portion.
摘要:
In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor.
摘要:
In one embodiment, a method for forming a semiconductor device includes forming trench and a dielectric layer along surfaces of the trench. A shield electrode is formed in a lower portion of the trench and the dielectric layer is removed from upper sidewall surfaces of the trench. A gate dielectric layer is formed along the upper surfaces of the trench. Oxidation-resistant spacers are formed along the gate dielectric layer. Thereafter, an interpoly dielectric layer is formed above the shield electrode using localized oxidation. The oxidation step increases the thickness of lower portions of the gate dielectric layer. The oxidation-resistant spacers are removed before forming a gate electrode adjacent the gate dielectric layer.
摘要:
In one embodiment, a semiconductor device is formed to include a gate structure extending into a semiconductor material that is underlying a first region of semiconductor material. The gate structure includes a conductor and also a gate insulator that has a first portion positioned between the gate conductor and a first portion of the semiconductor material that underlies the gate conductor. The first portion of the semiconductor material is configured to form a channel region of the transistor which underlies the gate conductor. The gate structure may also include a shield conductor overlying the gate conductor and having a shield insulator between the shield conductor and the gate conductor. The shield insulator may also have a second portion positioned between the shield conductor and a second portion of the gate insulator and a third portion overlying the shield conductor.
摘要:
In one embodiment, a semiconductor device is formed to include a gate structure extending into a first portion of a semiconductor material that is underlying a first region of semiconductor material. The gate structure separates a portion of the first region into at least a first current carrying electrode region and a second current carrying electrode region. The first portion of the semiconductor material is configured to form a channel region of the transistor which underlies a gate conductor of the gate structure. The gate structure also includes a shield conductor overlying the gate conductor and having a shield insulator positioned between the shield conductor and the gate conductor. The shield insulator also having a second portion positioned between the shield conductor and a second portion of the gate insulator and a third portion overlying the shield conductor.
摘要:
In one embodiment, a vertical insulated-gate field effect transistor includes a shield electrode formed in trench structure within a semiconductor material. A gate electrode is isolated from the semiconductor material using gate insulating layers. Before the shield electrode is formed, spacer layers can be used form shield insulating layers along portions of the trench structure. The shield insulating layers are thicker than the gate insulating layers. In another embodiment, the shield insulating layers have variable thickness.
摘要:
A semiconductor component resistant to the formation of a parasitic bipolar transistor and a method for manufacturing the semiconductor component using a reduced number of masking steps. A semiconductor material of N-type conductivity having a region of P-type conductivity is provided. A doped region of N-type conductivity is formed in the region of P-type conductivity. Trenches are formed in a semiconductor material and extend through the regions of N-type and P-type conductivities. A field oxide is formed from the semiconductor material such that portions of the trenches extend under the field oxide. The field oxide serves as an implant mask in the formation of source regions. Body contact regions are formed from the semiconductor material and an electrical conductor is formed in contact with the source and body regions. An electrical conductor is formed in contact with the backside of the semiconductor material.